+2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
+
+ * dwarf2dbg.h (dwarf2_move_insn): Declare.
+ * dwarf2dbg.c (line_subseg): Add pmove_tail.
+ (get_line_subseg): Add create_p argument. Initialize pmove_tail.
+ (dwarf2_gen_line_info_1): Update call accordingly.
+ (dwarf2_move_insn): New function.
+ * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
+
+2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
+
+ Revert:
+
+ 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR gas/13024
+ * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
+ (dwarf2_gen_line_info_1): Delete.
+ (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
+ (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
+ (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
+ (dwarf2_directive_loc): Push previous .locs instead of generating
+ them immediately.
+
+2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
+
+ * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
+ (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
+
+2013-06-13 Nick Clifton <nickc@redhat.com>
+
+ PR gas/15602
+ * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
+ * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
+ function. Generates an error if the adjusted offset is out of a
+ 16-bit range.
+
+2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
+
+ * config/tc-nios2.c (md_apply_fix): Mask constant
+ BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
+
+2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (append_insn): Don't do branch relaxation for
+ MIPS-3D instructions either.
+ (md_convert_frag): Update the COPx branch mask accordingly.
+
+ * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
+ option.
+ * doc/as.texinfo (Overview): Add --relax-branch and
+ --no-relax-branch.
+ * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
+ --no-relax-branch.
+
+2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
+
+ * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
+ omitted.
+
+2013-06-08 Catherine Moore <clm@codesourcery.com>
+
+ * config/tc-mips.c (is_opcode_valid): Build ASE mask.
+ (is_opcode_valid_16): Pass ase value to opcode_is_member.
+ (append_insn): Change INSN_xxxx to ASE_xxxx.
+
+2013-06-01 George Thomas <george.thomas@atmel.com>
+
+ * gas/config/tc-avr.c: Change ISA for devices with USB support to
+ AVR_ISA_XMEGAU
+
+2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (md_begin): Don't align text/data/bss sections
+ for ELF.
+
+2013-05-31 Paul Brook <paul@codesourcery.com>
+
+ gas/
+ * config/tc-mips.c (s_ehword): New.
+
+2013-05-30 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
+
+2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * write.c (resolve_reloc_expr_symbols): On REL targets don't
+ convert relocs who have no relocatable field either. Rephrase
+ the conditional so that the PC-relative check is only applied
+ for REL targets.
+
+2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
+
+ * config/tc-mips.c (macro) <ld>: Don't use $zero for address
+ calculation.
+
+2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (reloc_table): Update to use
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
+ (md_apply_fix): Likewise.
+ (aarch64_force_relocation): Likewise.
+
+2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (it_fsm_post_encode): Improve
+ warning messages about deprecated IT block formats.
+
+2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (md_apply_fix): Move value range checking
+ inside fx_done condition.
+
+2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
+
+ * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
+
+2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
+ and clean up warning when using PRINT_OPCODE_TABLE.
+
+2013-05-20 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
+ and data fixups performing shift/high adjust/sign extension on
+ fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
+ when writing data fixups rather than recalculating size.
+
+2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * doc/c-msp430.texi: Fix typo.
+
+2013-05-16 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
+ are also TOC symbols.
+
+2013-05-16 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c: Make -mmcu recognise more part numbers.
+ Add -mcpu command to specify core type.
+ * doc/c-msp430.texi: Update documentation.
+
+2013-05-09 Andrew Pinski <apinski@cavium.com>
+
+ * config/tc-mips.c (struct mips_set_options): New ase_virt field.
+ (mips_opts): Update for the new field.
+ (file_ase_virt): New variable.
+ (ISA_SUPPORTS_VIRT_ASE): New macro.
+ (ISA_SUPPORTS_VIRT64_ASE): New macro.
+ (MIPS_CPU_ASE_VIRT): New define.
+ (is_opcode_valid): Handle ase_virt.
+ (macro_build): Handle "+J".
+ (validate_mips_insn): Likewise.
+ (mips_ip): Likewise.
+ (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
+ (md_longopts): Add mvirt and mnovirt
+ (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
+ (mips_after_parse_args): Handle ase_virt field.
+ (s_mipsset): Handle "virt" and "novirt".
+ (mips_elf_final_processing): Add a comment about virt ASE might need
+ a new flag.
+ (md_show_usage): Print out the usage of -mvirt and mno-virt options.
+ * doc/c-mips.texi: Document -mvirt and -mno-virt.
+ Document ".set virt" and ".set novirt".
+
+2013-05-09 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
+ control of operand flag bits.
+
+2013-05-07 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
+ (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
+ (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
+ (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
+ (md_apply_fix): Set fx_no_overflow for assorted relocations.
+ Shift and sign-extend fieldval for use by some VLE reloc
+ operand->insert functions.
+
+2013-05-06 Paul Brook <paul@codesourcery.com>
+ Catherine Moore <clm@codesourcery.com>
+
+ * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
+ (limited_pcrel_reloc_p): Likewise.
+ (md_apply_fix): Likewise.
+ (tc_gen_reloc): Likewise.
+
+2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (limited_pcrel_reloc_p): New function.
+ (mips_fix_adjustable): Adjust pc-relative check to use
+ limited_pc_reloc_p.
+
+2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
+ (s_mips_stab): Do not restrict to stabn only.
+
+2013-05-02 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c: Add support for the MSP430X architecture.
+ Add code to insert a NOP instruction after any instruction that
+ might change the interrupt state.
+ Add support for the LARGE memory model.
+ Add code to initialise the .MSP430.attributes section.
+ * config/tc-msp430.h: Add support for the MSP430X architecture.
+ * doc/c-msp430.texi: Document the new -mL and -mN command line
+ options.
+ * NEWS: Mention support for the MSP430X architecture.
+
+2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
+ alpha*-*-linux*ecoff*.
+
+2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
+
+ * config/tc-mips.c (mips_ip): Add sizelo.
+ For "+C", "+G", and "+H", set sizelo and compare against it.
+
+2013-04-29 Nick Clifton <nickc@redhat.com>
+
+ * as.c (Options): Add -gdwarf-sections.
+ (parse_args): Likewise.
+ * as.h (flag_dwarf_sections): Declare.
+ * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
+ (process_entries): When -gdwarf-sections is enabled generate
+ fragmentary .debug_line sections.
+ (out_debug_line): Set the section for the .debug_line section end
+ symbol.
+ * doc/as.texinfo: Document -gdwarf-sections.
+ * NEWS: Mention -gdwarf-sections.
+
+2013-04-26 Christian Groessler <chris@groessler.org>
+
+ * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
+ according to the target parameter. Don't call s_segm since s_segm
+ calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
+ initialized yet.
+ (md_begin): Call s_segm according to target parameter from command
+ line.
+
+2013-04-25 Alan Modra <amodra@gmail.com>
+
+ * configure.in: Allow little-endian linux.
+ * configure: Regenerate.
+
+2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
+
+ * config/tc-nios2.c (nios2_control_register_arg_p): Rename
+ "fstatus" control register to "eccinj".
+
+2013-04-19 Kai Tietz <ktietz@redhat.com>
+
+ * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
+
+2013-04-15 Julian Brown <julian@codesourcery.com>
+
+ * expr.c (add_to_result, subtract_from_result): Make global.
+ * expr.h (add_to_result, subtract_from_result): Add prototypes.
+ * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
+ subtract_from_result to handle extra bit of precision for .sleb128
+ directive operands.
+
+2013-04-10 Julian Brown <julian@codesourcery.com>
+
+ * read.c (convert_to_bignum): Add sign parameter. Use it
+ instead of X_unsigned to determine sign of resulting bignum.
+ (emit_expr): Pass extra argument to convert_to_bignum.
+ (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
+ X_extrabit to convert_to_bignum.
+ (parse_bitfield_cons): Set X_extrabit.
+ * expr.c (make_expr_symbol, expr_build_uconstant, operand):
+ Initialise X_extrabit field as appropriate.
+ (add_to_result): New.
+ (subtract_from_result): New.
+ (expr): Use above.
+ * expr.h (expressionS): Add X_extrabit field.
+
+2013-04-10 Jan Beulich <jbeulich@suse.com>
+
+ * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
+ register being PC when is_t or writeback, and use distinct
+ diagnostic for the latter case.
+
+2013-04-10 Jan Beulich <jbeulich@suse.com>
+
+ * gas/config/tc-arm.c (parse_operands): Re-write
+ po_barrier_or_imm().
+ (do_barrier): Remove bogus constraint().
+ (do_t_barrier): Remove.
+
+2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
+
+ * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
+ ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
+ ATmega2564RFR2
+ * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
+
+2013-04-09 Jan Beulich <jbeulich@suse.com>
+
+ * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
+ Use local variable Rt in more places.
+ (do_vmsr): Accept all control registers.
+
+2013-04-09 Jan Beulich <jbeulich@suse.com>
+
+ * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
+ if there was none specified for moves between scalar and core
+ register.
+
+2013-04-09 Jan Beulich <jbeulich@suse.com>
+
+ * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
+ NEON_ALL_LANES case.
+
+2013-04-08 Jan Beulich <jbeulich@suse.com>
+
+ * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
+ PC-relative VSTR.
+
+2013-04-08 Jan Beulich <jbeulich@suse.com>
+
+ * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
+ entry to sp_fiq.
+
+2013-04-03 Alan Modra <amodra@gmail.com>
+
+ * doc/as.texinfo: Add support to generate man options for h8300.
+ * doc/c-h8300.texi: Likewise.
+
+2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
+ Cortex-A57.
+
+2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
+
+ PR binutils/15068
+ * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
+
+2013-03-26 Nick Clifton <nickc@redhat.com>
+
+ PR gas/15295
+ * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
+ start of the file each time.
+
+ PR gas/15178
+ * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
+ FreeBSD targets.
+
+2013-03-26 Douglas B Rupp <rupp@gnat.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
+ after fixup.
+
+2013-03-21 Will Newton <will.newton@linaro.org>
+
+ * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
+ pc-relative str instructions in Thumb mode.
+
+2013-03-21 Michael Schewe <michael.schewe@gmx.net>
+
+ * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
+ @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
+ R_H8_DISP32A16.
+ * config/tc-h8300.h: Remove duplicated defines.
+
+2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ PR gas/15282
+ * tc-avr.c (mcu_has_3_byte_pc): New function.
+ (tc_cfi_frame_initial_instructions): Call it to find return
+ address size.
+
+2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
+
+ PR gas/15095
+ * config/tc-tic6x.c (tic6x_try_encode): Handle
+ tic6x_coding_dreg_(msb|lsb) field coding types and use it to
+ encode register pair numbers when required.
+
+2013-03-15 Will Newton <will.newton@linaro.org>
+
+ * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
+ in vstr in Thumb mode for pre-ARMv7 cores.
+
+2013-03-14 Andreas Schwab <schwab@suse.de>
+
+ * doc/c-arc.texi (ARC Directives): Revert last change and use
+ @itemize instead of @table.
+ * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
+
+2013-03-14 Nick Clifton <nickc@redhat.com>
+
+ PR gas/15273
+ * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
+ NULL message, instead just check ARM_CPU_IS_ANY directly.
+
+2013-03-14 Nick Clifton <nickc@redhat.com>
+
+ PR gas/15212
+ * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
+ for table format.
+ * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
+ to the @item directives.
+ (ARM-Neon-Alignment): Move to correct place in the document.
+ * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
+ formatting.
+ * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
+ @smallexample.
+
+2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
+ case. Add default BAD_CASE to switch.
+
+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config/tc-nios2.c (nios2_assemble_args_ds): New function.
+ (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
+
+2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (crc_ext_armv8): New feature set.
+ (UNPRED_REG): New macro.
+ (do_crc32_1): New function.
+ (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
+ do_crc32ch, do_crc32cw): Likewise.
+ (TUEc): New macro.
+ (insns): Add entries for crc32 mnemonics.
+ (arm_extensions): Add entry for crc.
+
+2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * write.h (struct fix): Add fx_dot_frag field.
+ (dot_frag): Declare.
+ * write.c (dot_frag): New variable.
+ (fix_new_internal): Set fx_dot_frag field with dot_frag.
+ (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
+ * expr.c (expr): Save value of frag_now in dot_frag when setting
+ dot_value.
+ * read.c (emit_expr): Likewise. Delete comments.
+
+2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (flag_code_names): Removed.
+ (i386_index_check): Rewrote.
+
+2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
+ add comment.
+ (aarch64_double_precision_fmovable): New function.
+ (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
+ function; handle hexadecimal representation of IEEE754 encoding.
+ (parse_operands): Update the call to parse_aarch64_imm_float.
+
+2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
+ (check_hle): Updated.
+ (md_assemble): Likewise.
+ (parse_insn): Likewise.
+
+2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Add rep_prefix.
+ (md_assemble): Check if REP prefix is OK.
+ (parse_insn): Remove expecting_string_instruction. Set
+ i.rep_prefix.
+
+2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
+
+2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
+ for system registers.
+
+2013-02-27 DJ Delorie <dj@redhat.com>
+
+ * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
+ (rl78_op): Handle %code().
+ (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
+ (tc_gen_reloc): Likwise; convert to a computed reloc.
+ (md_apply_fix): Likewise.
+
+2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
+
+ * config/rl78-parse.y: Fix encoding of DIVWU insn.
+
+2013-02-25 Terry Guo <terry.guo@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
+ * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
+ list of accepted CPUs.
+
+2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/15159
+ * config/tc-i386.c (cpu_arch): Add ".smap".
+
+ * doc/c-i386.texi: Document smap.
+
+2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
+ mips_assembling_insn appropriately.
+ (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
+
+2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (append_insn): Correct indentation, remove
+ extraneous braces.
+
+2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
+
2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
* configure.tgt: Add nios2-*-rtems*.
core.
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
-
Andrew Jenner <andrew@codesourcery.com>
+ Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.
projects / binutils-gdb.git / blobdiff