-*- text -*-
+
+* Add support for the TMS320C6000 (TI C6X) processor family.
+
+* GAS now understands an extended syntax in the .section directive flags
+ for COFF targets that allows the section's alignment to be specified. This
+ feature has also been backported to the 2.20 release series, starting with
+ 2.20.1.
+
+* Add support for the Renesas RX processor.
+
+Changes in 2.20:
+
+* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
+ pseudo op. It marks the symbol as being globally unique in the entire
+ process.
+
* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
in binary rather than text.
* Add support for Lattice Mico32 (lm32) architecture.
+* Add support for Xilinx MicroBlaze architecture.
+
Changes in 2.19:
* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind