/* tc-frv.c -- Assembler for the Fujitsu FRV.
- Copyright (C) 2002-2016 Free Software Foundation, Inc.
+ Copyright (C) 2002-2021 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
#include "opcodes/frv-desc.h"
#include "opcodes/frv-opc.h"
#include "cgen.h"
-#include "libbfd.h"
#include "elf/common.h"
#include "elf/frv.h"
#include "dwarf2dbg.h"
#define NOP_KEEP 1 /* Keep these NOPS. */
#define NOP_DELETE 2 /* Delete these NOPS. */
-#define DO_COUNT TRUE
-#define DONT_COUNT FALSE
+#define DO_COUNT true
+#define DONT_COUNT false
/* A list of insns within a VLIW insn. */
struct vliw_insn_list
#endif
static unsigned long frv_mach = bfd_mach_frv;
-static bfd_boolean fr400_audio;
+static bool fr400_audio;
/* Flags to set in the elf header */
static flagword frv_flags = DEFAULT_FLAGS | DEFAULT_FDPIC;
static int g_switch_value = 8;
int
-md_parse_option (int c, char *arg)
+md_parse_option (int c, const char *arg)
{
switch (c)
{
case OPTION_CPU:
{
- char *p;
+ const char *p;
int cpu_flags = EF_FRV_CPU_GENERIC;
/* Identify the processor type */
{
cpu_flags = EF_FRV_CPU_FR405;
frv_mach = bfd_mach_fr400;
- fr400_audio = TRUE;
+ fr400_audio = true;
}
else if (strcmp (p, "fr400") == 0)
{
cpu_flags = EF_FRV_CPU_FR400;
frv_mach = bfd_mach_fr400;
- fr400_audio = FALSE;
+ fr400_audio = false;
}
else if (strcmp (p, "fr300") == 0)
fprintf (stream, _("-mno-pack Do not allow instructions to be packed\n"));
fprintf (stream, _("-mpic Mark generated file as using small position independent code\n"));
fprintf (stream, _("-mPIC Mark generated file as using large position independent code\n"));
- fprintf (stream, _("-mlibrary-pic Mark generated file as using position indepedent code for libraries\n"));
+ fprintf (stream, _("-mlibrary-pic Mark generated file as using position independent code for libraries\n"));
fprintf (stream, _("-mfdpic Assemble for the FDPIC ABI\n"));
fprintf (stream, _("-mnopic Disable -mpic, -mPIC, -mlibrary-pic and -mfdpic\n"));
fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n"));
frv_vliw_reset (& vliw, frv_mach, frv_flags);
}
-bfd_boolean
+bool
frv_md_fdpic_enabled (void)
{
return (frv_flags & EF_FRV_FDPIC) != 0;
int chain_num = 0;
static struct vliw_insn_list *
-frv_insert_vliw_insn (bfd_boolean count)
+frv_insert_vliw_insn (bool count)
{
struct vliw_insn_list *vliw_insn_list_entry;
struct vliw_chain *vliw_chain_entry;
if (current_vliw_chain == NULL)
{
- vliw_chain_entry = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
+ vliw_chain_entry = XNEW (struct vliw_chain);
vliw_chain_entry->insn_count = 0;
vliw_chain_entry->insn_list = NULL;
vliw_chain_entry->next = NULL;
previous_vliw_chain->next = vliw_chain_entry;
}
- vliw_insn_list_entry = (struct vliw_insn_list *) xmalloc (sizeof (struct vliw_insn_list));
+ vliw_insn_list_entry = XNEW (struct vliw_insn_list);
vliw_insn_list_entry->type = VLIW_GENERIC_TYPE;
vliw_insn_list_entry->insn = NULL;
vliw_insn_list_entry->sym = NULL;
struct vliw_insn_list *insert_before_insn)
{
- bfd_boolean pack_prev = FALSE;
+ bool pack_prev = false;
struct vliw_chain *return_me = NULL;
struct vliw_insn_list *prev_insn = NULL;
struct vliw_insn_list *curr_insn = vliw_to_split->insn_list;
- struct vliw_chain *double_nop = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
- struct vliw_chain *single_nop = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
- struct vliw_chain *second_part = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
+ struct vliw_chain *double_nop = XNEW (struct vliw_chain);
+ struct vliw_chain *single_nop = XNEW (struct vliw_chain);
+ struct vliw_chain *second_part = XNEW (struct vliw_chain);
struct vliw_chain *curr_vliw = vliw_chain_top;
struct vliw_chain *prev_vliw = NULL;
Then don't set pack bit later. */
if (curr_insn->type != VLIW_LABEL_TYPE)
- pack_prev = TRUE;
+ pack_prev = true;
prev_insn = curr_insn;
curr_insn = curr_insn->next;
}
buffer[0] |= 0x80;
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP in between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
second_part->next = vliw_to_split->next;
vliw1 = vliw_chain_top;
-workaround_top:
+ workaround_top:
FRV_SET_VLIW_WINDOW (vliw1, vliw2, vliw3);
/* Return true if the target implements instruction INSN. */
-static bfd_boolean
+static bool
target_implements_insn_p (const CGEN_INSN *insn)
{
switch (frv_mach)
{
default:
/* bfd_mach_frv or generic. */
- return TRUE;
+ return true;
case bfd_mach_fr300:
case bfd_mach_frvsimple:
valueT
md_section_align (segT segment, valueT size)
{
- int align = bfd_get_section_alignment (stdoutput, segment);
+ int align = bfd_section_alignment (segment);
return ((size + (1 << align) - 1) & -(1 << align));
}
switch (operand->type)
{
case FRV_OPERAND_LABEL16:
- fixP->fx_pcrel = TRUE;
+ fixP->fx_pcrel = true;
return BFD_RELOC_FRV_LABEL16;
case FRV_OPERAND_LABEL24:
- fixP->fx_pcrel = TRUE;
+ fixP->fx_pcrel = true;
if (fixP->fx_cgen.opinfo != 0)
return fixP->fx_cgen.opinfo;
number_to_chars_bigendian (buf, val, n);
}
-char *
+const char *
md_atof (int type, char *litP, int *sizeP)
{
- return ieee_md_atof (type, litP, sizeP, TRUE);
+ return ieee_md_atof (type, litP, sizeP, true);
}
-bfd_boolean
+bool
frv_fix_adjustable (fixS *fixP)
{
bfd_reloc_code_real_type reloc_type;
segment_info_type *seginfo = seg_info (sec);
fixS *fixp;
CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
- flagword flags = bfd_get_section_flags (abfd, sec);
+ flagword flags = bfd_section_flags (sec);
/* Skip relocations in known sections (.ctors, .dtors, and .gcc_except_table)
since we can fix those up by hand. */
projects / binutils-gdb.git / blobdiff