/* tc-i386.h -- Header file for tc-i386.c
Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003
+ 2001, 2002, 2003, 2004
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
#ifndef TC_I386
#define TC_I386 1
-#ifdef ANSI_PROTOTYPES
-struct fix;
+#ifndef BFD_ASSEMBLER
+#error So, do you know what you are doing?
#endif
-#define TARGET_BYTES_BIG_ENDIAN 0
+struct fix;
-#ifdef TE_LYNX
-#define TARGET_FORMAT "coff-i386-lynx"
-#endif
+#define TARGET_BYTES_BIG_ENDIAN 0
-#ifdef BFD_ASSEMBLER
#define TARGET_ARCH bfd_arch_i386
#define TARGET_MACH (i386_mach ())
-extern unsigned long i386_mach PARAMS ((void));
+extern unsigned long i386_mach (void);
#ifdef TE_FreeBSD
#define AOUT_TARGET_FORMAT "a.out-i386-freebsd"
#ifdef TE_FreeBSD
#define ELF_TARGET_FORMAT "elf32-i386-freebsd"
+#elif defined (TE_VXWORKS)
+#define ELF_TARGET_FORMAT "elf32-i386-vxworks"
#endif
+
#ifndef ELF_TARGET_FORMAT
#define ELF_TARGET_FORMAT "elf32-i386"
#endif
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
-#else /* ! BFD_ASSEMBLER */
-
-/* COFF STUFF */
-
-#define COFF_MAGIC I386MAGIC
-#define BFD_ARCH bfd_arch_i386
-#define COFF_FLAGS F_AR32WR
-#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7)
-#define TC_COFF_FIX2RTYPE(FIX) tc_coff_fix2rtype(FIX)
-extern short tc_coff_fix2rtype PARAMS ((struct fix *));
-#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep (frag)
-extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
-
-#ifdef TE_GO32
-/* DJGPP now expects some sections to be 2**4 aligned. */
-#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) \
- ((strcmp (obj_segment_name (SEG), ".text") == 0 \
- || strcmp (obj_segment_name (SEG), ".data") == 0 \
- || strcmp (obj_segment_name (SEG), ".bss") == 0 \
- || strncmp (obj_segment_name (SEG), ".gnu.linkonce.t", 15) == 0 \
- || strncmp (obj_segment_name (SEG), ".gnu.linkonce.d", 15) == 0 \
- || strncmp (obj_segment_name (SEG), ".gnu.linkonce.r", 15) == 0) \
- ? 4 \
- : 2)
-#else
-#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 2
-#endif
-
-#ifdef TE_386BSD
-/* The BSDI linker apparently rejects objects with a machine type of
- M_386 (100). */
-#define AOUT_MACHTYPE 0
-#else
-#define AOUT_MACHTYPE 100
-#endif
-
-#ifndef OBJ_AOUT
-#ifndef TE_PE
-#ifndef TE_GO32
-/* Local labels starts with .L */
-#define LOCAL_LABEL(name) (name[0] == '.' \
- && (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
-#endif
-#endif
-#endif
-
-#define tc_aout_pre_write_hook(x) {;} /* not used */
-#define tc_crawl_symbol_chain(a) {;} /* not used */
-#define tc_headers_hook(a) {;} /* not used */
-#define tc_coff_symbol_emit_hook(a) {;} /* not used */
-
-#endif /* ! BFD_ASSEMBLER */
-
#define LOCAL_LABELS_FB 1
extern const char extra_symbol_chars[];
#define END_OF_INSN '\0'
-/* Intel Syntax */
-/* Values 0-4 map onto scale factor */
-#define BYTE_PTR 0
-#define WORD_PTR 1
-#define DWORD_PTR 2
-#define QWORD_PTR 3
-#define XWORD_PTR 4
-#define SHORT 5
-#define OFFSET_FLAT 6
-#define FLAT 7
-#define NONE_FOUND 8
-
typedef struct
{
/* instruction name sans width suffix ("mov" for movl insns) */
#define CpuAthlon 0x200 /* AMD Athlon or better required*/
#define CpuSledgehammer 0x400 /* Sledgehammer or better required */
#define CpuMMX 0x800 /* MMX support required */
-#define CpuSSE 0x1000 /* Streaming SIMD extensions required */
-#define CpuSSE2 0x2000 /* Streaming SIMD extensions 2 required */
-#define Cpu3dnow 0x4000 /* 3dnow! support required */
+#define CpuMMX2 0x1000 /* extended MMX support (with SSE or 3DNow!Ext) required */
+#define CpuSSE 0x2000 /* Streaming SIMD extensions required */
+#define CpuSSE2 0x4000 /* Streaming SIMD extensions 2 required */
+#define Cpu3dnow 0x8000 /* 3dnow! support required */
+#define Cpu3dnowA 0x10000 /* 3dnow!Extensions support required */
+#define CpuSSE3 0x20000 /* Streaming SIMD extensions 3 required */
+#define CpuPNI CpuSSE3 /* Prescott New Instructions required */
+#define CpuPadLock 0x40000 /* VIA PadLock required */
+#define CpuSVME 0x80000 /* AMD Secure Virtual Machine Ext-s required */
+#define CpuVMX 0x100000 /* VMX Instructions required */
/* These flags are set by gas depending on the flag_code. */
#define Cpu64 0x4000000 /* 64bit support required */
#define CpuNo64 0x8000000 /* Not supported in the 64bit mode */
/* The default value for unknown CPUs - enable all features to avoid problems. */
-#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuSledgehammer|CpuMMX|CpuSSE|CpuSSE2|Cpu3dnow|CpuK6|CpuAthlon)
+#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \
+ |CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuPNI|CpuVMX \
+ |Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock|CpuSVME)
/* the bits in opcode_modifier are used to generate the final opcode from
the base_opcode. These bits also are used to detect alternate forms of
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
#endif
-#ifndef LEX_AT
+#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (LEX_AT)
#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) x86_cons (EXP, NBYTES)
extern void x86_cons PARAMS ((expressionS *, int));
PARAMS ((fragS *, unsigned int, unsigned int, expressionS *));
#endif
+#ifdef TE_PE
+#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_pe_cons_fix_new(FRAG, OFF, LEN, EXP)
+extern void x86_pe_cons_fix_new
+ PARAMS ((fragS *, unsigned int, unsigned int, expressionS *));
+#endif
+
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
-#ifdef BFD_ASSEMBLER
#define NO_RELOC BFD_RELOC_NONE
void i386_validate_fix PARAMS ((struct fix *));
#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
extern int tc_i386_fix_adjustable PARAMS ((struct fix *));
-/* Values passed to md_apply_fix3 don't include the symbol value. */
+/* Values passed to md_apply_fix don't include the symbol value. */
#define MD_APPLY_SYM_VALUE(FIX) 0
/* ELF wants external syms kept, as does PE COFF. */
|| (FIX)->fx_r_type == BFD_RELOC_386_GOTPC \
|| TC_FORCE_RELOCATION (FIX))
-#else /* ! BFD_ASSEMBLER */
-
-#define NO_RELOC 0
-
-#define TC_RVA_RELOC 7
-
-/* Need this for PIC relocations */
-#define NEED_FX_R_TYPE
-
-#undef REVERSE_SORT_RELOCS
-
-/* For COFF. */
-#define TC_FORCE_RELOCATION(FIX) \
- ((FIX)->fx_r_type == 7 || generic_force_reloc (FIX))
-#endif /* ! BFD_ASSEMBLER */
-
#define md_operand(x)
extern const struct relax_type md_relax_table[];
#define tc_cfi_frame_initial_instructions tc_x86_frame_initial_instructions
extern void tc_x86_frame_initial_instructions PARAMS ((void));
+#define md_elf_section_type(str,len) i386_elf_section_type (str, len)
+extern int i386_elf_section_type PARAMS ((const char *, size_t len));
+
+/* Support for SHF_X86_64_LARGE */
+extern int x86_64_section_word PARAMS ((char *, size_t));
+extern int x86_64_section_letter PARAMS ((int letter, char **ptr_msg));
+#define md_elf_section_letter(LETTER, PTR_MSG) x86_64_section_letter (LETTER, PTR_MSG)
+#define md_elf_section_word(STR, LEN) x86_64_section_word (STR, LEN)
+
+#ifdef TE_PE
+
+#define O_secrel O_md1
+
+#define TC_DWARF2_EMIT_OFFSET tc_pe_dwarf2_emit_offset
+void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
+
+#endif /* TE_PE */
+
#endif /* TC_I386 */
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