/* tc-pdp11.c - pdp11-specific -
- Copyright (C) 2001-2016 Free Software Foundation, Inc.
+ Copyright (C) 2001-2020 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
/* A representation for PDP-11 machine code. */
struct pdp11_code
{
- char *error;
+ const char *error;
int code;
int additional; /* Is there an additional word? */
int word; /* Additional word, if any. */
{ 0, 0, 0 },
};
-static struct hash_control *insn_hash = NULL;
+static htab_t insn_hash = NULL;
\f
static int
-set_option (char *arg)
+set_option (const char *arg)
{
int yes = 1;
arg += 3;
}
- /* Commersial instructions. */
+ /* Commercial instructions. */
if (strcmp (arg, "cis") == 0)
pdp11_extension[PDP11_CIS] = yes;
/* Call supervisor mode. */
init_defaults ();
- insn_hash = hash_new ();
- if (insn_hash == NULL)
- as_fatal (_("Virtual memory exhausted"));
+ insn_hash = str_htab_create ();
for (i = 0; i < pdp11_num_opcodes; i++)
- hash_insert (insn_hash, pdp11_opcodes[i].name, (void *) (pdp11_opcodes + i));
+ str_hash_insert (insn_hash, pdp11_opcodes[i].name, pdp11_opcodes + i, 0);
for (i = 0; i < pdp11_num_aliases; i++)
- hash_insert (insn_hash, pdp11_aliases[i].name, (void *) (pdp11_aliases + i));
+ str_hash_insert (insn_hash, pdp11_aliases[i].name, pdp11_aliases + i, 0);
}
void
{
/* On a PDP-11, 0x1234 is stored as "\x12\x34", and
0x12345678 is stored as "\x56\x78\x12\x34". It's
- anyones guess what 0x123456 would be stored like. */
+ anyone's guess what 0x123456 would be stored like. */
switch (nbytes)
{
con[2] = value & 0xff;
con[3] = (value >> 8) & 0xff;
break;
+ case 8:
+ con[0] = (value >> 48) & 0xff;
+ con[1] = (value >> 56) & 0xff;
+ con[2] = (value >> 32) & 0xff;
+ con[3] = (value >> 40) & 0xff;
+ con[4] = (value >> 16) & 0xff;
+ con[5] = (value >> 24) & 0xff;
+ con[6] = value & 0xff;
+ con[7] = (value >> 8) & 0xff;
+ break;
default:
BAD_CASE (nbytes);
}
switch (fixP->fx_r_type)
{
+ case BFD_RELOC_8:
+ mask = 0xff;
+ shift = 0;
+ break;
case BFD_RELOC_16:
case BFD_RELOC_16_PCREL:
mask = 0xffff;
shift = 0;
break;
+ case BFD_RELOC_32:
+ mask = 0xffffffff;
+ shift = 0;
+ break;
case BFD_RELOC_PDP11_DISP_8_PCREL:
mask = 0x00ff;
shift = 1;
}
long
-md_chars_to_number (con, nbytes)
- unsigned char con[]; /* Low order byte 1st. */
- int nbytes; /* Number of bytes in the input. */
+md_chars_to_number (unsigned char *con, int nbytes)
{
/* On a PDP-11, 0x1234 is stored as "\x12\x34", and
0x12345678 is stored as "\x56\x78\x12\x34". It's
- anyones guess what 0x123456 would be stored like. */
+ anyone's guess what 0x123456 would be stored like. */
switch (nbytes)
{
case 0:
return str;
}
+ if (ISALNUM (*str) || *str == '_' || *str == '.')
+ {
+ operand->error = _("Bad register name");
+ str -= 2;
+ }
+
return str;
}
if (*str == '@' || *str == '*')
{
- str = parse_op_no_deferred (str + 1, operand);
+ /* @(Rn) == @0(Rn): Mode 7, Indexed deferred.
+ Check for auto-increment deferred. */
+ if (str[1] == '('
+ && str[2] != 0
+ && str[3] != 0
+ && str[4] != 0
+ && str[5] != '+')
+ {
+ /* Change implied to explicit index deferred. */
+ *str = '0';
+ str = parse_op_no_deferred (str, operand);
+ }
+ else
+ {
+ /* @Rn == (Rn): Register deferred. */
+ str = parse_reg (str + 1, operand);
+
+ /* Not @Rn */
+ if (operand->error)
+ {
+ operand->error = NULL;
+ str = parse_op_no_deferred (str, operand);
+ }
+ }
+
if (operand->error)
return str;
+
operand->code |= 010;
}
else
struct pdp11_code insn, op1, op2;
int error;
int size;
- char *err = NULL;
+ const char *err = NULL;
char *str;
char *p;
char c;
c = *p;
*p = '\0';
- op = (struct pdp11_opcode *)hash_find (insn_hash, str);
+ op = (struct pdp11_opcode *)str_hash_find (insn_hash, str);
*p = c;
if (op == 0)
{
{
case PDP11_OPCODE_NO_OPS:
str = skip_whitespace (str);
- if (*str == 0)
- str = "";
break;
case PDP11_OPCODE_IMM3:
}
static int
-set_cpu_model (char *arg)
+set_cpu_model (const char *arg)
{
char buf[4];
char *model = buf;
}
static int
-set_machine_model (char *arg)
+set_machine_model (const char *arg)
{
if (strncmp (arg, "pdp-11/", 7) != 0
&& strncmp (arg, "pdp11/", 6) != 0
See if it's a processor-specific option. */
int
-md_parse_option (int c, char *arg)
+md_parse_option (int c, const char *arg)
{
init_defaults ();
{
fprintf (stream, "\
\n\
-PDP-11 instruction set extentions:\n\
+PDP-11 instruction set extensions:\n\
\n\
--m(no-)cis allow (disallow) commersial instruction set\n\
+-m(no-)cis allow (disallow) commercial instruction set\n\
-m(no-)csm allow (disallow) CSM instruction\n\
-m(no-)eis allow (disallow) full extended instruction set\n\
-m(no-)fis allow (disallow) KEV11 floating-point instructions\n\
-m(no-)ucode allow (disallow) microcode instructions\n\
-mall-extensions allow all instruction set extensions\n\
(this is the default)\n\
--mno-extentions disallow all instruction set extensions\n\
--pic generate position-indepenent code\n\
+-mno-extensions disallow all instruction set extensions\n\
+-pic generate position-independent code\n\
\n\
PDP-11 CPU model options:\n\
\n\
arelent *reloc;
bfd_reloc_code_real_type code;
- reloc = xmalloc (sizeof (* reloc));
+ reloc = XNEW (arelent);
- reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
/* This is taken account for in md_apply_fix(). */
reloc->addend = -symbol_get_bfdsym (fixp->fx_addsy)->section->vma;
- switch (fixp->fx_r_type)
+ code = fixp->fx_r_type;
+ if (fixp->fx_pcrel)
{
- case BFD_RELOC_16:
- if (fixp->fx_pcrel)
- code = BFD_RELOC_16_PCREL;
- else
- code = BFD_RELOC_16;
- break;
+ switch (code)
+ {
+ case BFD_RELOC_16:
+ code = BFD_RELOC_16_PCREL;
+ break;
- case BFD_RELOC_16_PCREL:
- code = BFD_RELOC_16_PCREL;
- break;
+ case BFD_RELOC_16_PCREL:
+ break;
- default:
- BAD_CASE (fixp->fx_r_type);
- return NULL;
+ default:
+ BAD_CASE (code);
+ return NULL;
+ }
}
reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
record_alignment (now_seg, alignment);
}
-char *
+const char *
md_atof (int type, char * litP, int * sizeP)
{
return vax_md_atof (type, litP, sizeP);