@code{cortex-a78ae},
@code{cortex-a78c},
@code{cortex-a510},
+@code{cortex-a710},
@code{ares},
@code{exynos-m1},
@code{falkor},
@code{xgene1}
@code{xgene2},
@code{cortex-r82},
+@code{cortex-x1},
and
-@code{cortex-x1}.
+@code{cortex-x2}.
The special name @code{all} may be used to allow the assembler to accept
instructions valid for any supported processor, including all optional
extensions.
@item @code{sm4} @tab ARMv8.2-A @tab No
@tab Enable the ARMv8.2-A SM3 and SM4 cryptographic extensions. This implies
@code{fp} and @code{simd}.
+@item @code{sme} @tab Armv9-A @tab No
+ @tab Enable SME Extension.
+@item @code{sme-f64} @tab Armv9-A @tab No
+ @tab Enable SME F64 Extension.
+@item @code{sme-i64} @tab Armv9-A @tab No
+ @tab Enable SME I64 Extension.
@item @code{ssbs} @tab ARMv8-A @tab ARMv8.5-A or later
@tab Enable Speculative Store Bypassing Safe state read and write.
@item @code{sve} @tab ARMv8.2-A @tab Armv9-A or later