This implies @code{fp16}.
@item @code{sb} @tab ARMv8-A @tab ARMv8.5-A or later
@tab Enable the speculation barrier instruction sb.
+@item @code{predres} @tab ARMv8-A @tab ARMv8.5-A or later
+ @tab Enable the Execution and Data and Prediction instructions.
+@item @code{rng} @tab ARMv8.5-A @tab No
+ @tab Enable ARMv8.5-A random number instructions.
+@item @code{ssbs} @tab ARMv8-A @tab ARMv8.5-A or later
+ @tab Enable Speculative Store Bypassing Safe state read and write.
+@item @code{memtag} @tab ARMv8.5-A @tab No
+ @tab Enable ARMv8.5-A Memory Tagging Extensions.
@end multitable
@node AArch64 Syntax
@c YYYYYYYYYYYYYYYYYYYYYYYYYY
@c ZZZZZZZZZZZZZZZZZZZZZZZZZZ
+@cindex @code{.cfi_b_key_frame} directive, AArch64
+@item @code{.cfi_b_key_frame}
+The @code{.cfi_b_key_frame} directive inserts a 'B' character into the CIE
+corresponding to the current frame's FDE, meaning that its return address has
+been signed with the B-key. If two frames are signed with differing keys then
+they will not share the same CIE. This information is intended to be used by
+the stack unwinder in order to properly authenticate return addresses.
+
@end table
@node AArch64 Opcodes