[AArch64] Add ARMv8.3 pointer authentication key registers

[binutils-gdb.git] / gas / testsuite / gas / aarch64 / advsimd-fp16.s

diff --git a/gas/testsuite/gas/aarch64/advsimd-fp16.s b/gas/testsuite/gas/aarch64/advsimd-fp16.s
index ebdb97af422b563d1c65d385a5e90fba8beace4b..6b86ded00c1ae836de6732ab579012d01fd367dc 100644 (file)
--- a/gas/testsuite/gas/aarch64/advsimd-fp16.s
+++ b/gas/testsuite/gas/aarch64/advsimd-fp16.s
@@ -165,6 +165,9 @@
        \op     v1.4h, v2.4h, v3.h[0]
        \op     v0.8h, v0.8h, v0.h[0]
        \op     v1.8h, v2.8h, v3.h[0]
+       \op     v1.2d, v5.2d, v10.d[0]
+       \op     v8.2s, v0.2s, v11.s[3]
+       \op     v0.4h, v9.4h, v15.h[7]
        .endm
 
        indexed_elem fmla
@@ -172,3 +175,89 @@
 
        indexed_elem fmul
        indexed_elem fmulx
+
+       /* Scalar indexed element.  */
+
+       .macro sindexed_elem, op
+       \op     d1, d2, v3.d[1]
+       \op     s1, s2, v3.s[1]
+       \op     h1, h2, v3.h[1]
+       \op     h0, h0, v0.h[0]
+       .endm
+
+       sindexed_elem fmla
+       sindexed_elem fmls
+
+       sindexed_elem fmul
+       sindexed_elem fmulx
+
+       /* Adv.SIMD across lanes.  */
+
+       .macro across_lanes, op
+       \op     s1, v2.4s
+       \op     h1, v2.4h
+       \op     h1, v2.8h
+       \op     h0, v0.4h
+       \op     h0, v0.8h
+       .endm
+
+       across_lanes fmaxnmv
+       across_lanes fmaxv
+       across_lanes fminnmv
+       across_lanes fminv
+
+       /* Adv.SIMD modified immediate.  */
+
+       fmov    v1.2d, #2.0
+       fmov    v1.2s, #2.0
+       fmov    v1.4s, #2.0
+       fmov    v1.4h, #2.0
+       fmov    v1.8h, #2.0
+       fmov    v0.4h, #1.0
+       fmov    v0.8h, #1.0
+
+       /* Adv.SIMD scalar pairwise.  */
+
+       .macro scalar_pairwise, op
+       \op     d1, v2.2d
+       \op     s1, v2.2s
+       \op     h1, v2.2h
+       \op     h0, v0.2h
+       .endm
+
+       scalar_pairwise fmaxnmp
+       scalar_pairwise faddp
+       scalar_pairwise fmaxp
+       scalar_pairwise fminnmp
+       scalar_pairwise fminp
+
+       /* Adv.SIMD shift by immediate.  */
+
+       .macro shift_imm, op
+       \op v1.2d, v2.2d, #3
+       \op v1.2s, v2.2s, #3
+       \op v1.4s, v2.4s, #3
+       \op v1.4h, v2.4h, #3
+       \op v1.8h, v2.8h, #3
+       \op v0.4h, v0.4h, #1
+       \op v0.8h, v0.8h, #1
+       .endm
+
+       shift_imm scvtf
+       shift_imm fcvtzs
+       shift_imm ucvtf
+       shift_imm fcvtzu
+
+       /* Adv.SIMD scalar shift by immediate.  */
+
+       .macro sshift_imm, op
+       \op d1, d2, #3
+       \op s1, s2, #3
+       \op h1, h2, #3
+       \op h0, h0, #1
+       .endm
+
+       sshift_imm scvtf
+       sshift_imm fcvtzs
+       sshift_imm ucvtf
+       sshift_imm fcvtzu