Set default values for stack-clash and do basic validation in back-end.
[gcc.git] / gcc / ChangeLog
index 29f52fd39d3b7e1a9f5a670feaad764216c6b808..0eafc63fb697651a0fa3fce47d499500cb2b3c4a 100644 (file)
@@ -1,3 +1,157 @@
+2018-10-01  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/86486
+       * config/aarch64/aarch64.c (aarch64_override_options_internal):
+       Add validation for stack-clash parameters and set defaults.
+
+2018-10-01  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/86486
+       * configure.ac: Add stack-clash-protection-guard-size.
+       * doc/install.texi: Document it.
+       * config.in (DEFAULT_STK_CLASH_GUARD_SIZE): New.
+       * params.def: Update comment for guard-size.
+       (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE,
+       PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL): Update description.
+       * configure: Regenerate.
+
+2018-10-01  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/86486
+       * config/aarch64/aarch64.h (STACK_CLASH_MIN_BYTES_OUTGOING_ARGS,
+       STACK_DYNAMIC_OFFSET): New.
+       * config/aarch64/aarch64.c (aarch64_layout_frame):
+       Update outgoing args size.
+       (aarch64_stack_clash_protection_alloca_probe_range,
+       TARGET_STACK_CLASH_PROTECTION_ALLOCA_PROBE_RANGE): New.
+
+2018-10-01  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/86486
+       * explow.c (anti_adjust_stack_and_probe_stack_clash): Support custom
+       probe ranges.
+       * target.def (stack_clash_protection_alloca_probe_range): New.
+       (stack_clash_protection_final_dynamic_probe): Remove.
+       * targhooks.h (default_stack_clash_protection_alloca_probe_range) New.
+       (default_stack_clash_protection_final_dynamic_probe): Remove.
+       * targhooks.c: Likewise.
+       * doc/tm.texi.in (TARGET_STACK_CLASH_PROTECTION_ALLOCA_PROBE_RANGE): New.
+       (TARGET_STACK_CLASH_PROTECTION_FINAL_DYNAMIC_PROBE): Remove.
+       * doc/tm.texi: Regenerate.
+
+2018-10-01  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/86486
+       * config/aarch64/aarch64-protos.h (aarch64_output_probe_sve_stack_clash): New.
+       * config/aarch64/aarch64.c (aarch64_output_probe_sve_stack_clash,
+       aarch64_clamp_to_uimm12_shift): New.
+       (aarch64_allocate_and_probe_stack_space): Add SVE specific section.
+       * config/aarch64/aarch64.md (probe_sve_stack_clash): New.
+
+2018-10-01  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/86486
+       * config/aarch64/aarch64.c (aarch64_layout_frame): Add assert.
+
+2018-10-01  Jeff Law  <law@redhat.com>
+           Richard Sandiford <richard.sandiford@linaro.org>
+           Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/86486
+       * config/aarch64/aarch64.md
+       (probe_stack_range): Add k (SP) constraint.
+       * config/aarch64/aarch64.h (STACK_CLASH_CALLER_GUARD,
+       STACK_CLASH_MAX_UNROLL_PAGES): New.
+       * config/aarch64/aarch64.c (aarch64_output_probe_stack_range): Emit
+       stack probes for stack clash.
+       (aarch64_allocate_and_probe_stack_space): New.
+       (aarch64_expand_prologue): Use it.
+       (aarch64_expand_epilogue): Likewise and update IP regs re-use criteria.
+       (aarch64_sub_sp): Add emit_move_imm optional param.
+
+2018-10-01  MCC CS <deswurstes@users.noreply.github.com>
+
+       PR tree-optimization/87261
+       * match.pd: Remove trailing whitespace.
+       Add (x & y) | ~(x | y) -> ~(x ^ y),
+       (~x | y) ^ (x ^ y) -> x | ~y and (x ^ y) | ~(x | y) -> ~(x & y)
+
+2018-10-01  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * config/arc/arc.md (*add_n): Clean up pattern, update instruction
+       constraints.
+       (ashlsi3_insn): Update instruction constraints.
+       (ashrsi3_insn): Likewise.
+       (rotrsi3): Likewise.
+       (add_shift): Likewise.
+       * config/arc/constraints.md (Csz): New 32 bit constraint. It
+       avoids placing in the limm field small constants which, otherwise,
+       could end into a small instruction.
+
+2018-10-01  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * config/arc/arc.md (maddsidi4_split): Don't use dmac if the
+       destination register is not odd-even.
+       (umaddsidi4_split): Likewise.
+
+2018-10-01  Richard Biener  <rguenther@suse.de>
+
+       * tree-inline.c (expand_call_inline): Store origin of fn
+       in BLOCK_ABSTRACT_ORIGIN for the inline BLOCK.
+       * tree.c (block_ultimate_origin): Simplify and do some
+       checking.
+
+2018-09-30  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/mmx.md (EMMS): New int iterator.
+       (emms): New int attribute.
+       (mmx_<emms>): Macroize insn from *mmx_emms and *mmx_femms using
+       EMMS int iterator.  Explicitly declare clobbers.
+       (mmx_emms): Remove expander.
+       (mmx_femms): Ditto.
+       * config/i386/predicates.md (emms_operation): Remove predicate.
+       (vzeroall_pattern): New predicate.
+       (vzeroupper_pattern): Rename from vzeroupper_operation.
+       * config/i386/i386.c (ix86_avx_u128_mode_after): Use
+       vzeroupper_pattern and vzeroall_pattern predicates.
+
+2018-09-30  Peter Bergner  <bergner@linux.ibm.com>
+
+       PR rtl-optimization/86939
+       * ira-lives.c (make_hard_regno_born): Rename from this...
+       (make_hard_regno_live): ... to this.  Remove update to conflict
+       information.  Update function comment.
+       (make_hard_regno_dead): Add conflict information update.  Update
+       function comment.
+       (make_object_born): Rename from this...
+       (make_object_live): ... to this.  Remove update to conflict information.
+       Update function comment.
+       (make_object_dead):  Add conflict information update.  Update function
+       comment.
+       (mark_pseudo_regno_live): Call make_object_live.
+       (mark_pseudo_regno_subword_live): Likewise.
+       (mark_hard_reg_dead): Update function comment.
+       (mark_hard_reg_live): Call make_hard_regno_live.
+       (process_bb_node_lives): Likewise.
+       * lra-lives.c (make_hard_regno_born): Rename from this...
+       (make_hard_regno_live): ... to this.  Remove update to conflict
+       information.  Remove now uneeded check_pic_pseudo_p argument.
+       Update function comment.
+       (make_hard_regno_dead): Add check_pic_pseudo_p argument and add update
+       to conflict information.  Update function comment.
+       (mark_pseudo_live): Remove update to conflict information.  Update
+       function comment.
+       (mark_pseudo_dead): Add conflict information update.
+       (mark_regno_live): Call make_hard_regno_live.
+       (mark_regno_dead): Call make_hard_regno_dead with new arguement.
+       (process_bb_lives): Call make_hard_regno_live and make_hard_regno_dead.
+
+2018-09-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/87370
+       * config/i386/i386.c (construct_container): Use TImode for
+       BLKmode values in 2 integer registers.
+
 2018-09-29  Jeff Law  <law@redhat.com>
 
        * builtins.c (unterminated_array): Pass in c_strlen_data * to
        * configure: Regenerate.
 
 2018-09-28  Eric Botcazou  <ebotcazou@adacore.com>
-            Pierre-Marie de Rodat  <derodat@adacore.com>
+           Pierre-Marie de Rodat  <derodat@adacore.com>
 
        * calls.c (expand_call): Try to do a tail call for thunks at -O0 too.
        * cgraph.h (struct cgraph_thunk_info): Add indirect_offset.
        to subblocks.
 
 2018-09-27  Andrew Stubbs  <ams@codesourcery.com>
-            Tom de Vries  <tom@codesourcery.com>
+           Tom de Vries  <tom@codesourcery.com>
 
        PR 82089
 
 2018-09-25  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 
        PR c/87387
-        * builtins.c (unterminated_array): Simplify.
+       * builtins.c (unterminated_array): Simplify.
        * expr.c (string_constant): Handle SSA_NAME.  Add more exceptions
        where pointer arithmetic is safe.
 
 
        * genattrtab.c (mk_attr_alt): Use alternative_mask.
        (attr_rtx_1): Adjust caching to match the new EQ_ATTR_ALT field
-        types.
+       types.
        (check_attr_test): Use alternative_mask.
        (get_attr_value): Likewise.
        (compute_alternative_mask): Use alternative_mask and XWINT.
        (attr_alt_intersection): Use alternative_mask and XWINT.
        (attr_alt_union): Likewise.
        (attr_alt_complement): Use HOST_WIDE_INT and XWINT.
-        (mk_attr_alt): Use alternative_mask and HOST_WIDE_INT.
+       (mk_attr_alt): Use alternative_mask and HOST_WIDE_INT.
        (simplify_test_exp): Use alternative_mask and XWINT.
        (write_test_expr): Use alternative_mask and XWINT, adjust bit
-        number calculation to support 64 bits.  Generate code that
-        checks 64-bit masks.
+       number calculation to support 64 bits.  Generate code that
+       checks 64-bit masks.
        (main): Use alternative_mask.
        * rtl.def (EQ_ATTR_ALT): Change field types from ii to ww.
 
 2018-09-23   Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.c (regclass_map): Declare integer REX registers
-        as GENERAL_REGS.
+       as GENERAL_REGS.
 
 2018-09-23  Gerald Pfeifer  <gerald@pfeifer.com>
 
        * config.gcc: Prepend vxworks-dummy.h to tm_file for powerpc*
 
 2018-09-21  Shaokun Zhang  <zhangshaokun@hisilicon.com>
-            Bo Zhou  <zbo.zhou@hisilicon.com>
+           Bo Zhou  <zbo.zhou@hisilicon.com>
 
        * config/aarch64/aarch64-cores.def (tsv110): New CPU.
        * config/aarch64/aarch64-tune.md: Regenerated.
        * cfgexpand.c (expand_gimple_cond): Likewise.
 
 2018-09-09  Cesar Philippidis  <cesar@codesourcery.com>
-            Julian Brown  <julian@codesourcery.com>
+           Julian Brown  <julian@codesourcery.com>
 
        PR middle-end/86336
        * gimplify.c (gimplify_scan_omp_clauses): Set