+2019-09-10 Christophe Lyon <christophe.lyon@st.com>
+ Mickaël Guêné <mickael.guene@st.com>
+
+ * config/arm/arm.c (arm_fdpic_local_funcdesc_p): New function.
+ (legitimize_pic_address): Enforce binding rules on function
+ pointers in FDPIC mode.
+ (arm_assemble_integer): Likewise.
+
+2019-09-10 Christophe Lyon <christophe.lyon@st.com>
+ Mickaël Guêné <mickael.guene@st.com>
+
+ * config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper.
+ * config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
+ FDPIC.
+
+2019-09-10 Christophe Lyon <christophe.lyon@st.com>
+ Mickaël Guêné <mickael.guene@st.com>
+
+ * ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
+ field.
+
+2019-09-10 Christophe Lyon <christophe.lyon@st.com>
+ Mickaël Guêné <mickael.guene@st.com>
+
+ * config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
+ in FDPIC mode.
+ * config/arm/arm-protos.h (arm_load_function_descriptor): Declare
+ new function.
+ * config/arm/arm.c (arm_option_override): Define pic register to
+ FDPIC_REGNUM.
+ (arm_function_ok_for_sibcall): Disable sibcall optimization if we
+ have no decl or go through PLT.
+ (calculate_pic_address_constant): New function.
+ (legitimize_pic_address): Call calculate_pic_address_constant.
+ (arm_load_pic_register): Handle TARGET_FDPIC.
+ (arm_is_segment_info_known): New function.
+ (arm_pic_static_addr): Add support for FDPIC.
+ (arm_load_function_descriptor): New function.
+ (arm_emit_call_insn): Add support for FDPIC.
+ (arm_assemble_integer): Add support for FDPIC.
+ * config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
+ Define. (FDPIC_REGNUM): New define.
+ * config/arm/arm.md (call): Add support for FDPIC.
+ (call_value): Likewise.
+ (restore_pic_register_after_call): New pattern.
+ (untyped_call): Disable if FDPIC.
+ (untyped_return): Likewise.
+ * config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
+
+2019-09-10 Christophe Lyon <christophe.lyon@st.com>
+ Mickaël Guêné <mickael.guene@st.com>
+
+ * config.gcc: Handle arm*-*-uclinuxfdpiceabi.
+ * config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
+ (SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
+ * config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
+ (CC1_SPEC): Use FDPIC_CC1_SPEC.
+ (MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
+ * config/arm/uclinuxfdpiceabi.h: New file.
+
+2019-09-10 Christophe Lyon <christophe.lyon@st.com>
+
+ * config.gcc: Handle *-*-uclinuxfdpiceabi.
+
+2019-09-10 Christophe Lyon <christophe.lyon@st.com>
+ Mickaël Guêné <mickael.guene@st.com>
+
+ * config/arm/arm.opt: Add -mfdpic option.
+ * doc/invoke.texi: Add documentation for -mfdpic.
+
+2019-09-09 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * expmed.c (extract_bit_field): Update function comment
+ regarding alt_rtl.
+ * expr.c (expand_expr_real): Update function comment
+ regarding alt_rtl.
+ (expand_misaligned_mem_ref): New helper function.
+ (expand_expr_real_2): Use expand_misaligned_mem_ref.
+ Remove duplicate assignment to "base" at case MEM_REF.
+ Remove a shadowed variable "unsignedp" at case VCE.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * regset.h (regs_invalidated_by_call_regset): Delete.
+ (fixed_reg_set_regset): Likewise.
+ * reginfo.c (regs_invalidated_by_call_regset): Likewise.
+ (fixed_reg_set_regset, persistent_obstack): Likewise.
+ (init_reg_sets_1, globalize_reg): Update accordingly.
+ * df.h (df_print_regset, df_print_word_regset): Take a const_bitmap
+ instead of a bitmap.
+ * df-core.c (df_print_regset, df_print_word_regset): Likewise.
+ * df-problems.c (df_rd_local_compute): Use regs_invalidated_by_call
+ instead of regs_invalidated_by_call_regset.
+ (df_lr_confluence_n, df_md_confluence_n): Likewise.
+ * df-scan.c (df_scan_start_dump): Likewise.
+ * dse.c (copy_fixed_regs): Likewise.
+ * config/sh/sh.c (sh_find_equiv_gbr_addr): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * array-traits.h: New file.
+ * coretypes.h (array_traits, bitmap_view): New types.
+ * bitmap.h: Include "array-traits.h"
+ (bitmap_bit_p): Take a const_bitmap instead of a bitmap.
+ (base_bitmap_view, bitmap_view): New classes.
+ * bitmap.c (bitmap_bit_p): Take a const_bitmap instead of a bitmap.
+ * hard-reg-set.h: Include array-traits.h.
+ (array_traits<HARD_REG_SET>): New struct.
+ * regset.h (IOR_REG_SET_HRS): New macro.
+ * loop-iv.c (simplify_using_initial_values): Use IOR_REG_SET_HRS
+ rather than iterating over each hard register.
+ * sched-deps.c (sched_analyze_insn): Likewise.
+ * sel-sched-ir.c (setup_id_implicit_regs): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
+ instead of a HARD_REG_SET *.
+ * ira-build.c (ior_hard_reg_conflicts): Likewise.
+ (ira_build): Update call accordingly.
+ * ira-emit.c (add_range_and_copies_from_move_list): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (HARD_REG_SET::operator==): New function.
+ (HARD_REG_SET::operator!=): Likewise.
+ (hard_reg_set_equal_p): Delete.
+ * cfgcleanup.c (old_insns_match_p): Use == instead of
+ hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p.
+ * ira-color.c (allocno_hard_regs_hasher::equal): Likewise.
+ (add_allocno_hard_regs_to_forest): Likewise.
+ (setup_allocno_available_regs_num): Likewise.
+ * ira.c (setup_pressure_classes): Likewise.
+ (setup_allocno_and_important_classes): Likewise.
+ (setup_reg_class_relations): Likewise.
+ * lra-lives.c (process_bb_lives): Likewise.
+ * reg-stack.c (change_stack, convert_regs_1): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete.
+ * config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
+ Use "|~" instead of IOR_COMPL_HARD_REG_SET.
+ * config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable):
+ Likewise.
+ * ira-build.c (ira_create_object, ira_set_allocno_class): Likewise.
+ * ira.c (setup_reg_renumber): Likewise.
+ * lra-assigns.c (find_hard_regno_for_1): Likewise.
+ * regrename.c (regrename_find_superclass): Likewise.
+ * reload1.c (find_reg): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
+ * caller-save.c (setup_save_areas): Use "&~" instead of
+ AND_COMPL_HARD_REG_SET.
+ (save_call_clobbered_regs): Likewise.
+ * config/epiphany/epiphany.c (epiphany_conditional_register_usage):
+ Likewise.
+ * config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
+ * config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ * config/i386/i386.c (ix86_conditional_register_usage): Likewise.
+ * config/mips/mips.c (mips_class_max_nregs): Likewise.
+ (mips_conditional_register_usage): Likewise.
+ * config/sh/sh.c (output_stack_adjust): Likewise.
+ * ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
+ (setup_profitable_hard_regs): Likewise.
+ (get_conflict_and_start_profitable_regs): Likewise.
+ * ira-conflicts.c (print_allocno_conflicts): Likewise.
+ (ira_build_conflicts): Likewise.
+ * ira-costs.c (restrict_cost_classes): Likewise.
+ (setup_regno_cost_classes_by_aclass): Likewise.
+ * ira-lives.c (process_bb_node_lives): Likewise.
+ * ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
+ (setup_class_subset_and_memory_move_costs, setup_pressure_classes)
+ (setup_allocno_and_important_classes, setup_class_translate_array)
+ (setup_reg_class_relations, setup_prohibited_class_mode_regs):
+ Likewise.
+ * lra-assigns.c (find_hard_regno_for_1): Likewise.
+ * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
+ (process_alt_operands, inherit_in_ebb): Likewise.
+ * lra-eliminations.c (update_reg_eliminate): Likewise.
+ * lra-lives.c (process_bb_lives): Likewise.
+ * reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
+ * resource.c (find_dead_or_set_registers): Likewise.
+ (mark_target_live_regs): Likewise.
+ * sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
+ * sel-sched.c (mark_unavailable_hard_regs): Likewise.
+ (implicit_clobber_conflict_p): Likewise.
+ * shrink-wrap.c (requires_stack_frame_p): Likewise.
+ (try_shrink_wrapping): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (HARD_REG_SET::operator|): New function.
+ (HARD_REG_SET::operator|=): Likewise.
+ (IOR_HARD_REG_SET): Delete.
+ * config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of
+ IOR_HARD_REG_SET.
+ * config/m32c/m32c.c (m32c_register_move_cost): Likewise.
+ * config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise.
+ * final.c (collect_fn_hard_reg_usage): Likewise.
+ * hw-doloop.c (scan_loop, optimize_loop): Likewise.
+ * ira-build.c (merge_hard_reg_conflicts): Likewise.
+ (ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info)
+ (propagate_some_info_from_allocno): Likewise.
+ (copy_info_to_removed_store_destinations): Likewise.
+ * ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg)
+ (allocno_reload_assign, ira_reassign_pseudos): Likewise.
+ (fast_allocation): Likewise.
+ * ira-conflicts.c (ira_build_conflicts): Likewise.
+ * ira-lives.c (make_object_dead, process_single_reg_class_operands)
+ (process_bb_node_lives): Likewise.
+ * ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise.
+ * lra-assigns.c (find_hard_regno_for_1): Likewise.
+ (setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
+ * lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise.
+ * lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise.
+ * lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls)
+ (process_bb_lives): Likewise.
+ * lra-spills.c (assign_spill_hard_regs): Likewise.
+ * postreload.c (reload_combine): Likewise.
+ * reginfo.c (init_reg_sets_1): Likewise.
+ * regrename.c (merge_overlapping_regs, find_rename_reg)
+ (merge_chains): Likewise.
+ * reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg)
+ (find_reload_regs, finish_spills, choose_reload_regs_init)
+ (emit_reload_insns): Likewise.
+ * reorg.c (redundant_insn): Likewise.
+ * resource.c (find_dead_or_set_registers, mark_set_resources)
+ (mark_target_live_regs): Likewise.
+ * rtlanal.c (find_all_hard_reg_sets): Likewise.
+ * sched-deps.c (sched_analyze_insn): Likewise.
+ * sel-sched.c (mark_unavailable_hard_regs): Likewise.
+ (find_best_reg_for_expr): Likewise.
+ * shrink-wrap.c (try_shrink_wrapping): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (HARD_REG_SET::operator&): New function.
+ (HARD_REG_SET::operator&): Likewise.
+ (AND_HARD_REG_SET): Delete.
+ * caller-save.c (setup_save_areas): Use "&" instead of
+ AND_HARD_REG_SET.
+ (save_call_clobbered_regs): Likewise.
+ * config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ * config/m32c/m32c.c (reduce_class): Likewise.
+ * config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
+ * final.c (get_call_reg_set_usage): Likewise.
+ * ira-color.c (add_allocno_hard_regs_to_forest): Likewise.
+ (setup_left_conflict_sizes_p): Likewise.
+ * ira-conflicts.c (print_allocno_conflicts): Likewise.
+ (ira_build_conflicts): Likewise.
+ * ira-costs.c (restrict_cost_classes): Likewise.
+ * ira.c (setup_stack_reg_pressure_class, setup_class_translate_array)
+ (setup_reg_class_relations): Likewise.
+ * reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise.
+ * reload1.c (maybe_fix_stack_asms, finish_spills): Likewise.
+ * resource.c (find_dead_or_set_registers): Likewise.
+ * sel-sched.c (mark_unavailable_hard_regs): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (HARD_REG_SET::operator~): New function.
+ (COMPL_HARD_REG_SET): Delete.
+ * config/c6x/c6x.c (c6x_call_saved_register_used): Use ~ instead
+ of COMPL_HARD_REG_SET.
+ (try_rename_operands): Likewise.
+ * config/sh/sh.c (push_regs): Likewise.
+ * lra-assigns.c (find_hard_regno_for_1): Likewise.
+ * lra-constraints.c (contains_reg_p): Likewise.
+ * reload1.c (finish_spills, choose_reload_regs_init): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (COPY_HARD_REG_SET): Delete.
+ * caller-save.c (save_call_clobbered_regs): Use assignment instead
+ of COPY_HARD_REG_SET.
+ * config/epiphany/epiphany.c (epiphany_compute_frame_size): Likewise.
+ (epiphany_conditional_register_usage): Likewise.
+ * config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
+ * config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ * config/ia64/ia64.c (ia64_compute_frame_size): Likewise.
+ * config/m32c/m32c.c (m32c_register_move_cost): Likewise.
+ * config/m68k/m68k.c (m68k_conditional_register_usage): Likewise.
+ * config/mips/mips.c (mips_class_max_nregs): Likewise.
+ * config/pdp11/pdp11.c (pdp11_conditional_register_usage): Likewise.
+ * config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
+ * config/sh/sh.c (output_stack_adjust): Likewise.
+ * final.c (collect_fn_hard_reg_usage): Likewise.
+ (get_call_reg_set_usage): Likewise.
+ * ira-build.c (ira_create_object, remove_low_level_allocnos)
+ (ira_flattening): Likewise.
+ * ira-color.c (add_allocno_hard_regs, add_allocno_hard_regs_to_forest)
+ (setup_left_conflict_sizes_p, setup_profitable_hard_regs)
+ (get_conflict_and_start_profitable_regs, allocno_reload_assign)
+ (ira_reassign_pseudos): Likewise.
+ * ira-conflicts.c (print_allocno_conflicts): Likewise.
+ (ira_build_conflicts): Likewise.
+ * ira-costs.c (restrict_cost_classes): Likewise.
+ (setup_regno_cost_classes_by_aclass): Likewise.
+ * ira.c (setup_class_hard_regs, setup_alloc_regs): Likewise.
+ (setup_reg_subclasses, setup_class_subset_and_memory_move_costs)
+ (setup_stack_reg_pressure_class, setup_pressure_classes)
+ (setup_allocno_and_important_classes, setup_class_translate_array)
+ (setup_reg_class_relations, setup_prohibited_class_mode_regs)
+ (ira_setup_eliminable_regset): Likewise.
+ * lra-assigns.c (find_hard_regno_for_1): Likewise.
+ (setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
+ * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
+ (process_alt_operands, inherit_in_ebb): Likewise.
+ * lra-lives.c (process_bb_lives): Likewise.
+ * lra-spills.c (assign_spill_hard_regs): Likewise.
+ * lra.c (lra): Likewise.
+ * mode-switching.c (new_seginfo): Likewise.
+ * postreload.c (reload_combine): Likewise.
+ * reg-stack.c (straighten_stack): Likewise.
+ * reginfo.c (save_register_info, restore_register_info): Likewise.
+ (init_reg_sets_1, record_subregs_of_mode): Likewise
+ * regrename.c (create_new_chain, rename_chains): Likewise.
+ * reload1.c (order_regs_for_reload, find_reg): Likewise.
+ (find_reload_regs): Likewise.
+ * resource.c (find_dead_or_set_registers): Likewise.
+ (mark_target_live_regs): Likewise.
+ * sel-sched.c (mark_unavailable_hard_regs): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * rtl.h (CALL_INSN_FUNCTION_USAGE): Document what SETs mean.
+ (note_pattern_stores): Declare.
+ (note_stores): Take an rtx_insn *.
+ * rtlanal.c (set_of): Use note_pattern_stores instead of note_stores.
+ (find_all_hard_reg_sets): Pass the insn rather than its pattern to
+ note_stores. Remove explicit handling of CALL_INSN_FUNCTION_USAGE.
+ (note_stores): Take an rtx_insn * as argument and process
+ CALL_INSN_FUNCTION_USAGE. Rename old function to...
+ (note_pattern_stores): ...this.
+ (find_first_parameter_load): Pass the insn rather than
+ its pattern to note_stores.
+ * alias.c (memory_modified_in_insn_p, init_alias_analysis): Likewise.
+ * caller-save.c (setup_save_areas, save_call_clobbered_regs)
+ (insert_one_insn): Likewise.
+ * combine.c (combine_instructions): Likewise.
+ (likely_spilled_retval_p): Likewise.
+ (try_combine): Use note_pattern_stores instead of note_stores.
+ (record_dead_and_set_regs): Pass the insn rather than its pattern
+ to note_stores.
+ (reg_dead_at_p): Likewise.
+ * config/bfin/bfin.c (workaround_speculation): Likewise.
+ * config/c6x/c6x.c (maybe_clobber_cond): Likewise. Take an rtx_insn *
+ rather than an rtx.
+ * config/frv/frv.c (frv_registers_update): Use note_pattern_stores
+ instead of note_stores.
+ (frv_optimize_membar_local): Pass the insn rather than its pattern
+ to note_stores.
+ * config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ * config/i386/i386.c (ix86_avx_u128_mode_after): Likewise.
+ * config/mips/mips.c (vr4130_true_reg_dependence_p): Likewise.
+ (r10k_needs_protection_p, mips_sim_issue_insn): Likewise.
+ (mips_reorg_process_insns): Likewise.
+ * config/s390/s390.c (s390_regs_ever_clobbered): Likewise.
+ * config/sh/sh.c (flow_dependent_p): Likewise. Take rtx_insn *s
+ rather than rtxes.
+ * cse.c (delete_trivially_dead_insns): Pass the insn rather than
+ its pattern to note_stores.
+ * cselib.c (cselib_record_sets): Use note_pattern_stores instead
+ of note_stores.
+ * dce.c (mark_nonreg_stores): Remove the "body" parameter and pass
+ the insn to note_stores.
+ (prescan_insns_for_dce): Update call accordingly.
+ * ddg.c (mem_write_insn_p): Pass the insn rather than its pattern
+ to note_stores.
+ * df-problems.c (can_move_insns_across): Likewise.
+ * dse.c (emit_inc_dec_insn_before, replace_read): Likewise.
+ * function.c (assign_parm_setup_reg): Likewise.
+ * gcse-common.c (record_last_mem_set_info_common): Likewise.
+ * gcse.c (load_killed_in_block_p, compute_hash_table_work): Likewise.
+ (single_set_gcse): Likewise.
+ * ira.c (validate_equiv_mem): Likewise.
+ (update_equiv_regs): Use note_pattern_stores rather than note_stores
+ for no_equiv.
+ * loop-doloop.c (doloop_optimize): Pass the insn rather than its
+ pattern to note_stores.
+ * loop-invariant.c (calculate_loop_reg_pressure): Likewise.
+ * loop-iv.c (simplify_using_initial_values): Likewise.
+ * mode-switching.c (optimize_mode_switching): Likewise.
+ * optabs.c (emit_libcall_block_1): Likewise.
+ (expand_atomic_compare_and_swap): Likewise.
+ * postreload-gcse.c (load_killed_in_block_p): Likewise.
+ (record_opr_changes): Likewise. Remove explicit handling of
+ CALL_INSN_FUNCTION_USAGE.
+ * postreload.c (reload_combine, reload_cse_move2add): Likewise.
+ * regcprop.c (kill_clobbered_values): Likewise.
+ (copyprop_hardreg_forward_1): Pass the insn rather than its pattern
+ to note_stores.
+ * regrename.c (build_def_use): Likewise.
+ * reload1.c (reload): Use note_pattern_stores instead of note_stores
+ for mark_not_eliminable.
+ (reload_as_needed): Pass the insn rather than its pattern
+ to note_stores.
+ (emit_output_reload_insns): Likewise.
+ * resource.c (mark_target_live_regs): Likewise.
+ * sched-deps.c (init_insn_reg_pressure_info): Likewise.
+ * sched-rgn.c (sets_likely_spilled): Use note_pattern_stores
+ instead of note_stores.
+ * shrink-wrap.c (try_shrink_wrapping): Pass the insn rather than
+ its pattern to note_stores.
+ * stack-ptr-mod.c (pass_stack_ptr_mod::execute): Likewise.
+ * var-tracking.c (adjust_insn, add_with_sets): Likewise.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
+ than a #define. Use a structure rather than an array as the
+ fallback definition. Remove special cases for low array sizes.
+ (const_hard_reg_set): New typedef.
+ (hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
+ (hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
+ (hard_reg_set_empty_p): Likewise.
+ (SET_HARD_REG_BIT): Use a function rather than a macro to
+ handle the case in which HARD_REG_SET is a structure.
+ (CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
+ (SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
+ (AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
+ (IOR_COMPL_HARD_REG_SET): Likewise.
+ (hard_reg_set_iterator::pset): Constify the pointer target.
+ (hard_reg_set_iter_init): Take a const_hard_reg_set instead
+ of a "const HARD_REG_SET". Update the handling of non-integer
+ HARD_REG_SETs.
+ * recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
+ * reload.h: Likewise.
+ * rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
+ * regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
+ of a "const HARD_REG_SET".
+ (overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
+ (range_in_hard_reg_set_p): Likewise.
+ * ira-costs.c (restrict_cost_classes): Likewise.
+ * shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
+ * config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
+ Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
+ * config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
+ use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
+ (rws_insn_set, rws_insn_test): In the CHECKING_P version,
+ take an unsigned int and open-code the HARD_REG_SET operations.
+
+2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
+
+ * Makefile.in (OBJS): Remove bt-load.o.
+ * doc/invoke.texi (fbranch-target-load-optimize): Delete.
+ (fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
+ * common.opt (fbranch-target-load-optimize): Mark as Ignore and
+ document that the option no longer does anything.
+ (fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
+ * target.def (branch_target_register_class): Delete.
+ (branch_target_register_callee_saved): Likewise.
+ * doc/tm.texi.in (TARGET_BRANCH_TARGET_REGISTER_CLASS): Likewise.
+ (TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise.
+ * doc/tm.texi: Regenerate.
+ * tree-pass.h (make_pass_branch_target_load_optimize1): Delete.
+ (make_pass_branch_target_load_optimize2): Likewise.
+ * passes.def (pass_branch_target_load_optimize1): Likewise.
+ (pass_branch_target_load_optimize2): Likewise.
+ * targhooks.h (default_branch_target_register_class): Likewise.
+ * targhooks.c (default_branch_target_register_class): Likewise.
+ * opt-suggestions.c (test_completion_valid_options): Remove
+ -fbtr-bb-exclusive from the list of test options.
+ * bt-load.c: Remove.
+
+2019-09-09 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * match.pd: Add flag_unsafe_math_optimizations check
+ before deciding on the widest type in a binary math operation.
+
+2019-09-09 Martin Liska <mliska@suse.cz>
+
+ * config/i386/i386.opt: Update comment of removed
+ options that are preserved only for backward
+ compatibility.
+
+2019-09-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/87853
+ * config/i386/emmintrin.h (_mm_cmpeq_epi8): Use casts to __v16qi
+ instead of __v16qs.
+
+ PR target/91704
+ * config/i386/avxintrin.h (__v32qs): New typedef.
+ * config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
+ instead of __v32qi.
+
+2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * doc/invoke.texi (Option Summary): Cover eBPF.
+ (eBPF Options): New section.
+ * doc/extend.texi (BPF Built-in Functions): Likewise.
+ (BPF Kernel Helpers): Likewise.
+
+2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config.gcc: Support for bpf-*-* targets.
+ * common/config/bpf/bpf-common.c: New file.
+ * config/bpf/t-bpf: Likewise.
+ * config/bpf/predicates.md: Likewise.
+ * config/bpf/constraints.md: Likewise.
+ * config/bpf/bpf.opt: Likewise.
+ * config/bpf/bpf.md: Likewise.
+ * config/bpf/bpf.h: Likewise.
+ * config/bpf/bpf.c: Likewise.
+ * config/bpf/bpf-protos.h: Likewise.
+ * config/bpf/bpf-opts.h: Likewise.
+ * config/bpf/bpf-helpers.h: Likewise.
+ * config/bpf/bpf-helpers.def: Likewise.
+
+2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * doc/sourcebuild.texi (Effective-Target Keywords): Document
+ indirect_calls.
+
+2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * opt-functions.awk (integer_range_info): Make sure values are in
+ numeric context before operating with them.
+
+2019-09-08 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * genemit.c (gen_split): Print the filename and line number where the
+ splitter (or peephole2) was defined, to the dump file.
+
+2019-09-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/91665
+ * tree-vect-loop.c (vectorizable_reduction): Punt if base has type
+ incompatible with the type of PHI result.
+
+2019-09-07 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR target/91684
+ * config/arm/arm.c (arm_block_set_aligned_non_vect): Use
+ gen_unaligned_storedi for 4-byte aligned addresses.
+
+2019-09-06 Jim Wilson <jimw@sifive.com>
+
+ * config/riscv/riscv.c (riscv_option_override): Revert 2019-08-30
+ change.
+
+2019-09-06 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.md (unspec): Delete UNSPEC_MV_CR_OV.
+
+2019-09-06 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.c (rs6000_rtx_costs) <case UNSPEC>: Delete.
+ * config/rs6000/rs6000.md (unspec): Delete UNSPEC_FRSP.
+
+2019-09-06 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/91654
+ * config/i386/x86-tune-costs.h (skylake_cost): Raise the
+ cost of SSE->integer and integer->SSE moves from 2 to 6.
+ (core_cost): Ditto.
+
+2019-09-06 Jakub Jelinek <jakub@redhat.com>
+
+ * function.c (assign_parm_find_data_types): Use RECORD_OR_UNION_TYPE_P
+ before testing TYPE_TRANSPARENT_AGGR.
+ * calls.c (initialize_argument_information, load_register_parameters):
+ Likewise.
+
+2019-09-06 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/arm.md (cmp_and): Add short-it variant for thumb2 with
+ high regs.
+ (cmp_ior): Likewise.
+
+2019-09-06 Martin Liska <mliska@suse.cz>
+
+ * doc/match-and-simplify.texi: Separate tuples with ;.
+
+2019-09-06 Martin Liska <mliska@suse.cz>
+
+ PR c++/91125
+ * Makefile.in: Remove tlink.o.
+ * collect2.c (do_link): New function isolated
+ from do_tlink.
+ (main): Use.
+ * collect2.h (do_tlink): Remove declaration of do_tlink.
+ * doc/extend.texi: Remove documentation of -frepo.
+ * doc/invoke.texi: Likewise.
+ * doc/sourcebuild.texi: Remove cleanup-repo-files.
+ * tlink.c: Remove.
+
+2019-09-05 Jakub Jelinek <jakub@redhat.com>
+ Jim Wilson <jimw@sifive.com>
+
+ PR target/91635
+ * config/riscv/riscv.md (zero_extendsidi2, zero_extendhi<GPR:mode>2,
+ extend<SHORT:mode><SUPERQI:mode>2): Don't split if
+ paradoxical_subreg_p (operands[0]).
+ (*lshrsi3_zero_extend_3+1, *lshrsi3_zero_extend_3+2): Add clobber and
+ use as intermediate value.
+
+2019-09-05 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn.md (*movti_insn): Set delayeduse for global_store.
+ (sync_compare_and_swap<mode>_insn): Likewise.
+
+2019-09-05 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR middle-end/91615
+ * expr.c (expand_expr_real_1): Handle misaligned TARGET_MEM_REF
+ without movmisalign optab.
+
+2019-09-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/91001
+ PR middle-end/91105
+ PR middle-end/91106
+ * calls.c (load_register_parameters): For TYPE_TRANSPARENT_AGGR
+ types, use type of their first field instead of type of
+ args[i].tree_value.
+
+2019-09-05 Richard Biener <rguenther@suse.de>
+
+ PR rtl-optimization/91656
+ * postreload-gcse.c (record_last_mem_set_info): Revert addition
+ of early out.
+
2019-09-05 Richard Biener <rguenther@suse.de>
PR middle-end/90501
projects / gcc.git / blobdiff