+2016-10-20 Michael Matz <matz@suse.de>
+
+ Loop splitting.
+ * common.opt (-fsplit-loops): New flag.
+ * passes.def (pass_loop_split): Add.
+ * opts.c (default_options_table): Add OPT_fsplit_loops entry at -O3.
+ (enable_fdo_optimizations): Add loop splitting.
+ * timevar.def (TV_LOOP_SPLIT): Add.
+ * tree-pass.h (make_pass_loop_split): Declare.
+ * tree-ssa-loop-manip.h (rewrite_into_loop_closed_ssa_1): Declare.
+ * tree-ssa-loop-unswitch.c: Include tree-ssa-loop-manip.h,
+ * tree-ssa-loop-split.c: New file.
+ * Makefile.in (OBJS): Add tree-ssa-loop-split.o.
+ * doc/invoke.texi (fsplit-loops): Document.
+ * doc/passes.texi (Loop optimization): Add paragraph about loop
+ splitting.
+
+2016-10-20 Richard Biener <rguenther@suse.de>
+
+ * cgraphunit.c (analyze_functions): Set node->definition to
+ false to signal symbol removal to debug_hooks->late_global_decl.
+ * ipa.c (symbol_table::remove_unreachable_nodes): When not in
+ WPA signal symbol removal to the debuginfo machinery.
+ * dwarf2out.c (dwarf2out_late_global_decl): Instead of
+ using early_finised to guard the we're called for symbol
+ removal case look at the symtabs definition flag.
+ (gen_variable_die): Remove redundant check.
+
+2016-10-20 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/s390.md ("prefetch"): Add fallthrough comment.
+
+2016-10-20 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR tree-optimization/53979
+ * match.pd ((a ^ b) | a -> a | b): New pattern.
+
+2016-10-19 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa64-hpux.h (PA_INIT_FRAME_DUMMY_ASM_OP): Move to
+ config/pa/pa64-hpux-lib.h.
+ (PA_CRTBEGIN_HACK): Likewise.
+ (DTOR_LIST_BEGIN): Likewise.
+
+2016-10-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * config/arm/arm.c (arm_emit_coreregs_64bit_shift): Clear the result
+ register only if "in" and "out" are different registers.
+
+2016-10-19 Eric Botcazou <ebotcazou@adacore.com>
+
+ * omp-low.c (pass_oacc_device_lower::gate): New method.
+ (execute): Always call execute_oacc_device_lower.
+
+2016-10-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ PR tree-optimization/77916
+ PR tree-optimization/77937
+ * gimple-ssa-strength-reduction.c (analyze_increments): Remove
+ stopgap fix.
+ (insert_initializers): Requirement of initializer for -1 should be
+ based on pointer-typedness of the candidate basis.
+
+2016-10-19 Bin Cheng <bin.cheng@arm.com>
+
+ PR tree-optimization/78005
+ * tree-vect-loop-manip.c (vect_gen_prolog_loop_niters): Compute
+ upper (included) bound for niters of prolog loop.
+ (vect_gen_scalar_loop_niters): Change parameter VF to VFM1.
+ Compute niters of scalar loop above which vectorized loop is
+ preferred, as well as the upper (included) bound for the niters.
+ (vect_do_peeling): Record niter bound for loops accordingly.
+
+2016-10-19 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR lto/77458
+ * tree-core.h (enum tree_index): Put the complex types after their
+ component types.
+ * tree-streamer.c (verify_common_node_recorded): New function.
+ (preload_common_nodes) <TREE_CODE (node) == COMPLEX_TYPE>: Use it.
+
+2016-10-19 Martin Liska <mliska@suse.cz>
+
+ * cgraph.h (cgraph_edge::binds_to_current_def_p):
+ Replace NULL with false as a return value.
+
+2016-10-19 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR tree-optimization/78024
+ * omp-low.c (oacc_loop_discovery): Call clear_bb_flags before, and
+ don't clear BB_VISITED after processing.
+
+2016-10-19 Richard Biener <rguenther@suse.de>
+
+ * domwalk.c (dom_walker::walk): Use RPO order.
+
+2016-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vrp.c (evrp_dom_walker::evrp_dom_walker): Initialize
+ stmts_to_remove.
+ (evrp_dom_walker::~evrp_dom_walker): Free it.
+ (evrp_dom_walker::stmts_to_remove): Add.
+ (evrp_dom_walker::before_dom_children): Mark PHIs and stmts
+ whose output we fully propagate for removal. Propagate
+ into BB destination PHI arguments.
+ (execute_early_vrp): Remove queued stmts. Dump value ranges
+ before stmt removal.
+
+2016-10-18 Aldy Hernandez <aldyh@redhat.com>
+
+ * Makefile.in (OBJS): Add gimple-ssa-warn-alloca.o.
+ * passes.def: Add two instances of pass_walloca.
+ * tree-pass.h (make_pass_walloca): New.
+ * gimple-ssa-warn-alloca.c: New file.
+ * doc/invoke.texi: Document -Walloca, -Walloca-larger-than=, and
+ -Wvla-larger-than= options.
+
+2016-10-18 Thomas Schwinge <thomas@codesourcery.com>
+
+ * cfg.c (clear_bb_flags): Use FOR_ALL_BB_FN.
+ * config/nvptx/nvptx.c (nvptx_find_sese): Likewise.
+
+2016-10-18 Kelvin Nilsen <kelvin@gcc.gnu.org>
+
+ * config/rs6000/altivec.h (vec_xl_len): New macro.
+ (vec_xst_len): New macro.
+ (vec_cmpnez): New macro.
+ (vec_cntlz_lsbb): New macro.
+ (vec_cnttz_lsbb): New macro.
+ (vec_xlx): New macro.
+ (vec_xrx): New macro.
+ (vec_all_nez): New C++ predicate template.
+ (vec_any_eqz): New C++ predicate template.
+ (vec_all_ne): Revised C++ predicate template under _ARCH_PWR9
+ conditional compilation.
+ (vec_any_eq): Revised C++ predicate template under _ARCH_PWR9
+ conditional compilation.
+ (vec_all_nez): New macro.
+ (vec_any_eqz): New macro.
+ (vec_all_ne): Revised macro under _ARCH_PWR9 conditional
+ compilation.
+ (vec_any_eq): Revised macro under _ARCH_PWR9 conditional
+ compilation.
+ * config/rs6000/vector.md (VI): Moved this mode iterator
+ definition from altivec.md to vector.md.
+ (UNSPEC_NEZ_P): New value.
+ (vector_ne_<mode>_p): New expansion for implementation of
+ vec_all_ne and vec_any_eq built-in functions.
+ (vector_nez_<mode>_p): New expansion for implementation of
+ vec_all_nez and vec_any_eqz built-in functions.
+ (vector_ne_v2di_p): New expansion for implementation of vec_all_ne
+ and vec_any_eq built-in function.
+ (cr6_test_for_zero): New commentary to explain this expansion.
+ (cr6_test_for_zero_reverse): New commentary to explain this expansion.
+ (cr6_test_for_lt): New commentary to explain this expansion.
+ (cr6_test_for_lt_reverse): New commentary to explain this
+ expansion.
+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
+ overloaded function prototypes for vec_all_ne, vec_all_nez,
+ vec_any_eq, vec_any_eqz, vec_cmpnez, vec_cntlz_lsbb,
+ vec_cnttz_lsbb, vec_xl_len, vec_xst_len, vec_xlx, and vec_xrx
+ built-in functions.
+ (altivec_resolve_overloaded_builtin): Modify the handling of
+ ALTIVEC_BUILTIN_VEC_CMPNE to use the Power9 instructions when
+ the compiler is configured to support TARGET_P9_VECTOR.
+ * config/rs6000/rs6000-builtin.def (BU_ALTIVEC_P): Add commentary
+ to explain the special processing that is given to predicate
+ built-ins introduced using this macro.
+ (BU_ALTIVEC_OVERLOAD_P): Add commentary to alert maintainers to
+ the special processing given to predicate built-ins introduced
+ using this macro.
+ (BU_VSX_P): Likewise.
+ (BU_P8V_AV_P): Likewise.
+ (BU_P9V_AV_P): Likewise.
+ (BU_P9V_AV_X): New macro.
+ (BU_P9V_64BIT_AV_X): New macro.
+ (BU_P9V_VSX_3): New macro.
+ (BU_P9V_OVERLOAD_P): New macro.
+ (LXVL): New BU_P9V_64BIT_VSX_2.
+ (VEXTUBLX): New BU_P9V_AV_2.
+ (VEXTUBRX): Likewise.
+ (VEXTUHLX): Likewise.
+ (VEXTUHRX): Likewise.
+ (VEXTUWLX): Likewise.
+ (VEXTUWRX): Likewise.
+ (STXVL): New BU_P9V_64BIT_AV_X.
+ (VCLZLSBB): New BU_P9V_AV_1.
+ (VCTZLSBB): Likewise.
+ (CMPNEB): New BU_P9V_AV_2.
+ (CMPNEH): Likewise.
+ (CMPNEW): Likewise.
+ (CMPNEF): Likewise.
+ (CMPNED): Likewise.
+ (VCMPNEB_P): New BU_P9V_AV_P.
+ (VCMPNEH_P): Likewise.
+ (VCMPNEW_P): Likewise.
+ (VCMPNED_P): Likewise.
+ (VCMPNEFP_P): Likewise.
+ (VCMPNEDP_P): Likewise.
+ (CMPNEZB): New BU_P9V_AV_2.
+ (CMPNEZH): Likewise.
+ (CMPNEZW): Likewise.
+ (VCMPNEZB_P): New BU_P9V_AV_P.
+ (VCMPNEZH_P): Likewise.
+ (VCMPNEZW_P): Likewise.
+ (LXVL): New BU_P9V_OVERLOAD_2.
+ (STXVL): New BU_P9V_OVERLOAD_3.
+ (VEXTULX): New BU_P9V_OVERLOAD_2.
+ (VEXTURX): Likewise.
+ (CMPNEZ): Likewise.
+ (VCMPNEZ_P): New BU_P9V_OVERLOAD_P.
+ (VCMPNE_P): Likewise.
+ (VCLZLSBB): New BU_P9V_OVERLOAD_1.
+ (VCTZLSBB): Likewise.
+ * config/rs6000/rs6000.c (altivec_expand_predicate_builtin): Add
+ comment to explain mode used for scratch register.
+ (altivec_expand_stxvl_builtin): New function.
+ (altivec_expand_builtin): Add case for new constant P9V_BUILTIN_STXVL.
+ (altivec_init_builtins): Add initialized variable
+ void_ftype_v16qi_pvoid_long and use this type to define the
+ built-in function __builtin_altivec_stxvl.
+ * config/rs6000/vsx.md (UNSPEC_LXVL): New value.
+ (UNSPEC_STXVL): New value.
+ (UNSPEC_VCLZLSBB): New value.
+ (UNSPEC_VCTZLSBB): New value.
+ (UNSPEC_VEXTUBLX): New value.
+ (UNSPEC_VEXTUHLX): New value.
+ (UNSPEC_VEXTUWLX): New value.
+ (UNSPEC_VEXTUBRX): New value.
+ (UNSPEC_VEXTUHRX): New value.
+ (UNSPEC_VEXTUWRX): New value.
+ (UNSPEC_VCMPNEB): New value.
+ (UNSPEC_VCMPNEZB): New value.
+ (UNSPEC_VCMPNEH): New value.
+ (UNSPEC_VCMPNEZH): New value.
+ (UNSPEC_VCMPNEW): New value.
+ (UNSPEC_VCMPNEZW): New value.
+ (*vsx_ne_<mode>_p): New insn for vector test all not equal with
+ vector of integer modes.
+ (*vsx_ne_<mode>_p): New insn for vector test all not equal with
+ vector of float or double modes.
+ (*vector_nez_<mode>_p): New insn for vector test all not equal or
+ zero.
+ (lxvl): New expand for load VSX vector with length.
+ (*lxvl): New insn for load VSX vector with length.
+ (stxvl): New expand for store VSX vector with length.
+ (*stxvl): New insn for store VSX vector with length.
+ (vcmpneb): New insn for vector of byte compare not equal.
+ (vcmpnezb): New insn for vector of byte compare not equal or zero.
+ (vcmpneh): New insn for vector of half word compare not equal.
+ (vcmpnezh): New insn for vector of half word compare not equal or
+ zero.
+ (vcmpnew): New insn for vector of word compare not equal.
+ (vcmpne<VSs>): New insn for vector of float or double compare not
+ equal.
+ (vcmpnezw): New insn for vector of word compare not equal or zero.
+ (vclzlsbb): New insn for vector count leading zero
+ least-significant bits byte.
+ (vctzlsbb): New insn for vector count trailing zero least
+ signficant bits byte.
+ (vextublx): New insn for vector extract unsigned byte left
+ indexed.
+ (vextubrx): New insn for vector extract unsigned byte right
+ indexed.
+ (vextuhlx): New insn for vector extract unsigned half word left
+ indexed.
+ (vextuhrx): New insn for vector extract unsigned half word right
+ indexed.
+ (vextuwlx): New insn for vector extract unsigned word left
+ indexed.
+ (vextuwrx): New insn for vector extract unsigned word right
+ indexed.
+ * config/rs6000/rs6000.h (RS6000_BTC_CONST): Enhance comment to
+ clarify intent of this constant.
+ * config/rs6000/altivec.md (VI): Move this mode iterator to vsx.md.
+ * doc/extend.texi (PowerPC Altivec Built-in Functions): Add
+ documentation for vec_all_nez, vec_any_eqz, vec_cmpnez,
+ vec_cntlz_lsbb, vec_cnttz_lsbb, vec_xl_len, vec_xst_len, vec_xlx,
+ and vec_xrx functions.
+
+2016-10-18 Andrew Pinski <apinski@cavium.com>
+
+ PR tree-opt/65950
+ * predict.c (is_exit_with_zero_arg): New function.
+ (tree_bb_level_predictions): Don't consider paths leading to exit(0)
+ as nottaken.
+
+2016-10-18 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/77991
+ * config/i386/i386.c (legitimize_tls_address)
+ <case TLS_MODEL_INITIAL_EXEC>: For TARGET_64BIT || TARGET_ANY_GNU_TLS
+ convert dest to Pmode if different than Pmode.
+
+2016-10-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ PR tree-optimization/77916
+ * gimple-ssa-strength-reduction.c (analyze_increments): Reinstate
+ stopgap fix, as pointers with -1 increment are still broken.
+
2016-10-18 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.c (rs6000_output_symbol_ref): Move storage
(vect_can_advance_ivs_p): Call iv_phi_p.
(vect_update_ivs_after_vectorizer): Call iv_phi_p. Directly insert
new gimple stmts in basic block.
- (vect_do_peeling_for_loop_bound):
- (vect_do_peeling_for_alignment):
(vect_gen_niters_for_prolog_loop): Rename to...
(vect_gen_prolog_loop_niters): ...Rename from. Change parameters and
adjust implementation.
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