+2011-09-26 Bingfeng Mei <bmei@broadcom.com>
+ * doc/tm.texi: Correct documentation for TARGET_ADDR_SPACE_SUBSET_P.
+ * target.def: (addr_space_subset_p): Likewise.
+
+2011-09-26 Tom de Vries <tom@codesourcery.com>
+
+ * tree-ssa-alias.h (pt_solution_singleton_p): Declare.
+ * tree-ssa-structalias.c (pt_solution_singleton_p): New function.
+ * tree-ssa-ccp.c (fold_builtin_alloca_for_var): Set points-to solution
+ of new var.
+
+2011-09-26 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50465
+ * config/avr/avr-protos.h (output_reload_insisf): Don't pass insn.
+ * config/avr/avr.md (*reload_insi, *reload_insf): Change call to
+ output_reload_insisf.
+ (adjust_len): Set default to "no".
+ Remove alternative "yes". Add alternatives: "mov8", "mov16",
+ "mov32", "ashlqi", "ashrqi", "lshrqi", "ashlhi", "ashrhi",
+ "lshrhi", "ashlsi, "ashrsi", "lshrsi".
+ (*movqi, *movhi, *movsi, *ashlqi3, ashlhi3, ashlsi3,
+ *ashlhi3_const, *ashlsi3_const, ashrqi3, ashrhi3, ashrsi3,
+ *ashrhi3_const, *ashrsi3_const, *lshrqi3, lshrhi3, *lshrhi3_const,
+ *lshrsi3_const): Set attribute "adjust_len".
+ * config/avr/avr.c (output_reload_insisf): Remove parameter "insn".
+ (output_movsisf): Don't pass insn to output_reload_insisf.
+ (adjust_insn_length): Handle new alternatives to adjust_len.
+ Remove handling of ADJUST_LEN_YES. Clean-up code.
+
+2011-09-26 Eric Botcazou <ebotcazou@adacore.com>
+
+ * ifcvt.c (noce_try_cmove_arith): Use may_trap_or_fault_p in lieu of
+ may_trap_p to detect loads that may trap of fault.
+
+2011-09-26 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr-protos.h (output_reload_inhi): Change prototype.
+ * config/avr/avr.md (adjust_len): Add "reload_in16" alternative.
+ (*reload_inhi): Use it. Adapt call to output_reload_inhi to new
+ prototype.
+ (*movhi): Split constraint alternative "r,rL" into "r,r" and "r,L".
+ * config/avr/avr.c: Rename output_reload_insisf_1 to
+ output_reload_in_const.
+ (avr_popcount_each_byte): Handle SFmode, too.
+ (output_reload_in_const): Change so it can handle HI loads, too.
+ Use avr_popcount_each_byte to work out if scratch register must be
+ created on the fly.
+ (output_reload_inhi): Rewrite using output_reload_in_const and...
+ (output_movhi): ...use it to print constants' loads.
+ (adjust_insn_length): New case ADJUST_LEN_RELOAD_IN16. Cleanup code.
+
+2011-09-25 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/constraints.md (C, P, Z): New constraints for
+ const_doube, const_int, and const_vector "all ones" values.
+ Make unused constraint letters comment match reality.
+ * config/sparc/predicates.md (const_all_ones_operand,
+ register_or_zero_or_all_ones_operand): New predicates.
+ * config/sparc/sparc.c (sparc_expand_move): Allow all ones
+ as well as zero constants when VIS.
+ (sparc_legitimate_constant_p): Likewise.
+ * config/sparc/sparc.md (movsi_insn): Add fones alternative.
+ (movsf_insn): Likewise
+ (movdi_insn_sp64): Add fone alternative.
+ (movdf_insn_sp32_v9): Likewise.
+ (movdf_insn_sp64): Likewise.
+
+ * configure.ac: Add feature check to make sure the assembler
+ supports the FMAF, HPC, and VIS 3.0 instructions found on
+ Niagara-3 and later cpus.
+ * configure: Rebuild.
+ * config.in: Likewise.
+ * config/sparc/sparc.opt: New option '-mfmaf'.
+ * config/sparc/sparc.md: Add float fused multiply-add patterns.
+ * config/sparc/sparc.h (AS_NIAGARA3_FLAG): New macro.
+ (ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Use it, as needed.
+ * config/sparc/sol2.h (ASM_CPU32_DEFAULT_SPEC,
+ ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Likewise.
+ * config/sparc/sparc.c (sparc_option_override): Turn MASK_FMAF on
+ by default for Niagara-3 and later. Turn it off if TARGET_FPU is
+ disabled.
+ (sparc_rtx_costs): Handle 'FMA'.
+ * doc/invoke.texi: Document -mfmaf.
+
+2011-09-25 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-ssa-structalias.c (intra_create_variable_infos): Treat
+ TYPE_RESTRICT REFERENCE_TYPE parameters like restricted
+ DECL_BY_REFERENCE parameters.
+
+2011-09-25 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-eh.c (cleanup_empty_eh): Allow a call to __builtin_stack_restore
+ if there is no outgoing edge.
+
+ * tree-scalar-evolution.c (simple_iv): Accept all kinds of pointer and
+ integral types.
+
+2011-09-25 Ira Rosen <ira.rosen@linaro.org>
+
+ * tree-vect-slp.c (vect_slp_analyze_bb_1): Split out core part
+ of vect_analyze_bb here.
+ (vect_analyze_bb): Loop over vector sizes calling vect_analyze_bb_1.
+
+2011-09-25 Ira Rosen <ira.rosen@linaro.org>
+
+ * tree-data-ref.c (dr_analyze_innermost): Add new argument.
+ Allow not simple iv if analyzing basic block.
+ (create_data_ref): Update call to dr_analyze_innermost.
+ (stmt_with_adjacent_zero_store_dr_p, ref_base_address): Likewise.
+ * tree-loop-distribution.c (generate_memset_zero): Likewise.
+ * tree-predcom.c (find_looparound_phi): Likewise.
+ * tree-data-ref.h (dr_analyze_innermost): Add new argument.
+
+2011-09-24 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.h (FIRST_PSEUDO_REGISTER): Bump to 103.
+ (SPARC_GSR_REG): Define.
+ (FIXED_REGISTERS): Mark GSR as fixed.
+ (CALL_USED_REGISTERS): Mark GSR as call used.
+ (HARD_REGNO_NREGS): GSR is always 1 register.
+ (REG_CLASS_CONTENTS): Add GSR to ALL_REGS.
+ (REG_ALLOC_ORDER, REG_LEAF_ALLOC_ORDER): Add GSR to the end.
+ (REGISTER_NAMES): Add "%gsr".
+ * config/sparc/sparc.md (UNSPEC_ALIGNADDR, UNSPEC_ALIGNADDRL):
+ Delete.
+ (UNSPEC_WRGSR): New unspec.
+ (GSR_REG): New constant.
+ (type): Add new insn type 'gsr'.
+ (fpack16_vis, fpackfix_vis, fpack32_vis,
+ faligndata<V64I:MODE>_vis)): Add use of GSR_REG.
+ (wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus, rdgsr_vis, *rdgsr_sp64,
+ rdgsr_v8plus): New expanders and insns.
+ (alignaddr<P:mode>_vis, alignaddrl<P:mode>_vis): Reimplement
+ using patterns which show that this is a plus in addition to a
+ modification of GSR_REG, instead of an unspec.
+ * config/sparc/ultra1_2.md: Handle 'gsr'.
+ * config/sparc/ultra3.md: Likewise.
+ * config/sparc/niagara.md: Likewise.
+ * config/sparc/niagara2.md: Likewise.
+ * config/sparc/sparc.c (leaf_reg_remap, sparc_leaf_regs): Fill out
+ end of table.
+ (sparc_option_override): Make -mvis imply -mv8plus.
+ (hard_32bit_mode_classes, hard_64bit_mode_classes): Add entries
+ for %gsr.
+ (sparc_vis_init_builtins): Build __builtin_vis_write_gsr and
+ __builtin_vis_read_gsr.
+ (sparc_expand_buildin): Handle builtins that take one argument and
+ return void.
+ (sparc_fold_builtin): Never fold writes to %gsr.
+ * config/sparc/visintrin.h (__vis_write_gsr, __vis_read_gsr): New.
+ * doc/extend.texi: Document new VIS intrinsics.
+
+2011-09-23 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-transform.c (inline_call): Add comment.
+ * ipa-inline.h (inline_param_summary): New structure and vector.
+ (struct inline_edge_summary): Add param field.
+ * ipa-inline-analysis.c (CHANGED): New constant.
+ (add_clause): Handle CHANGED and NOT_CONSTANT.
+ (predicate_probability): New function.
+ (dump_condition): Dump CHANGED predicate.
+ (evaluate_conditions_for_known_args): Handle ERROR_MARK as marker
+ of unknown function wide invariant.
+ (evaluate_conditions_for_edge): Handle change probabilities.
+ (inline_edge_duplication_hook): Copy param summaries.
+ (inline_edge_removal_hook): Free param summaries.
+ (dump_inline_edge_summary): Fix dumping of indirect edges and callee sizes;
+ dump param summaries.
+ (will_be_nonconstant_predicate): Use CHANGED predicate.
+ (record_modified_bb_info): New structure.
+ (record_modified): New function.
+ (param_change_prob): New function.
+ (estimate_function_body_sizes): Compute param summaries.
+ (estimate_edge_size_and_time): Add probability argument.
+ (estimate_node_size_and_time): Add inline_param_summary argument;
+ handle predicate probabilities.
+ (remap_predicate): Fix formating.
+ (remap_edge_change_prob): New function.
+ (remap_edge_summaries): Rename from ...; use remap_edge_change_prob.
+ (remap_edge_predicates): ... this one.
+ (inline_merge_summary): Remap edge summaries; handle predicate probabilities;
+ remove param summaries after we are done.
+ (do_estimate_edge_time): Update.
+ (do_estimate_edge_growth): Update.
+ (read_inline_edge_summary): Read param info.
+ (inline_read_summary): Fix formating.
+ (write_inline_edge_summary): Write param summaries.
+
+2011-09-23 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.c (ix86_print_operand): Handle %~.
+ (ix86_print_operand_punct_valid_p): Return true also for '~'.
+ * config/i386/sse.md (i128): New mode_attr.
+ (vec_extract_hi_<mode>, vec_extract_hi_<mode>,
+ avx_vbroadcastf128_<mode>, *avx_vperm2f128<mode>_full,
+ *avx_vperm2f128<mode>_nozero, vec_set_lo_<mode>,
+ vec_set_hi_<mode>, *vec_concat<mode>_avx): Use <i128> in the
+ patterns, use "<sseinsnmode>" for "mode" attribute.
+ (vec_extract_hi_v16hi, vec_extract_hi_v32qi, vec_set_lo_v16hi,
+ vec_set_hi_v16hi, vec_set_lo_v32qi, vec_set_hi_v32qi): Use
+ %~128 in the patterns, use "OI" for "mode" attribute.
+
+2011-09-23 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50447
+ * config/avr/avr.md (adjust_len): Add alternatives "tsthi",
+ "tstsi", "compare".
+ (*cmpqi_sign_extend): Use s8_operand.
+ (*cmphi, *cmpsi): Rewrite using avr_out_compare.
+ * config/avr/avr-protos.h (compare_diff_p, compare_eq_p): Remove
+ prototypes.
+ (out_tsthi, out_tstsi): Remove prototypes.
+ (avr_out_tsthi, avr_out_tstsi): New prototypes.
+ * config/avr/avr.c (out_tsthi, out_tstsi): Remove functions.
+ (avr_asm_len): Negative length now sets *plen to -length.
+ (compare_sign_p): Return bool instead of int.
+ (compare_diff_p, compare_eq_p): Ditto and make static.
+ (avr_out_tsthi): New function.
+ (avr_out_tstsi): New function.
+ (avr_out_compare): New function.
+ (adjust_insn_length): Handle ADJUST_LEN_TSTHI, ADJUST_LEN_TSTSI,
+ ADJUST_LEN_COMPARE.
+
+2011-09-23 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50447
+ * config/avr/avr.md: (adjust_len): Add alternative "out_plus".
+ (addsi3): Rewrite using QI scratch register. Adjust text
+ peepholes using plus:SI.
+ (*addsi3_zero_extend.hi): New insn.
+ (*subsi3_zero_extend.hi): New insn.
+ (*subhi3_zero_extend1): Set attribute "cc" to "set_czn".
+ (*subsi3_zero_extend): Ditto.
+ (subsi3): Change predicate #2 to register_operand.
+ * config/avr/avr-protos.h (avr_out_plus): New prototype.
+ (avr_out_plus_1): New static function.
+ (avr_out_plus): New function.
+ (adjust_insn_length): Handle ADJUST_LEN_OUT_PLUS.
+
+2011-09-23 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.c (ix86_prepare_sse_fp_compare_args): For
+ GE/GT/UNLE/UNLT swap arguments and condition even for TARGET_AVX.
+
+2011-09-23 Ian Lance Taylor <iant@google.com>
+
+ * godump.c (go_define): Treat a single character in single quotes,
+ or a string, as an operand.
+
+2011-09-23 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (jump_func_type): Updated comments.
+ (ipa_known_type_data): New type.
+ (ipa_jump_func): Use it to describe known type jump functions.
+ * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Updated to
+ reflect the new known type jump function contents.
+ (compute_known_type_jump_func): Likewise.
+ (combine_known_type_and_ancestor_jfs): Likewise.
+ (try_make_edge_direct_virtual_call): Likewise.
+ (ipa_write_jump_function): Likewise.
+ (ipa_read_jump_function): Likewise.
+ * ipa-cp.c (ipa_value_from_known_type_jfunc): New function.
+ (ipa_value_from_jfunc): Use ipa_value_from_known_type_jfunc.
+ (propagate_accross_jump_function): Likewise.
+
+2011-09-23 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50446
+ * config/avr/avr.md (rotlqi3): Support all offsets 0..7.
+ (rotlqi3_4): Turn insn into expander.
+ (*rotlqi3): New insn.
+ (rotlhi3, rotlsi3): Support rotate left/right by 1.
+ (*rotlhi2.1, *rotlhi2.15): New insns.
+ (*rotlsi2.1, *rotlsi2.31): New insns.
+ * config/avr/constraints.md (C03, C05, C06, C07): New constraints.
+
+2011-09-23 Bin Cheng <bin.cheng@arm.com>
+
+ * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-m arch
+ and processors.
+
2011-09-22 Maxim Kuvyrkov <maxim@codesourcery.com>
* ipa-prop.c (ipa_print_node_jump_functions): Fix typos.