x86: Don't generate vzeroupper if caller passes AVX/AVX512 registers
[gcc.git] / gcc / ChangeLog
index ae2e85cae6aca343827d2e7fbabadcd21e1d5d20..7b4f6e5270b2603eae870d303bb6a2c56eb1edcd 100644 (file)
@@ -1,3 +1,140 @@
+2019-01-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/88717
+       * config/i386/i386.c (ix86_avx_u128_mode_exit): Call
+       ix86_avx_u128_mode_entry.
+
+2019-01-08  Martin Liska  <mliska@suse.cz>
+
+       PR tree-optimization/88753
+       * tree-switch-conversion.c (switch_conversion::build_one_array):
+       Come up with local variable constructor.  Convert first to
+       type of constructor values.
+
+2019-01-08  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/86554
+       * tree-ssa-sccvn.c (eliminate_dom_walker, rpo_elim,
+       rpo_avail): Move earlier.
+       (visit_nary_op): When value-numbering to expressions
+       with different overflow behavior make sure there's an
+       available expression on the path.
+
+2019-01-08  Sam Tebbs  <sam.tebbs@arm.com>
+
+       * config/aarch64/aarch64.c (BRANCH_PROTECT_STR_MAX,
+       aarch64_parse_branch_protection,
+       struct aarch64_branch_protect_type,
+       aarch64_handle_no_branch_protection,
+       aarch64_handle_standard_branch_protection,
+       aarch64_validate_mbranch_protection,
+       aarch64_handle_pac_ret_protection,
+       aarch64_handle_attr_branch_protection,
+       accepted_branch_protection_string,
+       aarch64_pac_ret_subtypes,
+       aarch64_branch_protect_types,
+       aarch64_handle_pac_ret_leaf): Define.
+       (aarch64_override_options_after_change_1, aarch64_override_options):
+       Add check for accepted_branch_protection_string.
+       (aarch64_option_save): Save accepted_branch_protection_string.
+       (aarch64_option_restore): Save accepted_branch_protection_string.
+       * config/aarch64/aarch64.c (aarch64_attributes): Add branch-protection.
+       * config/aarch64/aarch64.opt: Add mbranch-protection. Deprecate
+       msign-return-address.
+       * doc/invoke.texi: Add mbranch-protection.
+
+2019-01-08  Alan Modra  <amodra@gmail.com>
+
+       PR target/88614
+       * genattrtab.c (max_attr_value, min_attr_value, or_attr_value):
+       Delete "unknownp" parameter.  Adjust callers.  Handle
+       CONST_INT, PLUS, MINUS, and MULT.
+       (attr_value_aligned): Renamed from or_attr_value.
+       (min_attr_value): Return INT_MIN for unhandled rtl case..
+       (min_fn): ..and translate to INT_MAX here.
+       (write_length_unit_log): Modify to cope without "unknown".
+       (write_attr_value): Handle IF_THEN_ELSE.
+
+2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * tree-vect-stmts.c (vectorizable_store): Don't use the dataref_offset
+       optimization for masked stores.
+
+2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR middle-end/88567
+       * tree-vect-loop.c (get_initial_defs_for_reduction): Pass the
+       output vector directly to duplicate_and_interleave instead of
+       going through a temporary.  Postpone insertion of ctor_seq to
+       the end of the loop.
+
+2019-01-07  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/86891
+       * config/aarch64/aarch64.c (aarch64_expand_subvti): New parameter
+       unsigned_p.  Handle signed and unsigned overflow correction as
+       required.
+       * config/aarch64/aarch64-protos.h (aarch64_expand_subvti): Update
+       prototype.
+       * config/aarch64/aarch64.md (addv<mode>4): Use aarch64_plus_operand
+       for operand 2.
+       (add<mode>3_compareV_imm): Make this callable for expanding.
+       (subv<GPI:mode>4): Use register_operand for operand 1.  Use
+       aarch64_plus_operand for operand 2.
+       (subv<GPI:mode>_insn): New insn pattern.
+       (subv<GPI:mode>_imm): Likewise.
+       (negv<GPI:mode>3): New expand pattern.
+       (negv<GPI:mode>_insn): New insn pattern.
+       (negv<GPI:mode>_cmp_only): Likewise.
+       (cmpv<GPI:mode>_insn): Likewise.
+       (subvti4): Use register_operand for operand 1.  Update call to
+       aarch64_expand_subvti.
+       (usubvti4): Likewise.
+       (negvti3): New expand pattern.
+       (negdi_carryout): New insn pattern.
+       (negvdi_carryinV): New insn pattern.
+       (sub<mode3>_compare1_imm): Delete named insn pattern, make anonymous
+       version the named version.
+       (peepholes to convert to sub<mode3>_compare1_imm): Adjust order of
+       operands.
+       (usub<GPI:mode>3_carryinC, usub<GPI:mode>3_carryinC_z1): New insn
+       patterns.
+       (usub<GPI:mode>3_carryinC_z2, usub<GPI:mode>3_carryinC): New insn
+       patterns.
+       (sub<mode>3_carryinCV, sub<mode>3_carryinCV_z1_z2): Delete.
+       (sub<mode>3_carryinCV_z1, sub<mode>3_carryinCV_z2): Delete.
+       (sub<mode>3_carryinCV): Delete.
+       (sub<GPI:mode>3_carryinV): New expand pattern.
+       sub<mode>3_carryinV, sub<mode>3_carryinV_z2): New insn patterns.
+
+2019-01-07  Richard Biener  <rguenther@suse.de>
+
+       * tree-ssa-uncprop.c (ssa_equip_hash_traits): Remove in favor
+       of tree_operand_hash.
+
+2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR tree-optimization/88598
+       * tree.h (single_nonzero_element): Declare.
+       * tree.c (single_nonzero_element): New function.
+       * match.pd: Fold certain reductions of X & CST to X[I] & CST[I]
+       if I is the only nonzero element of CST.
+
+2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR tree-optimization/88598
+       * tree.h (initializer_each_zero_or_onep): Declare.
+       * tree.c (initializer_each_zero_or_onep): New function.
+       (signed_or_unsigned_type_for): Handle float types too.
+       (unsigned_type_for, signed_type_for): Update comments accordingly.
+       * match.pd: Fold x * { 0 or 1, 0 or 1, ...} to
+       x & { 0 or -1, 0 or -1, ... }.
+
+2019-01-07  Jonathan Wakely  <jwakely@redhat.com>
+
+       * doc/install.texi: Replace references to x86_64-unknown-linux-gnu
+       with x86_64-pc-linux-gnu.
+
 2019-01-07  Tom de Vries  <tdevries@suse.de>
 
        PR target/85486