+2017-08-01 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/81181
+ * tree-ssa-pre.c (compute_antic_aux): Defer clean() to ...
+ (compute_antic): ... end of iteration here.
+
+2017-08-01 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * common.opt (ftree-vectorize): No longer set flag_tree_vectorize.
+ (ftree-loop-vectorize): Set as EnabledBy ftree-vectorize.
+ (ftree-slp-vectorize): Likewise.
+ * omp-expand (expand_omp_simd): Remove flag_tree_vectorize, as it
+ can no longer be set independent of flag_tree_loop_vectorize.
+ * omp-general.c (emp_max_vf): Likewise.
+ * opts.c (enable_fdo_optimizations): Remove references to
+ flag_tree_vectorize, these are now implicit.
+ (common_handle_option): Remove handling for OPT_ftree_vectorize,
+ and leave it for the options machinery.
+
+2017-08-01 Martin Liska <mliska@suse.cz>
+
+ PR middle-end/70140
+ * builtins.c (expand_builtin_memcpy_args): Remove.
+ (expand_builtin_memcpy): Call newly added function
+ expand_builtin_memory_copy_args.
+ (expand_builtin_memcpy_with_bounds): Likewise.
+ (expand_builtin_mempcpy): Remove last argument.
+ (expand_builtin_mempcpy_with_bounds): Likewise.
+ (expand_builtin_memory_copy_args): New function created from
+ expand_builtin_mempcpy_args with small modifications.
+ (expand_builtin_mempcpy_args): Remove.
+ (expand_builtin_stpcpy): Remove unused argument.
+ (expand_builtin): Likewise.
+ (expand_builtin_with_bounds): Likewise.
+
+2017-08-01 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/81641
+ * config/i386/i386.c (ix86_print_operand_address_as): For -masm=intel
+ print "ds:" only for immediates in generic address space.
+
+2017-08-01 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/81639
+ * config/i386/i386.c (ix86_funciton_naked): New prototype.
+ (ix86_function_ok_for_sibcall): Return false for naked functions.
+
+2017-08-01 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-pre.c (print_pre_expr): Handle NULL expr.
+ (compute_antic): Seed worklist with exit block predecessors.
+ * cfganal.c (dfs_find_deadend): For a cycle return the source
+ of the edge closing it.
+
+2017-08-01 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64.c
+ (aarch64_can_const_movi_rtx_p): Move 0 check.
+
+2017-08-01 Bin Cheng <bin.cheng@arm.com>
+
+ * tree.h (POINTER_TYPE_OVERFLOW_UNDEFINED): Delete.
+ * fold-const.c (fold_comparison, fold_binary_loc): Delete use of
+ above macro.
+ * match.pd: Ditto in address comparison pattern.
+
+2017-08-01 Bin Cheng <bin.cheng@arm.com>
+
+ PR tree-optimization/81627
+ * tree-predcom.c (prepare_finalizers): Always rewrite into loop
+ closed ssa form for store-store chain.
+
+2017-08-01 Bin Cheng <bin.cheng@arm.com>
+
+ PR tree-optimization/81620
+ * tree-predcom.c (add_ref_to_chain): Don't set has_max_use_after
+ for store-store chain.
+
+2017-08-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/81588
+ * tree-ssa-reassoc.c (optimize_range_tests_var_bound): If
+ ranges[i].in_p, invert comparison code ccode. For >/>=,
+ swap rhs1 and rhs2 and comparison code unconditionally,
+ for </<= don't do that. Don't swap rhs1/rhs2 again if
+ ranges[i].in_p, instead invert comparison code ccode if
+ opcode or oe->rank is BIT_IOR_EXPR.
+
+ PR target/80846
+ * optabs.def (vec_extract_optab, vec_init_optab): Change from
+ a direct optab to conversion optab.
+ * optabs.c (expand_vector_broadcast): Use convert_optab_handler
+ with GET_MODE_INNER as last argument instead of optab_handler.
+ * expmed.c (extract_bit_field_1): Likewise. Use vector from
+ vector extraction if possible and optab is available.
+ * expr.c (store_constructor): Use convert_optab_handler instead
+ of optab_handler. Use vector initialization from smaller
+ vectors if possible and optab is available.
+ * tree-vect-stmts.c (vectorizable_load): Likewise.
+ * doc/md.texi (vec_extract, vec_init): Document that the optabs
+ now have two modes.
+ * config/i386/i386.c (ix86_expand_vector_init): Handle expansion
+ of vec_init from half-sized vectors with the same element mode.
+ * config/i386/sse.md (ssehalfvecmode): Add V4TI case.
+ (ssehalfvecmodelower, ssescalarmodelower): New mode attributes.
+ (reduc_plus_scal_v8df, reduc_plus_scal_v4df, reduc_plus_scal_v2df,
+ reduc_plus_scal_v16sf, reduc_plus_scal_v8sf, reduc_plus_scal_v4sf,
+ reduc_<code>_scal_<mode>, reduc_umin_scal_v8hi): Add element mode
+ after mode in gen_vec_extract* calls.
+ (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><ssescalarmodelower>): ... this.
+ (vec_extract<mode><ssehalfvecmodelower>): New expander.
+ (rotl<mode>3, rotr<mode>3, <shift_insn><mode>3, ashrv2di3): Add
+ element mode after mode in gen_vec_init* calls.
+ (VEC_INIT_HALF_MODE): New mode iterator.
+ (vec_init<mode>): Renamed to ...
+ (vec_init<mode><ssescalarmodelower>): ... this.
+ (vec_init<mode><ssehalfvecmodelower>): New expander.
+ * config/i386/mmx.md (vec_extractv2sf): Renamed to ...
+ (vec_extractv2sfsf): ... this.
+ (vec_initv2sf): Renamed to ...
+ (vec_initv2sfsf): ... this.
+ (vec_extractv2si): Renamed to ...
+ (vec_extractv2sisi): ... this.
+ (vec_initv2si): Renamed to ...
+ (vec_initv2sisi): ... this.
+ (vec_extractv4hi): Renamed to ...
+ (vec_extractv4hihi): ... this.
+ (vec_initv4hi): Renamed to ...
+ (vec_initv4hihi): ... this.
+ (vec_extractv8qi): Renamed to ...
+ (vec_extractv8qiqi): ... this.
+ (vec_initv8qi): Renamed to ...
+ (vec_initv8qiqi): ... this.
+ * config/rs6000/vector.md (VEC_base_l): New mode attribute.
+ (vec_init<mode>): Renamed to ...
+ (vec_init<mode><VEC_base_l>): ... this.
+ (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><VEC_base_l>): ... this.
+ * config/rs6000/paired.md (vec_initv2sf): Renamed to ...
+ (vec_initv2sfsf): ... this.
+ * config/rs6000/altivec.md (splitter, altivec_copysign_v4sf3,
+ vec_unpacku_hi_v16qi, vec_unpacku_hi_v8hi, vec_unpacku_lo_v16qi,
+ vec_unpacku_lo_v8hi, mulv16qi3, altivec_vreve<mode>2): Add
+ element mode after mode in gen_vec_init* calls.
+ * config/aarch64/aarch64-simd.md (vec_init<mode>): Renamed to ...
+ (vec_init<mode><Vel>): ... this.
+ (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><Vel>): ... this.
+ * config/aarch64/iterators.md (Vel): New mode attribute.
+ * config/s390/s390.c (s390_expand_vec_strlen, s390_expand_vec_movstr):
+ Add element mode after mode in gen_vec_extract* calls.
+ * config/s390/vector.md (non_vec_l): New mode attribute.
+ (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><non_vec_l>): ... this.
+ (vec_init<mode>): Renamed to ...
+ (vec_init<mode><non_vec_l>): ... this.
+ * config/s390/s390-builtins.def (s390_vlgvb, s390_vlgvh, s390_vlgvf,
+ s390_vlgvf_flt, s390_vlgvg, s390_vlgvg_dbl): Add element mode after
+ vec_extract mode.
+ * config/arm/iterators.md (V_elem_l): New mode attribute.
+ * config/arm/neon.md (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><V_elem_l>): ... this.
+ (vec_extractv2di): Renamed to ...
+ (vec_extractv2didi): ... this.
+ (vec_init<mode>): Renamed to ...
+ (vec_init<mode><V_elem_l>): ... this.
+ (reduc_plus_scal_<mode>, reduc_plus_scal_v2di, reduc_smin_scal_<mode>,
+ reduc_smax_scal_<mode>, reduc_umin_scal_<mode>,
+ reduc_umax_scal_<mode>, neon_vget_lane<mode>, neon_vget_laneu<mode>):
+ Add element mode after gen_vec_extract* calls.
+ * config/mips/mips-msa.md (vec_init<mode>): Renamed to ...
+ (vec_init<mode><unitmode>): ... this.
+ (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><unitmode>): ... this.
+ * config/mips/loongson.md (vec_init<mode>): Renamed to ...
+ (vec_init<mode><unitmode>): ... this.
+ * config/mips/mips-ps-3d.md (vec_initv2sf): Renamed to ...
+ (vec_initv2sfsf): ... this.
+ (vec_extractv2sf): Renamed to ...
+ (vec_extractv2sfsf): ... this.
+ (reduc_plus_scal_v2sf, reduc_smin_scal_v2sf, reduc_smax_scal_v2sf):
+ Add element mode after gen_vec_extract* calls.
+ * config/mips/mips.md (unitmode): New mode iterator.
+ * config/spu/spu.c (spu_expand_prologue, spu_allocate_stack,
+ spu_builtin_extract): Add element mode after gen_vec_extract* calls.
+ * config/spu/spu.md (inner_l): New mode attribute.
+ (vec_init<mode>): Renamed to ...
+ (vec_init<mode><inner_l>): ... this.
+ (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><inner_l>): ... this.
+ * config/sparc/sparc.md (veltmode): New mode iterator.
+ (vec_init<VMALL:mode>): Renamed to ...
+ (vec_init<VMALL:mode><VMALL:veltmode>): ... this.
+ * config/ia64/vect.md (vec_initv2si): Renamed to ...
+ (vec_initv2sisi): ... this.
+ (vec_initv2sf): Renamed to ...
+ (vec_initv2sfsf): ... this.
+ (vec_extractv2sf): Renamed to ...
+ (vec_extractv2sfsf): ... this.
+ * config/powerpcspe/vector.md (VEC_base_l): New mode attribute.
+ (vec_init<mode>): Renamed to ...
+ (vec_init<mode><VEC_base_l>): ... this.
+ (vec_extract<mode>): Renamed to ...
+ (vec_extract<mode><VEC_base_l>): ... this.
+ * config/powerpcspe/paired.md (vec_initv2sf): Renamed to ...
+ (vec_initv2sfsf): ... this.
+ * config/powerpcspe/altivec.md (splitter, altivec_copysign_v4sf3,
+ vec_unpacku_hi_v16qi, vec_unpacku_hi_v8hi, vec_unpacku_lo_v16qi,
+ vec_unpacku_lo_v8hi, mulv16qi3): Add element mode after mode in
+ gen_vec_init* calls.
+
+2017-08-01 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/81297
+ * tree-vrp.c (get_single_symbol): Remove assert, instead drop
+ TREE_OVERFLOW from INTEGER_CSTs.
+
+2017-07-31 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.c (enum rs6000_reg_type): Delete trailing comma.
+
+2017-07-31 Carl Love <cel@us.ibm.com>
+
+ * config/rs6000/rs6000-c: Add support for built-in functions
+ vector signed char vec_xl_be (signed long long, signed char *);
+ vector unsigned char vec_xl_be (signed long long, unsigned char *);
+ vector signed int vec_xl_be (signed long long, signed int *);
+ vector unsigned int vec_xl_be (signed long long, unsigned int *);
+ vector signed long long vec_xl_be (signed long long, signed long long *);
+ vector unsigned long long vec_xl_be (signed long long, unsigned long long *);
+ vector signed short vec_xl_be (signed long long, signed short *);
+ vector unsigned short vec_xl_be (signed long long, unsigned short *);
+ vector double vec_xl_be (signed long long, double *);
+ vector float vec_xl_be (signed long long, float *);
+ * config/rs6000/altivec.h (vec_xl_be): Add #define.
+ * config/rs6000/rs6000-builtin.def (XL_BE_V16QI, XL_BE_V8HI, XL_BE_V4SI)
+ XL_BE_V2DI, XL_BE_V4SF, XL_BE_V2DF, XL_BE): Add definitions
+ for the builtins.
+ * config/rs6000/rs6000.c (altivec_expand_xl_be_builtin): Add function.
+ (altivec_expand_builtin): Add switch statement to call
+ altivec_expand_xl_be for each builtin.
+ (altivec_init_builtins): Add def_builtin for _builtin_vsx_le_be_v8hi,
+ __builtin_vsx_le_be_v4si, __builtin_vsx_le_be_v2di,
+ __builtin_vsx_le_be_v4sf, __builtin_vsx_le_be_v2df,
+ __builtin_vsx_le_be_v16qi.
+ * doc/extend.texi: Update the built-in documentation file for the
+ new built-in functions.
+
+2017-07-31 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/25967
+ * config/i386/i386.c (ix86_allocate_stack_slots_for_args):
+ New function.
+ (TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): Define.
+
+2017-07-31 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config.gcc: Add z14.
+ * config/s390/driver-native.c (s390_host_detect_local_cpu): Add
+ CPU model numbers for z13s and z14.
+ * config/s390/s390-c.c (s390_resolve_overloaded_builtin): Replace
+ arch12 with z14.
+ * config/s390/s390-opts.h (enum processor_type): Rename
+ PROCESSOR_ARCH12 to PROCESSOR_3906_Z14.
+ * config/s390/s390.c (processor_table): Add field for CPU name to
+ be passed to Binutils.
+ (s390_asm_output_machine_for_arch): Use the new field in
+ processor_table for Binutils.
+ (s390_expand_builtin): Replace arch12 with z14.
+ (s390_issue_rate): Rename PROCESSOR_ARCH12 to PROCESSOR_3906_Z14.
+ (s390_get_sched_attrmask): Likewise.
+ (s390_get_unit_mask): Likewise.
+ * config/s390/s390.opt: Add z14 to processor_type enum.
+
+2017-07-31 Martin Jambor <mjambor@suse.cz>
+
+ PR hsa/81477
+ * ipa-fnsummary.c (ipa_fn_summary_generate): Set versionable
+ regardless of optimization level.
+
+2017-07-31 Jan Hubicka <hubicka@ucw.cz>
+ Martin Liska <mliska@suse.cz>
+
+ * predict.def: Remove old comment and adjust probability.
+ * gimplify.c (should_warn_for_implicit_fallthrough): Ignore
+ PREDICT statements.
+
+2017-07-31 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/25967
+ * config/i386/i386.c (ix86_function_naked): New function.
+ (ix86_can_use_return_insn_p): Return false for naked functions.
+ (ix86_expand_prologue): Skip prologue for naked functions.
+ (ix86_expand_epilogue): Skip epilogue for naked functions
+ and emit trap instruction.
+ (ix86_warn_func_return): New function.
+ (ix86_attribute_table): Add "naked" attribute specification.
+ (TARGET_WARN_FUNC_RETURN): Define.
+ * doc/extend.texi (x86 Function Attributes) <naked>: Document it.
+
+2017-07-31 Martin Liska <mliska@suse.cz>
+
+ * gimple-pretty-print.c (dump_gimple_label): Never dump BB info.
+ (dump_gimple_bb_header): Always dump BB info.
+ (pp_cfg_jump): Do not append info about BB when dumping a jump.
+
+2017-07-31 Martin Liska <mliska@suse.cz>
+
+ PR sanitize/81530
+ * convert.c (convert_to_integer_1): Guard condition with flag_sanitize_p
+ also with current_function_decl non-null equality.
+
+2017-07-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR sanitizer/81604
+ * ubsan.c (ubsan_type_descriptor): For UBSAN_PRINT_ARRAY don't
+ change type to the element type, instead add eltype variable and
+ use it where we are interested in the element type.
+
+ PR tree-optimization/81603
+ * ipa-polymorphic-call.c
+ (ipa_polymorphic_call_context::ipa_polymorphic_call_context): Perform
+ offset arithmetic in offset_int, bail out if the resulting bit offset
+ doesn't fit into shwi.
+
+2017-07-31 Martin Liska <mliska@suse.cz>
+
+ * gimplify.c (mostly_copy_tree_r): Remove Java specific hunk.
+ (gimplify_save_expr): Fix comment.
+
+2017-07-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/79793
+ * config/i386/i386.c (ix86_function_arg): Update arguments for
+ exception handler.
+ (ix86_compute_frame_layout): Set the initial stack offset to
+ INCOMING_FRAME_SP_OFFSET. Update red-zone offset with
+ INCOMING_FRAME_SP_OFFSET.
+ (ix86_expand_epilogue): Don't pop the 'ERROR_CODE' off the
+ stack before exception handler returns.
+ * config/i386/i386.h (INCOMING_FRAME_SP_OFFSET): Add the
+ the 'ERROR_CODE' for exception handler.
+
+2017-07-30 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.h (ASM_PRINTF_EXTENSIONS): New macro.
+ (ASM_OUTPUT_REG_PUSH): Rewrite with new operand modifiers.
+ (ASM_OUTPUT_REG_POP): Ditto.
+ * config/i386/i386.c (ix86_asm_output_function_label): Use fputs
+ instead of asm_fprintf to output pure string.
+
+2017-07-29 Jakub Jelinek <jakub@redhat.com>
+
+ * debug.h (struct gcc_debug_hooks): Add IMPLICIT argument
+ to imported_module_or_decl hook.
+ (debug_nothing_tree_tree_tree_bool): Remove.
+ (debug_nothing_tree_tree_tree_bool_bool): New declaration.
+ * debug.c (do_nothing_debug_hooks): Use
+ debug_nothing_tree_tree_tree_bool_bool instead of
+ debug_nothing_tree_tree_tree_bool.
+ * vmsdbgout.c (vmsdbg_debug_hooks): Likewise.
+ * dbxout.c (dbx_debug_hooks, xcoff_debug_hooks): Likewise.
+ * sdbout.c (sdb_debug_hooks): Likewise.
+ * dwarf2out.c (dwarf2_lineno_debug_hooks): Likewise.
+ (gen_namespace_die): Add DW_AT_export_symbols attribute if
+ langhook wants it.
+ (dwarf2out_imported_module_or_decl): Add IMPLICIT argument,
+ if true, -gdwarf-5 and decl will have DW_AT_export_symbols
+ attribute, don't add anything.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * fold-const.c (fold_build1_stat_loc): Remove _stat from name.
+ (fold_build2_stat_loc): Likewise.
+ (fold_build3_stat_loc): Likewise.
+ * fold-const.h (fold_build1, fold_build2, fold_build3): Adjust.
+ (fold_build1_loc): Remove macro.
+ (fold_build2_loc): Likewise.
+ (fold_build3_loc): Likewise.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * gimple.c (gimple_build_debug_bind_stat): Remove _stat from name.
+ (gimple_build_debug_bind_source_stat): Likewise.
+ * gimple.h (gimple_build_debug_bind): Remove macro.
+ (gimple_build_debug_bind_source): Likewise.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * bitmap.c (bitmap_alloc): Adjust.
+ (bitmap_gc_alloc): Likewise.
+ * bitmap.h (bitmap_initialize_stat): Remove _stat from name.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * bitmap.c (bitmap_obstack_alloc_stat): Rename to bitmap_alloc.
+ (bitmap_gc_alloc_stat): Rename to bitmap_gc_alloc.
+ * bitmap.h (bitmap_obstack_alloc_stat): Adjust prototype.
+ (bitmap_gc_alloc_stat): Likewise.
+ (BITMAP_ALLOC, BITMAP_GGC_ALLOC): Adjust.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * rtl.c (shallow_copy_rtx_stat): Remove _stat from name.
+ * rtl.h (shallow_copy_rtx): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * emit-rtl.c (gen_raw_REG): Adjust.
+ * gengenrtl.c (gendef): Likewise.
+ * rtl.c (rtx_alloc_stat): Remove _stat from name.
+ * rtl.h (rtx_alloc): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (build_tree_list_vec_stat): Remove _stat from name.
+ (build_tree_list_stat): Likewise.
+ * tree.h (build_tree_list): Remove macro.
+ (build_tree_list_vec): Likewise.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (make_vector_stat): Remove _stat from name.
+ (build_vector_stat): Likewise.
+ * tree.h (make_vector_stat): Remove macro.
+ (build_vector_stat): Likewise.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.h (build_var_debug_value): Remove prototype.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (tree_cons_stat): Remove _stat from name.
+ * tree.h (tree_cons): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (build_vl_exp_stat): Remove _stat from name.
+ * tree.h (build_vl_exp): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (build_decl_stat): Remove _stat from name.
+ * tree.h (build_decl): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * gimple.c (gimple_build_with_ops_stat): Adjust.
+ (gimple_alloc_stat): Remove _stat from name.
+ * gimple.h (gimple_alloc): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (make_tree_vec_stat): Remove _stat from name.
+ (grow_tree_vec_stat): Likewise.
+ * tree.h (make_tree_vec_stat): Adjust prototype.
+ (grow_tree_vec_stat): Likewise.
+ (make_tree_vec): Remove macro.
+ (grow_tree_vec): Likewise.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * fold-const.c (fold_build1_stat_loc): Adjust.
+ (fold_build2_stat_loc): Likewise.
+ (fold_build3_stat_loc): Likewise.
+ * tree.c (build0_stat): Remove _stat from name.
+ (build1_stat): Likewise.
+ (build2_stat): Likewise.
+ (build3_stat): Likewise.
+ (build4_stat): Likewise.
+ (build5_stat): Likewise.
+ * tree.h (build1_loc): Remove macro, and rename _stat function
+ to this.
+ (build2_loc): Likewise.
+ (build3_loc): Likewise.
+ (build4_loc): Likewise.
+ (build5_loc): Likewise.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (make_int_cst_stat): Remove _stat from name.
+ * tree.h (make_int_cst_stat): Adjust prototype.
+ (make_int_cst): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (make_tre_binfo_stat): Remove _stat from name.
+ * tree.h (make_tree_binfo_stat): Adjust prototype.
+ (make_tree_binfo): Remove.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (copy_node_stat): Rename to copy_node.
+ (build_distinct_type_copy): Adjust.
+ * tree.h (copy_node_stat): Adjust prototype.
+ (copy_node): Remove macro.
+
+2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * tree.c (make_node_stat): rename to make_node.
+ (build_tree_list_stat): Adjust.
+ (build0_stat): Likewise.
+ (build2_stat): Likewise.
+ (build3_stat): Likewise.
+ (build4_stat): Likewise.
+ (build5_stat): Likewise.
+ (build_decl_stat): Likewise.
+ * tree.h (make_node_stat): Adjust prototype.
+ (make_node): remove macro.
+
+2017-07-28 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config/rs6000/ppc-auxv.h (PPC_FEATURE2_DARN): New define.
+ (PPC_FEATURE2_SCV): Likewise.
+ * config/rs6000/rs6000.c (cpu_supports_info): Use them.
+
+2017-07-28 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64.c
+ (aarch64_internal_mov_immediate): Add new special pattern.
+ * config/aarch64/aarch64.md (*movdi_aarch64):
+ Add reg/32bit const mov case.
+
+2017-07-28 Tamar Christina <tamar.christina@arm.com>
+ Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/aarch64/aarch64.md (mov<mode>): Generalize.
+ (*movhf_aarch64, *movsf_aarch64, *movdf_aarch64):
+ Add integer and movi cases.
+ (movi-split-hf-df-sf split, fp16): New.
+ (enabled): Added TARGET_FP_F16INST.
+ * config/aarch64/iterators.md (GPF_HF): New.
+ * config/aarch64/predicates.md (aarch64_reg_or_fp_float): New.
+
+2017-07-28 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64.c
+ (aarch64_simd_container_mode): Add prototype.
+ (aarch64_expand_mov_immediate): Add HI support.
+ (aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p: New.
+ (aarch64_can_const_movi_rtx_p): New.
+ (aarch64_preferred_reload_class):
+ Remove restrictions of using FP registers for certain SIMD operations.
+ (aarch64_rtx_costs): Added new cost for CONST_DOUBLE moves.
+ (aarch64_valid_floating_const): Add integer move validation.
+ (aarch64_simd_imm_scalar_p): Remove.
+ (aarch64_output_scalar_simd_mov_immediate): Generalize function.
+ (aarch64_legitimate_constant_p): Expand list of supported cases.
+ * config/aarch64/aarch64-protos.h
+ (aarch64_float_const_rtx_p, aarch64_can_const_movi_rtx_p): New.
+ (aarch64_reinterpret_float_as_int): New.
+ (aarch64_simd_imm_scalar_p): Remove.
+ * config/aarch64/constraints.md (Uvi): New.
+ (Dd): Split into Ds and new Dd.
+ * config/aarch64/aarch64.md (*movsi_aarch64):
+ Add SIMD mov case.
+ (*movdi_aarch64): Add SIMD mov case.
+
+2017-07-28 Bin Cheng <bin.cheng@arm.com>
+
+ * tree-predcom.c: (struct chain): Handle store-store chain in which
+ stores for elimination only store loop invariant values.
+ (execute_pred_commoning_chain): Ditto.
+ (prepare_initializers_chain_store_elim): Ditto.
+ (prepare_finalizers): Ditto.
+ (is_inv_store_elimination_chain): New function.
+ (initialize_root_vars_store_elim_1): New function.
+
+2017-07-28 Bin Cheng <bin.cheng@arm.com>
+
+ * tree-predcom.c: Revise general description of the pass.
+ (enum chain_type): New enum type for store elimination.
+ (struct chain): New field supporting store elimination.
+ (struct component): Ditto.
+ (dump_chain): Dump store-stores chain.
+ (release_chain): Release resources.
+ (split_data_refs_to_components): Compute and create component
+ contains only stores for elimination.
+ (get_chain_last_ref_at): New function.
+ (make_invariant_chain): Initialization.
+ (make_rooted_chain): Specify chain type in parameter and record it.
+ (add_looparound_copies): Skip for store-stores chain.
+ (determine_roots_comp): Compute type of chain and pass it to
+ make_rooted_chain.
+ (initialize_root_vars_store_elim_2): New function.
+ (finalize_eliminated_stores): New function.
+ (remove_stmt): Handle store for elimination.
+ (execute_pred_commoning_chain): Execute predictive commoning on
+ store-store chains.
+ (determine_unroll_factor): Skip unroll for store-stores chain.
+ (prepare_initializers_chain_store_elim): New function.
+ (prepare_initializers_chain): Hanlde store-store chain.
+ (prepare_finalizers_chain, prepare_finalizers): New function.
+ (tree_predictive_commoning_loop): Return integer value indicating
+ if loop is unrolled or lcssa form is corrupted.
+ (tree_predictive_commoning): Rewrite for lcssa form if necessary.
+
+2017-07-28 Bin Cheng <bin.cheng@arm.com>
+
+ * tree-predcom.c (initialize_root): Delete.
+ (execute_pred_commoning_chain): Initialize root vars and replace
+ reference of non-combined chain directly, rather than call above
+ function.
+
+2017-07-28 Bin Cheng <bin.cheng@arm.com>
+
+ * tree-predcom.c (ref_at_iteration): Add parameter NITERS. Compute
+ memory reference to DR at (NITERS + ITERS)-th iteration of loop.
+
+2017-07-28 Bin Cheng <bin.cheng@arm.com>
+
+ * tree-predcom.c (struct chain): New field init_seq.
+ (release_chain): Release init_seq.
+ (prepare_initializers_chain): Record intialization stmts in above
+ field.
+ (insert_init_seqs): New function.
+ (tree_predictive_commoning_loop): Call insert_init_seqs.
+
+2017-07-28 Bin Cheng <bin.cheng@arm.com>
+
+ * tree-predcom.c (determine_roots_comp): Skip trivial components.
+
+2017-07-28 Richard Biener <rguenther@suse.de>
+
+ * match.pd: Remove superfluous :c.
+ * genmatch.c (simplify::id): Add member.
+ (lower_commutative, lower_opt_convert, lower_cond, lower_for):
+ Copy id.
+ (current_id): New global.
+ (dt_node::parent): Move from ...
+ (dt_operand::parent): ... here. Add for_id member.
+ (is_a_helper <dt_operand *>::test): DT_TRUE is also a dt_operand.
+ (decision_tree::find_node): Relax order requirement when
+ merging DT_TRUE nodes to ones inbetween the current simplify
+ and the one we try to merge with. Add diagnostic whenever
+ we need to enforce pattern order by not merging.
+ (decision_tree::insert): Set current_id.
+ (decision_tree::print_node): Dump parent node and for_id.
+ (parser::last_id): Add member.
+ (parser::push_simplify): Assign unique id.
+ (parser::parser): Initialize last_id.
+
+2017-07-28 Martin Liska <mliska@suse.cz>
+
+ PR sanitizer/81340
+ * sanopt.c (sanitize_rewrite_addressable_params): Set VALUE_EXPR after
+ gimple_build_debug_bind.
+
+2017-07-28 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/81502
+ * match.pd: Add pattern combining BIT_INSERT_EXPR with
+ BIT_FIELD_REF.
+ * tree-cfg.c (verify_expr): Verify types of BIT_FIELD_REF
+ size/pos operands.
+ (verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR pos.
+ * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Use bitsizetype
+ for BIT_FIELD_REF args.
+ * fold-const.c (make_bit_field_ref): Likewise.
+ * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
+
+2017-07-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR sanitizer/80998
+ * sanopt.c (pass_sanopt::execute): Handle IFN_UBSAN_PTR.
+ * tree-ssa-alias.c (call_may_clobber_ref_p_1): Likewise.
+ * flag-types.h (enum sanitize_code): Add SANITIZER_POINTER_OVERFLOW.
+ Or it into SANITIZER_UNDEFINED.
+ * ubsan.c: Include gimple-fold.h and varasm.h.
+ (ubsan_expand_ptr_ifn): New function.
+ (instrument_pointer_overflow): New function.
+ (maybe_instrument_pointer_overflow): New function.
+ (instrument_object_size): Formatting fix.
+ (pass_ubsan::execute): Call instrument_pointer_overflow
+ and maybe_instrument_pointer_overflow.
+ * internal-fn.c (expand_UBSAN_PTR): New function.
+ * ubsan.h (ubsan_expand_ptr_ifn): Declare.
+ * sanitizer.def (__ubsan_handle_pointer_overflow,
+ __ubsan_handle_pointer_overflow_abort): New builtins.
+ * tree-ssa-tail-merge.c (merge_stmts_p): Handle IFN_UBSAN_PTR.
+ * internal-fn.def (UBSAN_PTR): New internal function.
+ * opts.c (sanitizer_opts): Add pointer-overflow.
+ * lto-streamer-in.c (input_function): Handle IFN_UBSAN_PTR.
+ * fold-const.c (build_range_check): Compute pointer range check in
+ integral type if pointer arithmetics would be needed. Formatting
+ fixes.
+
+2017-07-28 Martin Liska <mliska@suse.cz>
+
+ PR sanitizer/81460
+ * sanopt.c (sanitize_rewrite_addressable_params): Do not rewrite
+ parameters that are of a variable-length.
+
+2017-07-28 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config.gcc (powerpc-*-rtems*): Remove rs6000/eabi.h. Add
+ rs6000/biarch64.h.
+ * config/rs6000/rtems.h (ASM_DECLARE_FUNCTION_SIZE): New macro.
+ (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
+ (CRT_CALL_STATIC_FUNCTION): Likewise.
+ (ASM_DEFAULT_SPEC): New define.
+ (ASM_SPEC32): Likewise.
+ (ASM_SPEC64): Likewise.
+ (ASM_SPEC_COMMON): Likewise.
+ (ASM_SPEC): Likewise.
+ (INVALID_64BIT): Likewise.
+ (LINK_OS_DEFAULT_SPEC): Likewise.
+ (LINK_OS_SPEC32): Likewise.
+ (LINK_OS_SPEC64): Likewise.
+ (POWERPC_LINUX): Likewise.
+ (PTRDIFF_TYPE): Likewise.
+ (RESTORE_FP_PREFIX): Likewise.
+ (RESTORE_FP_SUFFIX): Likewise.
+ (SAVE_FP_PREFIX): Likewise.
+ (SAVE_FP_SUFFIX): Likewise.
+ (SIZE_TYPE): Likewise.
+ (SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
+ (TARGET_64BIT): Likewise.
+ (TARGET_64BIT): Likewise.
+ (TARGET_AIX): Likewise.
+ (WCHAR_TYPE_SIZE): Likewise.
+ (WCHAR_TYPE): Undefine.
+ (TARGET_OS_CPP_BUILTINS): Add 64-bit PowerPC defines.
+ (CPP_OS_DEFAULT_SPEC): Use previous CPP_OS_RTEMS_SPEC.
+ (CPP_OS_RTEMS_SPEC): Delete.
+ (SUBSUBTARGET_EXTRA_SPECS): Remove cpp_os_rtems. Add
+ asm_spec_common, asm_spec32, asm_spec64, link_os_spec32, and
+ link_os_spec64.
+ * config/rs6000/t-rtems: Add mcpu=e6500/m64 multilibs.
+
+2017-07-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/81578
+ * tree-parloops.c (build_new_reduction): Bail out if
+ reduction_code isn't one of the standard OpenMP reductions.
+ Move the details printing after that decision.
+
+2017-07-27 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config/rs6000/predicates.md (volatile_mem_operand): Remove code
+ related to reload_in_progress.
+ (splat_input_operand): Likewise.
+ * config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_rtx):
+ Delete prototype.
+ * config/rs6000/rs6000.c (machine_function): Remove sdmode_stack_slot
+ field.
+ (TARGET_EXPAND_TO_RTL_HOOK): Delete.
+ (TARGET_INSTANTIATE_DECLS): Likewise.
+ (legitimate_indexed_address_p): Delete reload_in_progress code.
+ (rs6000_debug_legitimate_address_p): Likewise.
+ (rs6000_eliminate_indexed_memrefs): Likewise.
+ (rs6000_emit_le_vsx_store): Likewise.
+ (rs6000_emit_move_si_sf_subreg): Likewise.
+ (rs6000_emit_move): Likewise.
+ (register_to_reg_type): Likewise.
+ (rs6000_pre_atomic_barrier): Likewise.
+ (rs6000_machopic_legitimize_pic_address): Likewise.
+ (rs6000_allocate_stack_temp): Likewise.
+ (rs6000_address_for_fpconvert): Likewise.
+ (rs6000_address_for_altivec): Likewise.
+ (rs6000_secondary_memory_needed_rtx): Delete function.
+ (rs6000_check_sdmode): Likewise.
+ (rs6000_alloc_sdmode_stack_slot): Likewise.
+ (rs6000_instantiate_decls): Likewise.
+ * config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_RTX): Delete.
+ * config/rs6000/rs6000.md (splitter for *movsi_got_internal):
+ Delete reload_in_progress.
+ (*vec_reload_and_plus_<mptrsize>): Likewise.
+ * config/rs6000/vsx.md (vsx_mul_v2di): Likewise.
+ (vsx_div_v2di): Likewise.
+ (vsx_udiv_v2di): Likewise.
+
+2017-07-27 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config/rs6000/rs6000.opt (mlra): Replace with stub.
+ * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Delete OPTION_MASK_LRA.
+ * config/rs6000/rs6000.c (TARGET_LRA_P): Delete.
+ (rs6000_debug_reg_global): Delete print of LRA status.
+ (rs6000_option_override_internal): Delete dead LRA related code.
+ (rs6000_lra_p): Delete function.
+ * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mlra.
+
+2017-07-27 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config.gcc (riscv*-*-elf*): Add (riscv*-*-rtems*).
+ * config/riscv/rtems.h: New file.
+
+2017-07-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ Sudakshina Das <sudi.das@arm.com>
+
+ * config/aarch64/aarch64.md
+ (define_split for and<mode>3nr_compare): Move
+ non aarch64_logical_operand to a register.
+ (define_split for and_<SHIFT:optab><mode>3nr_compare0): Move non
+ register immediate operand to a register.
+ * config/aarch64/predicates.md (aarch64_mov_imm_operand): New.
+
+2017-07-27 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR middle-end/81564
+ * tree-cfg.c (group_case_labels_stmt): Handle already deleted blocks.
+
+2017-07-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/81573
+ PR tree-optimization/81494
+ * tree-vect-loop.c (vect_create_epilog_for_reduction): Handle
+ multi defuse cycle case.
+
+2017-07-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/81571
+ * tree-vect-slp.c (vect_build_slp_tree): Properly verify reduction
+ PHIs.
+
+2017-07-27 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/sparc/sparc.c (sparc_option_override): Set MASK_FSMULD flag
+ earlier and only if MASK_FPU is set. Adjust formatting.
+
+2017-07-27 Martin Liska <mliska@suse.cz>
+
+ * opt-functions.awk: Add validation of value of Init.
+ * optc-gen.awk: Pass new argument.
+
+2017-07-27 Martin Liska <mliska@suse.cz>
+
+ * auto-profile.c (autofdo_source_profile::update_inlined_ind_target):
+ Fix wrong condition.
+
+2017-07-27 Martin Liska <mliska@suse.cz>
+
+ * auto-profile.c (afdo_annotate_cfg): Assign zero counts to
+ BBs and edges seen by autoFDO.
+
+2017-07-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/81502
+ * tree-ssa.c (non_rewritable_lvalue_p): Handle BIT_INSERT_EXPR
+ with incompatible but same sized type.
+ (execute_update_addresses_taken): Likewise.
+
+2017-07-27 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * tree-ssa-loop-ch.c (pass_ch::process_loop_p): Guard on
+ flag_tree_loop_vectorize rather than flag_tree_vectorize.
+
+2017-07-27 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ PR target/81534
+ * config/s390/s390.md ("*atomic_compare_and_swap<mode>_1")
+ ("*atomic_compare_and_swapdi_2", "*atomic_compare_and_swapsi_3"):
+ Change s_operand to memory_operand.
+
+2017-07-27 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_permute): Declare.
+ * config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Replace with...
+ (rs6000_emit_le_vsx_permute): ...this. Take the destination as input.
+ Emit instructions rather than returning an expression. Handle TFmode
+ and KFmode by casting to TImode.
+ (rs6000_emit_le_vsx_load): Update to use rs6000_emit_le_vsx_permute.
+ (rs6000_emit_le_vsx_store): Likewise.
+ * config/rs6000/vsx.md (VSX_TI): New iterator.
+ (*vsx_le_permute_<mode>): Use it instead of VSX_LE_128.
+ (*vsx_le_undo_permute_<mode>): Likewise.
+ (*vsx_le_perm_load_<mode>): Use rs6000_emit_le_vsx_permute to
+ emit the split sequence.
+ (*vsx_le_perm_store_<mode>): Likewise.
+
+2017-07-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/81555
+ PR tree-optimization/81556
+ * tree-ssa-reassoc.c (rewrite_expr_tree): Add NEXT_CHANGED argument,
+ if true, force CHANGED for the recursive invocation.
+ (reassociate_bb): Remember original length of ops array, pass
+ len != orig_len as NEXT_CHANGED in rewrite_expr_tree call.
+
+ * attribs.c (decl_attributes): Imply noinline, noclone and no_icf
+ attributes for noipa attribute. For naked attribute use
+ lookup_attribute first before lookup_attribute_spec.
+ * final.c (rest_of_handle_final): Disable IPA RA for functions with
+ noipa attribute.
+ * ipa-visibility.c (non_local_p): Fix comment typos. Return true
+ for functions with noipa attribute.
+ (cgraph_externally_visible_p): Return true for functions with noipa
+ attribute.
+ * cgraph.c (cgraph_node::get_availability): Return AVAIL_INTERPOSABLE
+ for functions with noipa attribute.
+ * doc/extend.texi: Document noipa function attribute.
+ * tree-ssa-structalias.c (refered_from_nonlocal_fn): Set *nonlocal_p
+ also for functions with noipa attribute.
+ (ipa_pta_execute): Set nonlocal_p also for nodes with noipa attribute.
+
+2017-07-26 Andrew Pinski <apinski@cavium.com>
+
+ * config/aarch64/aarch64.c (thunderx_vector_cost): Decrease cost of
+ vec_unalign_load_cost and vec_unalign_store_cost.
+
+2017-07-26 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
+ -mvsx-small-integer option.
+ (ISA_3_0_MASKS_IEEE): Likewise.
+ (OTHER_VSX_VECTOR_MASKS): Likewise.
+ (POWERPC_MASKS): Likewise.
+ * config/rs6000/rs6000.opt (-mvsx-small-integer): Likewise.
+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Simplify
+ code, only testing for DImode being allowed in non-VSX floating
+ point registers.
+ (rs6000_init_hard_regno_mode_ok): Change TARGET_VSX_SMALL_INTEGER
+ to TARGET_P8_VECTOR test. Remove redundant VSX test inside of
+ another VSX test.
+ (rs6000_option_override_internal): Delete -mvsx-small-integer.
+ (rs6000_expand_vector_set): Change TARGET_VSX_SMALL_INTEGER to
+ TARGET_P8_VECTOR test.
+ (rs6000_secondary_reload_simple_move): Likewise.
+ (rs6000_preferred_reload_class): Delete TARGET_VSX_SMALL_INTEGER,
+ since TARGET_P9_VECTOR was already tested.
+ (rs6000_opt_masks): Remove -mvsx-small-integer.
+ * config/rs6000/vsx.md (vsx_extract_<mode>): Delete
+ TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
+ used.
+ (vsx_extract_<mode>_p9): Delete TARGET_VSX_SMALL_INTEGER, since a
+ test for TARGET_VEXTRACTUB was used, and that uses
+ TARGET_P9_VECTOR.
+ (p9 extract splitter): Likewise.
+ (vsx_extract_<mode>_di_p9): Likewise.
+ (vsx_extract_<mode>_store_p9): Likewise.
+ (vsx_extract_si): Delete TARGET_VSX_SMALL_INTEGER, since a test
+ for TARGET_P9_VECTOR was used. Delete code that is now dead with
+ the elimination of TARGET_VSX_SMALL_INTEGER.
+ (vsx_extract_<mode>_p8): Likewise.
+ (vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>): Likewise.
+ (vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Likewise.
+ (vsx_set_<mode>_p9): Likewise.
+ (vsx_set_v4sf_p9): Likewise.
+ (vsx_set_v4sf_p9_zero): Likewise.
+ (vsx_insert_extract_v4sf_p9): Likewise.
+ (vsx_insert_extract_v4sf_p9_2): Likewise.
+ * config/rs6000/rs6000.md (sign extend splitter): Change
+ TARGET_VSX_SMALL_INTEGER to TARGET_P8_VECTOR test.
+ (floatsi<mode>2_lfiwax_mem): Likewise.
+ (floatunssi<mode>2_lfiwzx_mem): Likewise.
+ (float<QHI:mode><FP_ISA3:mode>2): Delete TARGET_VSX_SMALL_INTEGER,
+ since a test for TARGET_P9_VECTOR was used.
+ (float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
+ (floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
+ (floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
+ (fix_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
+ TARGET_P8_VECTOR test.
+ (fix_trunc<mode>si2_stfiwx): Likewise.
+ (fix_trunc<mode>si2_internal): Likewise.
+ (fix_trunc<SFDF:mode><QHI:mode>2): Delete
+ TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
+ used.
+ (fix_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
+ (fixuns_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
+ TARGET_P8_VECTOR test.
+ (fixuns_trunc<mode>si2_stfiwx): Likewise.
+ (fixuns_trunc<SFDF:mode><QHI:mode>2): Delete
+ TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
+ used.
+ (fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
+ (fctiw<u>z_<mode>_smallint): Delete TARGET_VSX_SMALL_INTEGER,
+ since a test for TARGET_P9_VECTOR was used.
+ (splitter for loading small constants): Likewise.
+
+2017-07-26 Andrew Pinski <apinski@cavium.com>
+
+ * config/aarch64/aarch64.c (thunderx_vector_cost): Fix
+ vec_fp_stmt_cost.
+
+2017-07-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/81563
+ * config/i386/i386.c (sp_valid_at): Properly check CFA offset.
+ (fp_valid_at): Likewise.
+
2017-07-26 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64.c (cortexa57_addrcost_table): Remove.
projects / gcc.git / blobdiff