+2015-11-03 Thomas Schwinge <thomas@codesourcery.com>
+ Chung-Lin Tang <cltang@codesourcery.com>
+
+ * builtins.def (DEF_GOMP_BUILTIN): Enable for flag_openacc.
+ * omp-low.c (check_omp_nesting_restrictions): Allow
+ GIMPLE_OMP_ATOMIC_LOAD, GIMPLE_OMP_ATOMIC_STORE inside OpenACC
+ contexts.
+
+2015-11-03 Bilyan Borisov <bilyan.borisov@arm.com>
+
+ * config/aarch64/aarch64-simd-builtins.def (fmulx): New.
+ * config/aarch64/aarch64-simd.md (aarch64_fmulx<mode>): New.
+ * config/aarch64/arm_neon.h (vmulx_f32): Rewrite to call fmulx
+ builtin.
+ (vmulxq_f32): Likewise.
+ (vmulx_f64): New.
+ (vmulxq_f64): Rewrite to call fmulx builtin.
+ (vmulxs_f32): Likewise.
+ (vmulxd_f64): Likewise.
+ (vmulx_lane_f32): Remove.
+ * config/aarch64/iterators.md (UNSPEC): Add fmulx.
+
+2015-11-03 Alan Lawrence <alan.lawrence@arm.com>
+
+ * config/aarch64/aarch64.md (*movhf_aarch64): Use
+ aarch64_reg_or_fp_zero for second operand.
+
+2015-11-03 Alexandre Oliva <aoliva@redhat.com>
+
+ * gimple-expr.c: Include hash-set.h and rtl.h.
+ (mark_addressable_queue): New var.
+ (mark_addressable): Factor actual marking into...
+ (mark_addressable_1): ... this. Queue it up during expand.
+ (mark_addressable_2): New.
+ (flush_mark_addressable_queue): New.
+ * gimple-expr.h (flush_mark_addressable_queue): Declare.
+ * cfgexpand.c: Include gimple-expr.h.
+ (pass_expand::execute): Flush mark_addressable queue.
+
+2015-11-02 Alexandre Oliva <aoliva@redhat.com>
+
+ * tree-ssa-ifcombine.c (tree_ssa_ifcombine_bb_1): Factor out
+ bb_no_side_effects_p tests...
+ (tree_ssa_ifcombine_bb): ... here.
+
+ PR tree-optimization/68083
+ * tree-ssa-ifcombine.c: Include tree-ssa.h.
+ (bb_no_side_effects_p): Test for undefined uses too.
+ * tree-ssa.c (gimple_uses_undefined_value_p): New.
+ * tree-ssa.h (gimple_uses_undefined_value_p): Declare.
+
+2015-11-02 Jeff Law <jeff@redhat.com>
+
+ * tree-ssa-threadupdate.c (valid_jump_thread_path): Also detect
+ cases where the loop latch edge is in the middle of an FSM path.
+
2015-11-03 Tom de Vries <tom@codesourcery.com>
* tree-ssa-structalias.c (make_restrict_var_constraints): Rename to ...
2015-11-02 Julian Brown <julian@codesourcery.com>
* config/arm/neon-testgen.ml (emit_epilogue): Remove extraneous
- brackets and semicolon.
+ brackets and semicolon.
2015-11-02 Alan Lawrence <alan.lawrence@arm.com>
2015-10-27 Alan Lawrence <alan.lawrence@arm.com>
PR tree-optimization/65963
- * tree-scalar-evolution.c (interpret_rhs_expr): Handle some LSHIFT_EXPRs
- as equivalent MULT_EXPRs.
+ * tree-scalar-evolution.c (interpret_rhs_expr): Handle some
+ LSHIFT_EXPRs as equivalent MULT_EXPRs.
2015-11-02 Thomas Schwinge <thomas@codesourcery.com>
* config/mcore/mcore.c (mcore_reg_ok_for_base_p,
mcore_base_register_rtx_p, mcore_legitimate_index_p,
mcore_legitimate_address_p): New functions.
- (TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Define.
+ (TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Define.
2015-10-29 Jeff Law <law@redhat.com>
2015-10-29 Mikhail Maltsev <maltsevm@gmail.com>
- * genautomata.c: Use CHECKING_P instead of ENABLE_CHECKING.
- * genconditions.c: Define CHECKING_P in the generated code.
- * genextract.c: Use flag_checking in insn_extract.
- * gengtype.c (main): Remove conditional compilation.
- * gengtype.h: Likewise.
+ * genautomata.c: Use CHECKING_P instead of ENABLE_CHECKING.
+ * genconditions.c: Define CHECKING_P in the generated code.
+ * genextract.c: Use flag_checking in insn_extract.
+ * gengtype.c (main): Remove conditional compilation.
+ * gengtype.h: Likewise.
2015-10-29 Jeff Law <law@redhat.com>
* omp-low.c (pass_oacc_device_lower::execute): Ignore errors.
2015-10-27 Nathan Sidwell <nathan@codesourcery.com>
-
+
* internal-fn.c (expand_UNIQUE): New.
* internal-fn.h (enum ifn_unique_kind): New.
* internal-fn.def (IFN_UNIQUE): New.
2015-10-27 Alan Lawrence <alan.lawrence@arm.com>
PR tree-optimization/65963
- * tree-scalar-evolution.c (interpret_rhs_expr): Handle some LSHIFT_EXPRs
- as equivalent MULT_EXPRs.
+ * tree-scalar-evolution.c (interpret_rhs_expr): Handle some
+ LSHIFT_EXPRs as equivalent MULT_EXPRs.
2015-10-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>