+2014-09-17 Jan Hubicka <hubicka@ucw.cz>
+
+ * ipa-devirt.c (type_pair, default_hashset_traits): New types.
+ (odr_types_equivalent_p): Use pair hash.
+ (odr_subtypes_equivalent_p): Likewise, do structural compare
+ on ODR types that may be mismatched.
+ (warn_odr): Support warning when only one field is given.
+ (odr_types_equivalent_p): Strenghten comparsions made;
+ support VOIDtype.
+ (add_type_duplicate): Update VISITED hash set.
+
+2014-09-17 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config.gcc (*-*-rtems*): Default to 'rtems' thread model.
+ Enable selection of 'posix' or no thread model.
+
+2014-09-17 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/arm/arm.c (arm_option_override): Reject -mfpu=neon
+ when architecture is older than ARMv7.
+
+2014-09-16 John David Anglin <danglin@gcc.gnu.org>
+
+ PR target/61853
+ * config/pa/pa.c (pa_function_value): Directly handle aggregates
+ that fit exactly in a word or double word.
+
+2014-09-16 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/i386/driver-i386.c (host_detect_local_cpu): Detect lack of
+ zmm/k regs support.
+
+2014-09-16 Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * config/i386/i386.c
+ (ix86_expand_vector_extract): Handle V32HI and V64QI modes.
+ * config/i386/sse.md
+ (define_mode_iterator VI48F_256): New.
+ (define_mode_attr extract_type): Ditto.
+ (define_mode_attr extract_suf): Ditto.
+ (define_mode_iterator AVX512_VEC): Ditto.
+ (define_expand
+ "<extract_type>_vextract<shuffletype><extract_suf>_mask"): Use
+ AVX512_VEC.
+ (define_insn "avx512dq_vextract<shuffletype>64x2_1_maskm"): New.
+ (define_insn
+ "<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>"):
+ Ditto.
+ (define_mode_attr extract_type_2): Ditto.
+ (define_mode_attr extract_suf_2): Ditto.
+ (define_mode_iterator AVX512_VEC_2): Ditto.
+ (define_expand
+ "<extract_type_2>_vextract<shuffletype><extract_suf_2>_mask"): Use
+ AVX512_VEC_2 mode iterator.
+ (define_insn "vec_extract_hi_<mode>_maskm"): Ditto.
+ (define_expand "avx512vl_vextractf128<mode>"): Ditto.
+ (define_insn_and_split "vec_extract_lo_<mode>"): Delete.
+ (define_insn "vec_extract_lo_<mode><mask_name>"): New.
+ (define_split for V16FI mode): Ditto.
+ (define_insn_and_split "vec_extract_lo_<mode>"): Delete.
+ (define_insn "vec_extract_lo_<mode><mask_name>"): New.
+ (define_split for VI8F_256 mode): Ditto.
+ (define_insn "vec_extract_hi_<mode><mask_name>"): Add masking.
+ (define_insn_and_split "vec_extract_lo_<mode>"): Delete.
+ (define_insn "vec_extract_lo_<mode><mask_name>"): New.
+ (define_split for VI4F_256 mode): Ditto.
+ (define_insn "vec_extract_lo_<mode>_maskm"): Ditto.
+ (define_insn "vec_extract_hi_<mode>_maskm"): Ditto.
+ (define_insn "vec_extract_hi_<mode><mask_name>"): Add masking.
+ (define_mode_iterator VEC_EXTRACT_MODE): Add V64QI and V32HI modes.
+ (define_insn "vcvtph2ps<mask_name>"): Fix pattern condition.
+ (define_insn "avx512f_vextract<shuffletype>32x4_1_maskm"): Ditto.
+ (define_insn "<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>"):
+ Update `type' attribute, remove explicit `memory' attribute calculation.
+
+2014-09-16 Kito Cheng <kito@0xlab.org>
+
+ * ira.c (ira): Don't initialize ira_spilled_reg_stack_slots and
+ ira_spilled_reg_stack_slots_num if using lra.
+ (do_reload): Remove release ira_spilled_reg_stack_slots part.
+ * ira-color.c (ira_sort_regnos_for_alter_reg): Add assertion to
+ make sure not using lra.
+ (ira_reuse_stack_slot): Likewise.
+ (ira_mark_new_stack_slot): Likewise.
+
+2014-09-15 Andi Kleen <ak@linux.intel.com>
+
+ * function.c (allocate_struct_function): Force
+ DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT to one when
+ profiling is disabled.
+
+2014-09-15 Trevor Saunders <tsaunders@mozilla.com>
+
+ * cfgrtl.c, combine.c, config/arc/arc.c, config/mcore/mcore.c,
+ config/rs6000/rs6000.c, config/sh/sh.c, cprop.c, dwarf2out.c,
+ emit-rtl.c, final.c, function.c, gcse.c, jump.c, reg-stack.c,
+ reload1.c, reorg.c, resource.c, sel-sched-ir.c: Replace INSN_DELETED_P
+ macro with statically checked member functions.
+ * rtl.h (rtx_insn::deleted): New method.
+ (rtx_insn::set_deleted): Likewise.
+ (rtx_insn::set_undeleted): Likewise.
+ (INSN_DELETED_P): Remove.
+
+2014-09-15 Trevor Saunders <tsaunders@mozilla.com>
+
+ * config/mn10300/mn10300.c (mn10300_insert_setlb_lcc): Assign the
+ result of emit_jump_insn_before to a new variable.
+ * jump.c (mark_jump_label): Change the type of insn to rtx_insn *.
+ (mark_jump_label_1): Likewise.
+ (mark_jump_label_asm): Likewise.
+ * reload1.c (gen_reload): Change type of tem to rtx_insn *.
+ * rtl.h (mark_jump_label): Adjust.
+
+2014-09-15 Jakub Jelinek <jakub@redhat.com>
+
+ * Makefile.in (dg_target_exps): Remove.
+ (check_gcc_parallelize): Change to just an upper bound number.
+ (check-%-subtargets): Always print the non-parallelized goals.
+ (check_p_vars, check_p_comma, check_p_subwork): Remove.
+ (check_p_count, check_p_numbers0, check_p_numbers1, check_p_numbers2,
+ check_p_numbers3, check_p_numbers4, check_p_numbers5,
+ check_p_numbers6): New variables.
+ (check_p_numbers): Set to sequence from 1 to 9999.
+ (check_p_subdirs): Set to sequence from 1 to minimum of
+ $(check_p_count) and either GCC_TEST_PARALLEL_SLOTS env var if set,
+ or 128.
+ (check-%, check-parallel-%): Rewritten so that for parallelized
+ testing each job runs all the *.exp files, with
+ GCC_RUNTEST_PARALLELIZE_DIR set in environment.
+
+2014-09-15 David Malcolm <dmalcolm@redhat.com>
+
+ * config/arc/arc-protos.h (arc_attr_type): Strengthen param from
+ rtx to rtx_insn *.
+ (arc_sets_cc_p): Likewise.
+ * config/arc/arc.c (arc_print_operand): Use methods of
+ "final_sequence" for clarity, and to enable strengthening of
+ locals "jump" and "delay" from rtx to rtx_insn *.
+ (arc_adjust_insn_length): Strengthen local "prev" from rtx to
+ rtx_insn *; use method of rtx_sequence for typesafety.
+ (arc_get_insn_variants): Use insn method of rtx_sequence for
+ typesafety.
+ (arc_pad_return): Likewise.
+ (arc_attr_type): Strengthen param from rtx to rtx_insn *.
+ (arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
+ dyn_cast to rtx_sequence *, using insn method for typesafety.
+ * config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
+ rtx_sequence * and use insn method when invoking get_attr_length.
+ * config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
+ to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
+ rtx_sequence *, introducing a local "seq", using its insn method
+ from typesafety and clarity.
+ (add_sched_insns_for_speculation): Strengthen local "next" from
+ rtx to rtx_insn *.
+ * config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
+ (predicate_insn): Likewise.
+ * config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
+ second param.
+ * config/cris/cris.c (cris_notice_update_cc): Likewise.
+ * config/epiphany/epiphany-protos.h
+ (extern void epiphany_insert_mode_switch_use): Likewise for param
+ "insn".
+ (get_attr_sched_use_fpu): Likewise for param.
+ * config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
+ Likewise for param "insn".
+ * config/epiphany/mode-switch-use.c (insert_uses): Likewise for
+ param "insn" of "target_insert_mode_switch_use" callback.
+ * config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
+ (frv_issues_to_branch_unit_p): Likewise.
+ (frv_pack_insn_p): Likewise.
+ (frv_compare_insns): Strengthen locals "insn1" and "insn2" from
+ const rtx * (i.e. mutable rtx_def * const *) to
+ rtx_insn * const *.
+ * config/i386/i386-protos.h (standard_sse_constant_opcode):
+ Strengthen first param from rtx to rtx_insn *.
+ (output_fix_trunc): Likewise.
+ * config/i386/i386.c (standard_sse_constant_opcode): Likewise.
+ (output_fix_trunc): Likewise.
+ (core2i7_first_cycle_multipass_filter_ready_try): Likewise for
+ local "insn".
+ (min_insn_size): Likewise for param "insn".
+ (get_mem_group): Likewise.
+ (is_cmp): Likewise.
+ (get_insn_path): Likewise.
+ (get_insn_group): Likewise.
+ (count_num_restricted): Likewise.
+ (fits_dispatch_window): Likewise.
+ (add_insn_window): Likewise.
+ (add_to_dispatch_window): Likewise.
+ (debug_insn_dispatch_info_file): Likewise.
+ * config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
+ first param.
+ * config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
+ "cmp" and local "prev".
+ (m32c_output_compare): Likewise for param "insn".
+ * config/m32r/predicates.md (define_predicate "small_insn_p"): Add
+ a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
+ (define_predicate "large_insn_p"): Likewise.
+ * config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
+ param from rtx to rtx_insn *.
+ (attr_op_mem m68k_sched_attr_op_mem): Likewise.
+ * config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
+ (m68k_sched_attr_size): Likewise.
+ (sched_get_opxy_mem_type): Likewise for param "insn".
+ (m68k_sched_attr_op_mem): Likewise.
+ (sched_mem_operand_p): Likewise.
+ * config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
+ * config/mep/mep.c (mep_multi_slot): Likewise.
+ * config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
+ first param.
+ (mips_sync_loop_insns): Likewise.
+ * config/mips/mips.c (mips_print_operand_punctuation): Use insn
+ method of "final_sequence" for typesafety.
+ (mips_process_sync_loop): Strengthen param "insn" from rtx to
+ rtx_insn *.
+ (mips_output_sync_loop): Likewise.
+ (mips_sync_loop_insns): Likewise.
+ (mips_74k_agen_init): Likewise.
+ (mips_sched_init): Use NULL rather than NULL_RTX when working with
+ insns.
+ * config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
+ Strengthen param "insn" from rtx to rtx_insn *.
+ * config/nds32/nds32.c (nds32_target_alignment): Likewise for
+ local "insn".
+ * config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
+ param.
+ * config/pa/pa.c (pa_output_function_epilogue): Likewise for local
+ "insn". Use method of rtx_sequence for typesafety.
+ (branch_to_delay_slot_p): Strengthen param "insn" from rtx to
+ rtx_insn *.
+ (branch_needs_nop_p): Likewise.
+ (use_skip_p): Likewise.
+ (pa_insn_refs_are_delayed): Likewise.
+ * config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
+ for locals "insn", "ninsn".
+ * config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
+ "insn".
+ (is_cracked_insn): Likewise.
+ (is_branch_slot_insn): Likewise.
+ (is_nonpipeline_insn): Likewise.
+ (insn_terminates_group_p): Likewise.
+ (insn_must_be_first_in_group): Likewise.
+ (insn_must_be_last_in_group): Likewise.
+ (force_new_group): Likewise for param "next_insn".
+ * config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
+ "insn".
+ (s390_sched_score): Likewise.
+ * config/sh/sh-protos.h (output_branch): Likewise for param 2.
+ (rtx sfunc_uses_reg): Likewise for sole param.
+ * config/sh/sh.c (sh_print_operand): Use insn method of
+ final_sequence for typesafety.
+ (output_branch): Strengthen param "insn" from rtx to rtx_insn *.
+ Use insn method of final_sequence for typesafety.
+ (sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
+ * config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
+ for param.
+ (eligible_for_return_delay): Likewise.
+ (eligible_for_sibcall_delay): Likewise.
+ * config/sparc/sparc.c (eligible_for_call_delay): Likewise.
+ (eligible_for_return_delay): Likewise.
+ (eligible_for_sibcall_delay): Likewise.
+ * config/stormy16/stormy16-protos.h
+ (xstormy16_output_cbranch_hi): Likewise for final param.
+ (xstormy16_output_cbranch_si): Likewise.
+ * config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
+ (xstormy16_output_cbranch_si): Likewise.
+ * config/v850/v850-protos.h (notice_update_cc): Likewise.
+ * config/v850/v850.c (notice_update_cc): Likewise.
+
+ * final.c (get_attr_length_1): Strengthen param "insn" and param
+ of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
+ (get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
+ (get_attr_min_length): Likewise.
+ (shorten_branches): Likewise for signature of locals "length_fun"
+ and "inner_length_fun". Introduce local rtx_sequence * "seqn"
+ from a checked cast and use its methods for clarity and to enable
+ strengthening local "inner_insn" from rtx to rtx_insn *.
+ * genattr.c (gen_attr): When writing out the prototypes of the
+ various generated "get_attr_" functions, strengthen the params of
+ the non-const functions from rtx to rtx_insn *.
+ Similarly, strengthen the params of insn_default_length,
+ insn_min_length, insn_variable_length_p, insn_current_length.
+ (main): Similarly, strengthen the param of num_delay_slots,
+ internal_dfa_insn_code, insn_default_latency, bypass_p,
+ insn_latency, min_issue_delay, print_reservation,
+ insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
+ "insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
+ to hook_int_rtx_insn_unreachable.
+ * genattrtab.c (write_attr_get): When writing out the generated
+ "get_attr_" functions, strengthen the param "insn" from rtx to
+ rtx_insn *, eliminating a checked cast.
+ (make_automaton_attrs): When writing out prototypes of
+ "internal_dfa_insn_code_", "insn_default_latency_" functions
+ and the "internal_dfa_insn_code" and "insn_default_latency"
+ callbacks, strengthen their params from rtx to rtx_insn *
+ * genautomata.c (output_internal_insn_code_evaluation): When
+ writing out code, add a checked cast from rtx to rtx_insn * when
+ invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
+ (output_dfa_insn_code_func): Strengthen param of generated
+ function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
+ (output_trans_func): Likewise for generated function
+ "state_transition".
+ (output_internal_insn_latency_func): When writing out generated
+ function "internal_insn_latency", rename params from "insn" and
+ "insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
+ locals "insn" and "insn2" as rtx_insn * with checked casts once
+ we've proven that we're not dealing with const0_rtx.
+ (output_insn_latency_func): Strengthen param of generated
+ function "insn_latency" from rtx to rtx_insn *.
+ (output_print_reservation_func): Likewise for generated function
+ "print_reservation".
+ (output_insn_has_dfa_reservation_p): Likewise for generated
+ function "insn_has_dfa_reservation_p".
+ * hooks.c (hook_int_rtx_unreachable): Rename to...
+ (hook_int_rtx_insn_unreachable): ...this, and strengthen param
+ from rtx to rtx_insn *.
+ * hooks.h (hook_int_rtx_unreachable): Likewise.
+ (extern int hook_int_rtx_insn_unreachable): Likewise.
+ * output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
+ (get_attr_min_length): Likewise.
+ * recog.c (get_enabled_alternatives): Likewise.
+ * recog.h (alternative_mask get_enabled_alternatives): Likewise.
+ * reorg.c (find_end_label): Introduce local rtx "pat" and
+ strengthen local "insn" from rtx to rtx_insn *.
+ (redundant_insn): Use insn method of "seq" rather than element for
+ typesafety; strengthen local "control" from rtx to rtx_insn *.
+ * resource.c (mark_referenced_resources): Add checked cast to
+ rtx_insn * within INSN/JUMP_INSN case.
+ (mark_set_resources): Likewise.
+ * sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
+ rtx to rtx_insn *.
+
+2014-09-15 David Malcolm <dmalcolm@redhat.com>
+
+ * config/rs6000/rs6000.c (rs6000_loop_align_max_skip): Strengthen
+ param "label" from rtx to rtx_insn *.
+ * config/rx/rx.c (rx_max_skip_for_label): Likewise for param "lab"
+ and local "op".
+ * doc/tm.texi (TARGET_ASM_JUMP_ALIGN_MAX_SKIP): Autogenerated changes.
+ (TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP): Likewise.
+ (TARGET_ASM_LOOP_ALIGN_MAX_SKIP): Likewise.
+ (TARGET_ASM_LABEL_ALIGN_MAX_SKIP): Likewise.
+ * final.c (default_label_align_after_barrier_max_skip): Strengthen
+ param from rtx to rtx_insn *.
+ (default_loop_align_max_skip): Likewise.
+ (default_label_align_max_skip): Likewise.
+ (default_jump_align_max_skip): Likewise.
+ * target.def (label_align_after_barrier_max_skip): Likewise.
+ (loop_align_max_skip): Likewise.
+ (label_align_max_skip): Likewise.
+ (jump_align_max_skip): Likewise.
+ * targhooks.h (default_label_align_after_barrier_max_skip):
+ Likewise.
+ (default_loop_align_max_skip): Likewise.
+ (default_label_align_max_skip): Likewise.
+ (default_jump_align_max_skip): Likewise.
+
+2014-09-15 David Malcolm <dmalcolm@redhat.com>
+
+ * config/arc/arc.c (arc_can_follow_jump): Strengthen both params
+ from const_rtx to const rtx_insn *. Update union members from rtx
+ to rtx_insn *.
+ * doc/tm.texi (TARGET_CAN_FOLLOW_JUMP): Autogenerated change.
+ * hooks.c (hook_bool_const_rtx_const_rtx_true): Rename to...
+ (hook_bool_const_rtx_insn_const_rtx_insn_true): ...this, and
+ strengthen both params from const_rtx to const rtx_insn *.
+ * hooks.h (hook_bool_const_rtx_const_rtx_true): Likewise.
+ (hook_bool_const_rtx_insn_const_rtx_insn_true): Likewise.
+ * reorg.c (follow_jumps): Strengthen param "jump" from rtx to
+ rtx_insn *.
+ * target.def (can_follow_jump): Strengthen both params from
+ const_rtx to const rtx_insn *, and update default implementation
+ from hook_bool_const_rtx_const_rtx_true to
+ hook_bool_const_rtx_insn_const_rtx_insn_true.
+
+2014-09-15 David Malcolm <dmalcolm@redhat.com>
+
+ * sched-deps.c (deps_start_bb): Strengthen param "head" and local
+ "insn" from rtx to rtx_insn *.
+ * sched-int.h (deps_start_bb): Likewise for 2nd param.
+
+2014-09-15 Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * config/i386/sse.md
+ (define_insn "vcvtph2ps<mask_name>"): Add masking.
+ (define_insn "*vcvtph2ps_load<mask_name>"): Ditto.
+ (define_insn "vcvtph2ps256<mask_name>"): Ditto.
+ (define_expand "vcvtps2ph_mask"): New.
+ (define_insn "*vcvtps2ph<mask_name>"): Add masking.
+ (define_insn "*vcvtps2ph_store<mask_name>"): Ditto.
+ (define_insn "vcvtps2ph256<mask_name>"): Ditto.
+
+2014-09-15 Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * config/i386/sse.md (define_mode_iterator VI248_AVX512BW_AVX512VL):
+ New.
+ (define_mode_iterator VI24_AVX512BW_1): Ditto.
+ (define_insn "<mask_codefor>ashr<mode>3<mask_name>"): Ditto.
+ (define_insn "<mask_codefor>ashrv2di3<mask_name>"): Ditto.
+ (define_insn "ashr<VI248_AVX512BW_AVX512VL:mode>3<mask_name>"): Enable
+ also for TARGET_AVX512VL.
+ (define_expand "ashrv2di3"): Update to enable TARGET_AVX512VL.
+
+2014-09-15 Markus Trippelsdorf <markus@trippelsdorf.de>
+
+ * doc/install.texi (Options specification): add
+ --disable-libsanitizer item.
+
2014-09-14 James Clarke <jrtc27@jrtc27.com>
Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>