+2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/s390.md ("mov<mode>_64dfp" DD_DF): Use vleig for loading a
+ FP zero.
+ ("*mov<mode>_64" DD_DF): Remove the vector instructions. These
+ will anyway by matched by mov<mode>_64dfp.
+
+2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/s390.md ("mov<mode>" SD_SF): Change vleg/vsteg to
+ vlef/vstef. Add missing operand to vleif.
+
+2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/s390.c (s390_expand_vec_init): Enable vector load
+ pair for all vector types with 64 bit elements.
+ * config/s390/vx-builtins.md (V_HW_64): Move mode iterator to ...
+ * config/s390/vector.md (V_HW_64): ... here.
+ (V_128_NOSINGLE): New mode iterator.
+ ("vec_init<V_HW:mode>"): Use V_128 as mode iterator.
+ ("*vec_splat<mode>"): Use V_128_NOSINGLE mode iterator.
+ ("*vec_tf_to_v1tf", "*vec_ti_to_v1ti"): New pattern definitions.
+ ("*vec_load_pairv2di"): Change to ...
+ ("*vec_load_pair<mode>"): ... this one.
+
+2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/constraints.md: Add comments.
+ (jKK): Reject element sizes > 8 bytes.
+ * config/s390/s390.c (s390_split_ok_p): Enable splitting also for
+ s_operands.
+ * config/s390/s390.md: Add the s_operand checks formerly in
+ s390_split_ok_p to various splitters where they are still
+ required.
+ * config/s390/vector.md ("mov<mode>" V_128): Add GPR alternatives
+ for 128 bit vectors. Plus two splitters.
+
+2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/s390.md: Rename the cpu facilty vec to vx throughout
+ the file.
+
+2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ PR target/79893
+ * config/s390/s390-c.c (s390_adjust_builtin_arglist): Issue an
+ error if the boundary argument is not constant.
+
+2017-03-24 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/80112
+ * loop-doloop.c (doloop_condition_get): Don't check condition
+ if cmp isn't SET with IF_THEN_ELSE src.
+
+2017-03-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ PR tree-optimization/80158
+ * gimple-ssa-strength-reduction.c (replace_mult_candidate): When
+ replacing a candidate statement, also replace it for the
+ candidate's alternate interpretation.
+ (replace_rhs_if_not_dup): Likewise.
+ (replace_one_candidate): Likewise.
+
+2017-03-24 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/80167
+ * graphite-isl-ast-to-gimple.c
+ (translate_isl_ast_to_gimple::is_valid_rename): Handle default-defs
+ properly.
+ (translate_isl_ast_to_gimple::get_rename): Likewise.
+
+2017-03-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Change
+ handling of certain combinations of target options, including the
+ combinations -mpower8-vector vs. -mno-vsx, -mpower9-vector vs.
+ -mno-power8-vector, and -mpower9_dform vs. -mno-power9-vector.
+
+2017-03-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71436
+ * config/arm/arm.md (*load_multiple): Add reload_completed to
+ matching condition.
+
+2017-03-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+ Richard Biener <rguenth@suse.com>
+
+ PR tree-optimization/79908
+ PR tree-optimization/80136
+ * tree-stdarg.c (expand_ifn_va_arg_1): For a VA_ARG whose LHS has
+ been cast away, gimplify_and_add suffices.
+
+2017-03-23 Markus Trippelsdorf <markus@trippelsdorf.de>
+
+ * tree-vrp.c (identify_jump_threads): Delete avail_exprs.
+
+2017-03-23 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/80032
+ * gimplify.c (gimple_push_cleanup): Forced unconditional
+ cleanups still have to go to the conditional_cleanups
+ sequence.
+
+2017-03-22 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/80072
+ * tree-ssa-reassoc.c (struct operand_entry): Change id field type
+ to unsigned int.
+ (next_operand_entry_id): Change type to unsigned int.
+ (sort_by_operand_rank): Make sure to return the right return value
+ even if unsigned fields are bigger than INT_MAX.
+ (struct oecount): Change cnt and id type to unsigned int.
+ (oecount_hasher::equal): Formatting fix.
+ (oecount_cmp): Make sure to return the right return value
+ even if unsigned fields are bigger than INT_MAX.
+ (undistribute_ops_list): Change next_oecount_id type to unsigned int.
+
+ PR c++/80129
+ * gimplify.c (gimplify_modify_expr_rhs) <case COND_EXPR>: Clear
+ TREE_READONLY on result if writing it more than once.
+
+ PR sanitizer/80110
+ * doc/invoke.texi (-fsanitize=thread): Document that with
+ -fnon-call-exceptions atomics are not able to throw
+ exceptions.
+
+ PR sanitizer/80110
+ * tsan.c: Include tree-eh.h.
+ (instrument_builtin_call): Call maybe_clean_eh_stmt or
+ maybe_clean_or_replace_eh_stmt where needed.
+ (instrument_memory_accesses): Add cfg_changed argument.
+ Call gimple_purge_dead_eh_edges on each block and set *cfg_changed
+ if it returned true.
+ (tsan_pass): Adjust caller. Return TODO_cleanup_cfg if cfg_changed.
+
+ PR rtl-optimization/63191
+ * config/i386/i386.c (ix86_delegitimize_address): Turn into small
+ wrapper function, moved the whole old content into ...
+ (ix86_delegitimize_address_1): ... this. New inline function.
+ (ix86_find_base_term): Use ix86_delegitimize_address_1 with
+ true as last argument instead of ix86_delegitimize_address.
+
+2017-03-22 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (generic_branch_cost): Copy
+ cortexa57_branch_cost.
+
+2017-03-22 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (generic_tunings): Add AES fusion.
+
+2017-03-21 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
+
+ PR target/80123
+ * doc/md.texi (Constraints): Document wA constraint.
+ * config/rs6000/constraints.md (wA): New.
+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Add wA reg_class.
+ (rs6000_init_hard_regno_mode_ok): Init wA constraint.
+ * config/rs6000/rs6000.h (RS6000_CONSTRAINT_wA): New.
+ * config/rs6000/vsx.md (vsx_splat_<mode>): Use wA constraint.
+
+2017-03-22 Cesar Philippidis <cesar@codesourcery.com>
+
+ PR c++/80029
+ * gimplify.c (is_oacc_declared): New function.
+ (oacc_default_clause): Use it to set default flags for acc declared
+ variables inside parallel regions.
+ (gimplify_scan_omp_clauses): Strip firstprivate pointers for acc
+ declared variables.
+ (gimplify_oacc_declare): Gimplify the declare clauses. Add the
+ declare attribute to any decl as necessary.
+
+2017-03-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ PR target/80082
+ * config/arm/arm-isa.h (isa_bit_lpae): New feature bit.
+ (ISA_ARMv7ve): Add isa_bit_lpae to the definition.
+ * config/arm/arm-protos.h (arm_arch7ve): Rename into ...
+ (arm_arch_lpae): This.
+ * config/arm/arm.c (arm_arch7ve): Rename into ...
+ (arm_arch_lpae): This. Define it in term of isa_bit_lpae.
+ * config/arm/arm.h (TARGET_HAVE_LPAE): Redefine in term of
+ arm_arch_lpae.
+
+2017-03-22 Martin Liska <mliska@suse.cz>
+
+ PR target/79906
+ * config/rs6000/rs6000.c (rs6000_inner_target_options): Show
+ error message instead of an ICE.
+
2017-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* doc/extend.texi (6.11 Additional Floating Types): Revise.
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