+2015-11-09 Jeff Law <law@redhat.com>
+
+ * tree-into-ssa.c (names_to_release): No longer static.
+ * tree-into-ssa.h (names_to_release): Declare.
+ * tree-ssanames.c (verify_ssaname_freelists): New debug function.
+ (release_free_names_and_compact_live_names): New function extracted
+ from pass_release_ssa_names::execute.
+ (pass_release_ssa_names::execute): Use it.
+
+2015-11-09 Alan Modra <amodra@gmail.com>
+
+ * gensupport.c (add_mnemonic_string): Make len param a size_t.
+ (gen_mnemonic_setattr): Make "size" var a size_t. Use
+ obstack_blank_fast to shrink obstack. Cast obstack_next_free
+ return value.
+
+2015-11-09 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR rtl-optimization/68182
+ * gcc/bb-reorder.c (reorder_basic_blocks_simple): Treat a conditional
+ branch with only one successor just like unconditional branches.
+
+2015-11-08 Jeff Law <law@redhat.com>
+
+ * tree-ssa-threadupdate.c (register_jump_thraed): Assert that a
+ non-FSM path has no edges marked with EDGE_DFS_BACK.
+ (ssa_redirect_edges): No longer call mark_loop_for_removal.
+ (thread_single_edge, def_split_header_continue_p): Remove.
+ (bb_ends_with_multiway_branch): Likewise.
+ (thread_through_loop_header): Remove cases of threading from
+ latch through the header. Simplify knowing we won't thread
+ the latch.
+ (thread_through_all_blocks): Simplify knowing that only the FSM
+ threader needs to handle backedges.
+
+2015-11-08 Eric Botcazou <ebotcazou@adacore.com>
+
+ * doc/extend.texi (type attributes): Document scalar_storage_order.
+ (Structure-Packing Pragmas): Rename into...
+ (Structure-Layout Pragmas): ...this. Document scalar_storage_order.
+ * doc/invoke.texi (C Dialect Options): Document -fsso-struct
+ (Warnings): Document -Wno-scalar-storage-order.
+ * flag-types.h (enum scalar_storage_order_kind): New enumeration.
+ * calls.c (store_unaligned_arguments_into_pseudos): Adjust calls to
+ extract_bit_field and store_bit_field.
+ (initialize_argument_information): Adjust call to store_expr.
+ (load_register_parameters): Adjust call to extract_bit_field.
+ * expmed.c (check_reverse_storage_order_support): New function.
+ (check_reverse_float_storage_order_support): Likewise.
+ (flip_storage_order): Likewise.
+ (store_bit_field_1): Add REVERSE parameter. Flip the storage order
+ of the value if it is true. Pass REVERSE to recursive call after
+ adjusting the target offset.
+ Do not use extraction or movstrict instruction if REVERSE is true.
+ Pass REVERSE to store_fixed_bit_field.
+ (store_bit_field): Add REVERSE parameter and pass to it to above.
+ (store_fixed_bit_field): Add REVERSE parameter and pass to it to
+ store_split_bit_field and store_fixed_bit_field_1.
+ (store_fixed_bit_field_1): Add REVERSE parameter. Flip the storage
+ order of the value if it is true and adjust the target offset.
+ (store_split_bit_field): Add REVERSE parameter and pass it to
+ store_fixed_bit_field. Adjust the target offset if it is true.
+ (extract_bit_field_1): Add REVERSE parameter. Flip the storage order
+ of the value if it is true. Pass REVERSE to recursive call after
+ adjusting the target offset.
+ Do not use extraction or subreg instruction if REVERSE is true.
+ Pass REVERSE to extract_fixed_bit_field.
+ (extract_bit_field): Add REVERSE parameter and pass to it to above.
+ (extract_fixed_bit_field): Add REVERSE parameter and pass to it to
+ extract_split_bit_field and extract_fixed_bit_field_1.
+ (extract_fixed_bit_field_1): Add REVERSE parameter. Flip the storage
+ order of the value if it is true and adjust the target offset.
+ (extract_split_bit_field): Add REVERSE parameter and pass it to
+ extract_fixed_bit_field. Adjust the target offset if it is true.
+ * expmed.h (flip_storage_order): Declare.
+ (store_bit_field): Adjust prototype.
+ (extract_bit_field): Likewise.
+ * expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
+ (emit_group_store): Adjust call to store_bit_field.
+ (copy_blkmode_from_reg): Likewise.
+ (copy_blkmode_to_reg): Likewise.
+ (write_complex_part): Likewise.
+ (read_complex_part): Likewise.
+ (optimize_bitfield_assignment_op): Add REVERSE parameter. Assert
+ that it isn't true if the target is a register.
+ <PLUS_EXPR>: If it is, do not optimize unless bitsize is equal to 1,
+ and flip the storage order of the value.
+ <BIT_IOR_EXPR>: Flip the storage order of the value.
+ (get_bit_range): Adjust call to get_inner_reference.
+ (expand_assignment): Adjust calls to get_inner_reference, store_expr,
+ optimize_bitfield_assignment_op and store_field. Handle MEM_EXPRs
+ with reverse storage order.
+ (store_expr_with_bounds): Add REVERSE parameter and pass it to
+ recursive calls and call to store_bit_field. Force the value into a
+ register if it is true and then flip the storage order of the value.
+ (store_expr): Add REVERSE parameter and pass it to above.
+ (categorize_ctor_elements_1): Adjust call to
+ initializer_constant_valid_p.
+ (store_constructor_field): Add REVERSE parameter and pass it to
+ recursive calls and call to store_field.
+ (store_constructor): Add REVERSE parameter and pass it to calls to
+ store_constructor_field and store_expr. Set it to true for an
+ aggregate type with TYPE_REVERSE_STORAGE_ORDER.
+ (store_field): Add REVERSE parameter and pass it to recursive calls
+ and calls to store_expr and store_bit_field. Temporarily flip the
+ storage order of the value with record type and integral mode and
+ adjust the shift if it is true.
+ (get_inner_reference): Add PREVERSEP parameter and set it to true
+ upon encoutering a reference with reverse storage order.
+ (expand_expr_addr_expr_1): Adjust call to get_inner_reference.
+ (expand_constructor): Adjust call to store_constructor.
+ (expand_expr_real_2) <CASE_CONVERT>: Pass TYPE_REVERSE_STORAGE_ORDER
+ of the union type to store_expr in the MEM case and assert that it
+ isn't set in the REG case. Adjust call to store_field.
+ (expand_expr_real_1) <MEM_REF>: Handle reverse storage order.
+ <normal_inner_ref>: Add REVERSEP variable and adjust calls to
+ get_inner_reference and extract_bit_field. Temporarily flip the
+ storage order of the value with record type and integral mode and
+ adjust the shift if it is true. Flip the storage order of the value
+ at the end if it is true.
+ <VIEW_CONVERT_EXPR>: Add REVERSEP variable and adjust call to
+ get_inner_reference. Do not fetch an inner reference if it is true.
+ * expr.h (store_expr_with_bounds): Ajust prototype.
+ (store_expr): Likewise.
+ * fold-const.c (make_bit_field_ref): Add REVERSEP parameter and set
+ REF_REVERSE_STORAGE_ORDER on the reference according to it.
+ (optimize_bit_field_compare): Deal with reverse storage order.
+ Adjust calls to get_inner_reference and make_bit_field_ref.
+ (decode_field_reference): Add PREVERSEP parameter and adjust call to
+ get_inner_reference.
+ (fold_truth_andor_1): Deal with reverse storage order. Adjust calls
+ to decode_field_reference and make_bit_field_ref.
+ (fold_unary_loc) <CASE_CONVERT>: Adjust call to get_inner_reference.
+ <VIEW_CONVERT_EXPR>: Propagate the REF_REVERSE_STORAGE_ORDER flag.
+ (fold_comparison): Adjust call to get_inner_reference.
+ (split_address_to_core_and_offset): Adjust call to
+ get_inner_reference.
+ * gimple-expr.c (useless_type_conversion_p): Return false for array
+ types with different TYPE_REVERSE_STORAGE_ORDER flag.
+ * gimplify.c (gimplify_expr) <MEM_REF>: Propagate the
+ REF_REVERSE_STORAGE_ORDER flag.
+ * lto-streamer-out.c (hash_tree): Deal with
+ TYPE_REVERSE_STORAGE_ORDER.
+ * output.h (assemble_real): Adjust prototype.
+ * print-tree.c (print_node): Convey TYPE_REVERSE_STORAGE_ORDER.
+ * stor-layout.c (finish_record_layout): Propagate the
+ TYPE_REVERSE_STORAGE_ORDER flag to the variants.
+ * tree-core.h (TYPE_REVERSE_STORAGE_ORDER): Document.
+ (TYPE_SATURATING): Adjust.
+ (REF_REVERSE_STORAGE_ORDER): Document.
+ * tree-dfa.c (get_ref_base_and_extent): Add PREVERSE parameter and
+ set it to true upon encoutering a reference with reverse storage
+ order.
+ * tree-dfa.h (get_ref_base_and_extent): Adjust prototype.
+ * tree-inline.c (remap_gimple_op_r): Propagate the
+ REF_REVERSE_STORAGE_ORDER flag.
+ (copy_tree_body_r): Likewise.
+ * tree-outof-ssa.c (insert_value_copy_on_edge): Adjust call to
+ store_expr.
+ * tree-streamer-in.c (unpack_ts_base_value_fields): Deal with
+ TYPE_REVERSE_STORAGE_ORDER and REF_REVERSE_STORAGE_ORDER.
+ * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
+ * tree.c (stabilize_reference) <BIT_FIELD_REF>: Propagate the
+ REF_REVERSE_STORAGE_ORDER flag.
+ (verify_type_variant): Deal with TYPE_REVERSE_STORAGE_ORDER.
+ (gimple_canonical_types_compatible_p): Likewise.
+ * tree.h (TYPE_REVERSE_STORAGE_ORDER): New flag.
+ (TYPE_SATURATING): Adjust.
+ (REF_REVERSE_STORAGE_ORDER): New flag.
+ (reverse_storage_order_for_component_p): New inline predicate.
+ (storage_order_barrier_p): Likewise.
+ (get_inner_reference): Adjust prototype.
+ * varasm.c: Include expmed.h.
+ (assemble_variable_contents): Adjust call to output_constant.
+ (assemble_real): Add REVERSE parameter. Flip the storage
+ order of the value if REVERSE is true.
+ (compare_constant) <CONSTRUCTOR>: Compare TYPE_REVERSE_STORAGE_ORDER.
+ (assemble_constant_contents): Adjust call to output_constant.
+ (output_constant_pool_2): Adjust call to assemble_real.
+ (initializer_constant_valid_p_1) <CONSTRUCTOR>: Deal with
+ TYPE_REVERSE_STORAGE_ORDER.
+ (initializer_constant_valid_p): Add REVERSE parameter.
+ (output_constant): Add REVERSE parameter.
+ <INTEGER_TYPE>: Flip the storage order of the value if REVERSE is true.
+ <REAL_TYPE>: Adjust call to assemble_real.
+ <COMPLEX_TYPE>: Pass it to recursive calls.
+ <ARRAY_TYPE>: Likewise. Adjust call to output_constructor.
+ <RECORD_TYPE>: Likewise. Adjust call to output_constructor.
+ (struct oc_local_state): Add REVERSE field.
+ (output_constructor_array_range): Adjust calls to output_constant.
+ (output_constructor_regular_field): Likewise.
+ (output_constructor_bitfield): Adjust call to output_constructor.
+ Flip the storage order of the value if REVERSE is true.
+ (output_constructor): Add REVERSE parameter. Set it to true for an
+ aggregate type with TYPE_REVERSE_STORAGE_ORDER. Adjust call to
+ output_constructor_bitfield.
+ * varasm.h (initializer_constant_valid_p): Default REVERSE to false.
+ * asan.c (instrument_derefs): Adjust call to get_inner_reference.
+ * builtins.c (get_object_alignment_2): Likewise.
+ * cfgexpand.c (expand_debug_expr): Adjust call to get_inner_reference
+ and get_ref_base_and_extent.
+ * dbxout.c (dbxout_expand_expr): Likewise.
+ * dwarf2out.c (add_var_loc_to_decl): Likewise.
+ (loc_list_for_address_of_addr_expr_of_indirect_ref): Likewise.
+ (loc_list_from_tree): Likewise.
+ (fortran_common): Likewise.
+ * gimple-fold.c (gimple_fold_builtin_memory_op): Adjust calls to
+ get_ref_base_and_extent.
+ (get_base_constructor): Likewise.
+ (fold_const_aggregate_ref_1): Likewise.
+ * gimple-laddress.c (pass_laddress::execute): Adjust call to
+ get_inner_reference.
+ * gimple-ssa-strength-reduction.c (slsr_process_ref): Adjust call to
+ get_inner_reference and bail out on reverse storage order.
+ * ifcvt.c (noce_emit_move_insn): Adjust calls to store_bit_field.
+ * ipa-cp.c (ipa_get_jf_ancestor_result): Adjust call to
+ build_ref_for_offset.
+ * ipa-polymorphic-call.c (set_by_invariant): Adjust call to
+ get_ref_base_and_extent.
+ (ipa_polymorphic_call_context): Likewise.
+ (extr_type_from_vtbl_ptr_store): Likewise.
+ (check_stmt_for_type_change): Likewise.
+ (get_dynamic_type): Likewise.
+ * ipa-prop.c (ipa_load_from_parm_agg_1): Adjust call to
+ get_ref_base_and_extent.
+ (compute_complex_assign_jump_func): Likewise.
+ (get_ancestor_addr_info): Likewise.
+ (compute_known_type_jump_func): Likewise.
+ (determine_known_aggregate_parts): Likewise.
+ (ipa_get_adjustment_candidate): Likewise.
+ (ipa_modify_call_arguments): Set REF_REVERSE_STORAGE_ORDER on
+ MEM_REF.
+ * ipa-prop.h (ipa_parm_adjustment): Add REVERSE field.
+ (build_ref_for_offset): Adjust prototype.
+ * simplify-rtx.c (delegitimize_mem_from_attrs): Adjust call to
+ get_inner_reference.
+ * tree-affine.c (tree_to_aff_combination): Adjust call to
+ get_inner_reference.
+ (get_inner_reference_aff): Likewise.
+ * tree-data-ref.c (split_constant_offset_1): Likewise.
+ (dr_analyze_innermost): Likewise. Bail out if reverse storage order.
+ * tree-scalar-evolution.c (interpret_rhs_expr): Adjust call to
+ get_inner_reference.
+ * tree-sra.c (struct access): Add REVERSE and move WRITE around.
+ (dump_access): Print new fields.
+ (create_access): Adjust call to get_ref_base_and_extent and set the
+ REVERSE flag according to the result.
+ (completely_scalarize_record): Set the REVERSE flag.
+ (scalarize_elem): Add REVERSE parameter.
+ (build_access_from_expr_1): Preserve storage order barriers.
+ (build_accesses_from_assign): Likewise.
+ (build_ref_for_offset): Add REVERSE parameter and set the
+ REF_REVERSE_STORAGE_ORDER flag accordingly.
+ (build_ref_for_model): Adjust call to build_ref_for_offset and clear
+ the REF_REVERSE_STORAGE_ORDER flag if there are components.
+ (analyze_access_subtree): Likewise.
+ (create_artificial_child_access): Set the REVERSE flag.
+ (get_access_for_expr): Adjust call to get_ref_base_and_extent.
+ (turn_representatives_into_adjustments): Propagate REVERSE flag.
+ (ipa_sra_check_caller): Adjust call to get_inner_reference.
+ * tree-ssa-alias.c (ao_ref_base): Adjust call to
+ get_ref_base_and_extent.
+ (aliasing_component_refs_p): Likewise.
+ (stmt_kills_ref_p_1): Likewise.
+ * tree-ssa-dce.c (mark_aliased_reaching_defs_necessary_1): Likewise.
+ * tree-ssa-loop-ivopts.c (may_be_nonaddressable_p) <MEM_REF>: New.
+ Return true if reverse storage order.
+ <BIT_FIELD_REF>: Likewise.
+ <COMPONENT_REF>: Likewise.
+ <ARRAY_REF>: Likewise.
+ <ARRAY_RANGE_REF>: Likewise.
+ (split_address_cost): Likewise. Bail out if reverse storage order.
+ * tree-ssa-math-opts.c (find_bswap_or_nop_load): Adjust call to
+ get_inner_reference. Bail out if reverse storage order.
+ (bswap_replace): Adjust call to get_inner_reference.
+ * tree-ssa-pre.c (create_component_ref_by_pieces_1) <MEM_REF>: Set
+ the REF_REVERSE_STORAGE_ORDER flag.
+ <BIT_FIELD_REF>: Likewise.
+ * tree-ssa-sccvn.c (vn_reference_eq): Return false on storage order
+ barriers.
+ (copy_reference_ops_from_ref) <MEM_REF>: Set REVERSE field according
+ to the REF_REVERSE_STORAGE_ORDER flag.
+ <BIT_FIELD_REF>: Likewise.
+ <VIEW_CONVERT_EXPR>: Set it for storage order barriers.
+ (contains_storage_order_barrier_p): New predicate.
+ (vn_reference_lookup_3): Adjust calls to get_ref_base_and_extent.
+ Punt on storage order barriers if necessary.
+ * tree-ssa-sccvn.h (struct vn_reference_op_struct): Add REVERSE.
+ * tree-ssa-structalias.c (get_constraint_for_component_ref): Adjust
+ call to get_ref_base_and_extent.
+ (do_structure_copy): Likewise.
+ * tree-vect-data-refs.c (vect_check_gather): Adjust call to
+ get_inner_reference.
+ (vect_analyze_data_refs): Likewise. Bail out if reverse storage
+ order.
+ * tsan.c (instrument_expr): Adjust call to get_inner_reference.
+ * ubsan.c (instrument_bool_enum_load): Likewise.
+ (instrument_object_size): Likewise.
+ * var-tracking.c (track_expr_p): Adjust call to
+ get_ref_base_and_extent
+ * config/mips/mips.c (r10k_safe_mem_expr_p): Adjust call to
+ get_inner_reference.
+ * config/s390/s390.c (s390_expand_atomic): Adjust call to
+ store_bit_field.
+ * config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust call to
+ extract_bit_field.
+ * config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Likewise.
+
+2015-11-07 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/sparc/sparc.opt (mfix-at697f): Add final period.
+
+2015-11-07 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR rtl-optimization/67864
+ * common/config/i386/i386-common.c (ix86_option_optimization_table)
+ <OPT_freorder_blocks_algorithm_>: Use REORDER_BLOCKS_ALGORITHM_STC
+ at -Os and up.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * trans-mem.c (is_tm_pure_call): Use gimple_call_flags for
+ internal functions.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * builtins.def: #undef DEF_BUILTIN and DEF_BUILTIN_CHKP
+ * builtins.c, genmatch.c, tree-core.h: Don't undef them here.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * internal-fn.def: #undef DEF_INTERNAL_FN at the end.
+ * internal-fn.c: Don't undef it here.
+ * tree-core.h: Likewise.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * builtins.c (fold_builtin_nan): Delete.
+ (fold_builtin_memcmp): Remove case where both arguments are constant.
+ (fold_builtin_strcmp, fold_builtin_strncmp): Likewise.
+ (fold_builtin_strspn, fold_builtin_strcspn): Likewise.
+ (fold_builtin_1): Remove BUILT_IN_NAN* handling.
+ * fold-const-call.c: Include fold-const.h.
+ (host_size_t_cst_p): New function.
+ (build_cmp_result, fold_const_builtin_nan): Likewise.
+ (fold_const_call_1): New function, split out from...
+ (fold_const_call): ...here (for all three interfaces). Handle
+ constant nan, nans, strlen, strcmp, strncmp, strspn and strcspn.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * builtins.c (fold_builtin_bitop, fold_builtin_bswap): Delete.
+ (fold_builtin_1): Don't call them.
+ * fold-const-call.c: Include tm.h.
+ (fold_const_call_ss): New variant for integer-to-integer folds.
+ (fold_const_call): Call it.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * builtins.c (fold_builtin_classify): Move constant cases to...
+ * fold-const-call.c (fold_const_call_ss): ...here.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * builtins.h (c_getstr): Move to...
+ * fold-const.h (c_getstr): ...here.
+ * builtins.c (c_getstr): Move to...
+ * fold-const.c (c_getstr): ...here.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * builtins.def (BUILTIN_RINT, BUILTIN_RINTF, BUILTIN_RINTL): Use
+ ATTR_MATHFN_FPROUNDING rather than ATTR_MATHFN_FPROUNDING_ERRNO.
+
+2015-11-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * tree-call-cdce.c (shrink_wrap_one_built_in_call): Try to update
+ the dominance info; free it if we can't.
+ (pass_call_cdce::execute): Don't free the dominance info here.
+
+2015-11-06 Jeff Law <law@redhat.com>
+
+ * tree-ssa-threadedge.c (dummy_simplify): Remove.
+ (thread_around_empty_blocks): Remove backedge_seen_p argument.
+ If we thread to a backedge, then return false. Update recursive
+ call to eliminate backedge_seen_p argument.
+ (thread_through_normal_block): Remove backedge_seen_p argument.
+ Remove backedge_seen_p argument from calls to
+ thread_around_empty_blocks. Remove checks on backedge_seen_p.
+ If we thread to a backedge, then return 0.
+ (thread_across_edge): Remove bookkeeping for backedge_seen. Don't
+ pass it to thread_through_normal_block or thread_through_empty_blocks.
+ For joiner handling, if we see a backedge, do not try normal
+ threading.
+
+2015-11-06 Abderrazek Zaafrani <a.zaafrani@samsung.com>
+
+ * graphite-optimize-isl.c (optimize_isl): Call isl_union_map_is_equal.
+ * graphite-poly.c (new_scop): Initialize original_schedule.
+ (free_scop): Free original_schedule.
+ * graphite-poly.h (struct scop): Add field original_schedule.
+ * graphite-sese-to-poly.c (build_scop_original_schedule): New.
+ (build_poly_scop): Call build_scop_original_schedule.
+
+2015-11-06 Abderrazek Zaafrani <a.zaafrani@samsung.com>
+
+ * graphite-sese-to-poly.c (build_pbb_scattering_polyhedrons): Remove.
+ (build_pbb_minimal_scattering_polyhedrons): New.
+ (build_scop_scattering): Remove.
+ (build_scop_minimal_scattering): New.
+ (build_scop_scattering): Call build_pbb_minimal_scattering_polyhedrons.
+ (build_poly_scop): Call build_scop_minimal_scattering.
+
+2015-11-06 Jeff Law <law@redhat.com>
+
+ * cfg-flags.def (IGNORE): New edge flag.
+ * tree-vrp.c (identify_jump_threads): Mark and clear edges
+ scheduled for removal with EDGE_IGNORE around call into
+ jump threader. Do no thread across edges with EDGE_IGNORE,
+ but do allow threading across those with EDGE_DFS_BACK.
+
+2015-11-06 David Wohlferd <dw@LimeGreenSocks.com>
+
+ * doc/md.texi (multi-alternative constraints): Don't document
+ alternatives inherently tied to reload for the user documentation.
+
+2015-11-06 Michael Collison <michael.collison@linaro.org
+ Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ Revert:
+ 2015-08-01 Michael Collison <michael.collison@linaro.org
+ Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ * config/arm/arm.md (*arm_smin_cmp): New pattern.
+ (*arm_umin_cmp): Likewise.
+
+2015-11-06 Jakub Jelinek <jakub@redhat.com>
+
+ * gimplify.c (gimplify_omp_ordered): Fix up diagnostics
+ wording.
+ * omp-low.c (check_omp_nesting_restrictions): Update for the
+ various new OpenMP 4.5 nesting restrictions, clarified
+ nesting glossary, closely nested region relationship clarified
+ to mean explicit or implicit parallel regions (target/teams),
+ use %</%> or %qs where appropriate.
+
+2015-11-06 Aditya Kumar <aditya.k7@samsung.com>
+ Sebastian Pop <s.pop@samsung.com>
+
+ * graphite-scop-detection.c (loop_is_valid_scop): Call
+ optimize_loop_nest_for_speed_p.
+
+2015-11-06 Aditya Kumar <aditya.k7@samsung.com>
+ Sebastian Pop <s.pop@samsung.com>
+
+ * graphite-optimize-isl.c (optimize_isl): Call
+ isl_options_set_schedule_maximize_band_depth.
+
+2015-11-06 Aditya Kumar <aditya.k7@samsung.com>
+ Sebastian Pop <s.pop@samsung.com>
+
+ * graphite-scop-detection.c (scop_detection::merge_sese): Entry
+ and exit edges should not be a part of irreducible loop.
+ (scop_detection::can_represent_loop_1): Loops should not be
+ irreducible.
+ (scop_detection::harmful_stmt_in_region): All the basic block
+ should belong to reducible loops.
+
+2015-11-06 Christophe Lyon <christophe.lyon@linaro.org>
+
+ * config/aarch64/aarch64-simd-builtins.def: Update builtins
+ tables: add tbl3v16qi, qtbl[34]*, tbx4v16qi, qtbx[34]*.
+ * config/aarch64/aarch64-simd.md (aarch64_tbl3v8qi): Rename to...
+ (aarch64_tbl3<mode>) ... this, which supports v16qi too.
+ (aarch64_tbx4v8qi): Rename to...
+ aarch64_tbx4<mode>): ... this.
+ (aarch64_qtbl3<mode>): New pattern.
+ (aarch64_qtbx3<mode>): New pattern.
+ (aarch64_qtbl4<mode>): New pattern.
+ (aarch64_qtbx4<mode>): New pattern.
+ * config/aarch64/arm_neon.h (vqtbl2_s8, vqtbl2_u8, vqtbl2_p8)
+ (vqtbl2q_s8, vqtbl2q_u8, vqtbl2q_p8, vqtbl3_s8, vqtbl3_u8)
+ (vqtbl3_p8, vqtbl3q_s8, vqtbl3q_u8, vqtbl3q_p8, vqtbl4_s8)
+ (vqtbl4_u8, vqtbl4_p8, vqtbl4q_s8, vqtbl4q_u8, vqtbl4q_p8)
+ (vqtbx2_s8, vqtbx2_u8, vqtbx2_p8, vqtbx2q_s8, vqtbx2q_u8)
+ (vqtbx2q_p8, vqtbx3_s8, vqtbx3_u8, vqtbx3_p8, vqtbx3q_s8)
+ (vqtbx3q_u8, vqtbx3q_p8, vqtbx4_s8, vqtbx4_u8, vqtbx4_p8)
+ (vqtbx4q_s8, vqtbx4q_u8, vqtbx4q_p8): Rewrite using builtin
+ functions.
+
+2015-11-06 Mike Stump <mikestump@comcast.net>
+
+ PR debug/66728
+ * dwarf2out.c (get_full_len): Return a value based upon the actual
+ precision needed for the value.
+ (add_const_value_attribute): Use a maximal wide-int for
+ CONST_WIDE_INTs, not VOIDmode.
+ (output_die): Don't ever output NULL with printf.
+
+ * rtl.h (get_precision of rtx_mode_t): Ensure we never process
+ BLKmode nor VOIDmode values.
+
+2015-11-06 David Malcolm <dmalcolm@redhat.com>
+
+ * diagnostic-color.c (color_dict): Eliminate "caret"; add "range1"
+ and "range2".
+ (parse_gcc_colors): Update comment to describe default GCC_COLORS.
+ * diagnostic-core.h (warning_at_rich_loc): New declaration.
+ (error_at_rich_loc): New declaration.
+ (permerror_at_rich_loc): New declaration.
+ (inform_at_rich_loc): New declaration.
+ * diagnostic-show-locus.c (adjust_line): Delete.
+ (struct point_state): New struct.
+ (class colorizer): New class.
+ (class layout_point): New class.
+ (class layout_range): New class.
+ (struct line_bounds): New.
+ (class layout): New class.
+ (colorizer::colorizer): New ctor.
+ (colorizer::~colorizer): New dtor.
+ (layout::layout): New ctor.
+ (layout::print_source_line): New method.
+ (layout::print_annotation_line): New method.
+ (layout::get_state_at_point): New method.
+ (layout::get_x_bound_for_row): New method.
+ (diagnostic_show_locus): Reimplement in terms of class layout.
+ (diagnostic_print_caret_line): Delete.
+ * diagnostic.c (diagnostic_initialize): Replace
+ MAX_LOCATIONS_PER_MESSAGE with rich_location::MAX_RANGES.
+ (diagnostic_set_info_translated): Convert param from location_t
+ to rich_location *. Eliminate calls to set_location on the
+ message in favor of storing the rich_location ptr there.
+ (diagnostic_set_info): Convert param from location_t to
+ rich_location *.
+ (diagnostic_build_prefix): Break out array into...
+ (diagnostic_kind_color): New variable.
+ (diagnostic_get_color_for_kind): New function.
+ (diagnostic_report_diagnostic): Colorize the option_text
+ using the color for the severity.
+ (diagnostic_append_note): Update for change in signature of
+ diagnostic_set_info.
+ (diagnostic_append_note_at_rich_loc): New function.
+ (emit_diagnostic): Update for change in signature of
+ diagnostic_set_info.
+ (inform): Likewise.
+ (inform_at_rich_loc): New function.
+ (inform_n): Update for change in signature of diagnostic_set_info.
+ (warning): Likewise.
+ (warning_at): Likewise.
+ (warning_at_rich_loc): New function.
+ (warning_n): Update for change in signature of diagnostic_set_info.
+ (pedwarn): Likewise.
+ (permerror): Likewise.
+ (permerror_at_rich_loc): New function.
+ (error): Update for change in signature of diagnostic_set_info.
+ (error_n): Likewise.
+ (error_at): Likewise.
+ (error_at_rich_loc): New function.
+ (sorry): Update for change in signature of diagnostic_set_info.
+ (fatal_error): Likewise.
+ (internal_error): Likewise.
+ (internal_error_no_backtrace): Likewise.
+ (source_range::debug): New function.
+ * diagnostic.h (struct diagnostic_info): Eliminate field
+ "override_column". Add field "richloc".
+ (struct diagnostic_context): Add field "colorize_source_p".
+ (diagnostic_override_column): Delete.
+ (diagnostic_set_info): Convert param from location_t to
+ rich_location *.
+ (diagnostic_set_info_translated): Likewise.
+ (diagnostic_append_note_at_rich_loc): New function.
+ (diagnostic_num_locations): New function.
+ (diagnostic_expand_location): Get the location from the
+ rich_location.
+ (diagnostic_print_caret_line): Delete.
+ (diagnostic_get_color_for_kind): New declaration.
+ * genmatch.c (linemap_client_expand_location_to_spelling_point): New.
+ (error_cb): Update for change in signature of "error" callback.
+ (fatal_at): Likewise.
+ (warning_at): Likewise.
+ * input.c (linemap_client_expand_location_to_spelling_point): New.
+ * pretty-print.c (text_info::set_range): New method.
+ (text_info::get_location): New method.
+ * pretty-print.h (MAX_LOCATIONS_PER_MESSAGE): Eliminate this macro.
+ (struct text_info): Eliminate "locations" array in favor of
+ "m_richloc", a rich_location *.
+ (textinfo::set_location): Add a "caret_p" param, and reimplement
+ in terms of a call to set_range.
+ (textinfo::get_location): Eliminate inline implementation in favor of
+ an out-of-line reimplementation.
+ (textinfo::set_range): New method.
+ * rtl-error.c (diagnostic_for_asm): Update for change in signature
+ of diagnostic_set_info.
+ * tree-diagnostic.c (default_tree_printer): Update for new
+ "caret_p" param for textinfo::set_location.
+ * tree-pretty-print.c (percent_K_format): Likewise.
+
+2015-11-06 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ Properly apply.
+ 2015-11-05 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+ * config/aarch64/aarch64.c
+ (aarch64_can_use_per_function_literal_pools_p): New.
+ (aarch64_use_blocks_for_constant_p): Adjust declaration
+ and use aarch64_can_use_function_literal_pools_p.
+ (aarch64_select_rtx_section): Update.
+
+2015-11-06 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * config/arm/arm-ldmstm.ml: Rewrite to generate unified asm templates.
+ * config/arm/arm.c (arm_asm_trampoline_template): Make unified asm safe.
+ (arm_output_multireg_pop): Likewise.
+ (output_move_double): Likewise.
+ (output_move_quad): Likewise.
+ (output_return_instruction): Likewise.
+ (arm_print_operand): Remove support for %( and %. print modifiers.
+ (arm_output_shift): Make unified asm.
+ (arm_declare_function_name): Likewise.
+ * config/arm/arm.h (TARGET_UNIFIED_ASM): Delete.
+ (ASM_APP_OFF): Adjust.
+ (ASM_OUTPUT_REG_PUSH): Undo special casing for TARGET_ARM.
+ (ASM_OUTPUT_REG_POP): Likewise.
+ * config/arm/arm.md: Adjust uses of %., %(, %)
+ * config/arm/sync.md: Likewise.
+ * config/arm/thumb2.md: Likewise.
+ * config/arm/ldmstm.md: Regenerate.
+ * config/arm/arm.opt (masm-unified-syntax): Do not special case Thumb.
+ * doc/invoke.texi (masm-unified-syntax): Update documentation.
+
+2015-11-06 David Malcolm <dmalcolm@redhat.com>
+
+ * input.c (dump_line_table_statistics): Dump stats on adhoc table.
+
+2015-11-07 Jan Hubicka <hubicka@ucw.cz>
+
+ * tree-core.h (size_type_kind): Remove OEP_CONSTANT_ADDRESS_OF and
+ add OEP_MATCH_SIDE_EFFECTS.
+ * fold-const.c (operand_equal_p): Update documentation; handle
+ OEP_MATCH_SIDE_EFFECTS.
+ * tree-ssa-tail-merge.c (gimple_operand_equal_value_p): Use
+ OEP_MATCH_SIDE_EFFECTS.
+
+2015-11-06 Benedikt Huber <benedikt.huber@theobroma-systems.com>
+ Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+
+ * config/aarch64/aarch64-builtins.c: Builtins for rsqrt and rsqrtf.
+ * config/aarch64/aarch64-protos.h: Declare.
+ * config/aarch64/aarch64-simd.md: Matching expressions for frsqrte and
+ frsqrts.
+ * config/aarch64/aarch64-tuning-flags.def: Added recip_sqrt.
+ * config/aarch64/aarch64.c: New functions. Emit rsqrt estimation code when
+ applicable.
+ * config/aarch64/aarch64.md: Added enum entries.
+ * config/aarch64/aarch64.opt: Added option -mlow-precision-recip-sqrt.
+ * testsuite/gcc.target/aarch64/rsqrt_asm_check_common.h: Common macros for
+ assembly checks.
+ * testsuite/gcc.target/aarch64/rsqrt_asm_check_negative_1.c: Make sure
+ frsqrts and frsqrte are not emitted.
+ * testsuite/gcc.target/aarch64/rsqrt_asm_check_1.c: Make sure frsqrts and
+ frsqrte are emitted.
+ * testsuite/gcc.target/aarch64/rsqrt_1.c: Functional tests for rsqrt.
+
+2015-11-07 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/68057
+ PR ipa/68220
+ * ipa-polymorphic-call.c
+ (ipa_polymorphic_call_context::restrict_to_inner_type): Fix ordering
+ issue when offset is out of range.
+ (contains_type_p): Fix out of range check, clear dynamic flag.
+
+2015-11-06 Arnout Vandecappelle <arnout@mind.be>
+
+ * config.gcc (e6500): Fix cpu_is_64bit typo.
+
+2015-11-06 Alan Lawrence <alan.lawrence@arm.com>
+
+ * tree-sra.c (completely_scalarize): Properly handle negative array
+ indices using offset_int.
+
+2015-11-06 Richard Biener <rguenther@suse.de>
+
+ * alloc-pool.h (object_allocator::allocate): Default-initialize
+ object.
+
+2015-11-06 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-sccvn.c (class sccvn_dom_walker): Add destructor.
+ * lra.c (init_reg_info): Truncate copy_vec instead of
+ re-allocating a new one and leaking the old.
+ * ipa-inline-analysis.c (estimate_function_body_sizes): Free
+ bb_infos vec.
+ * sched-deps.c (sched_deps_finish): Free the dn/dl pools.
+ * postreload-gcse.c (free_mem): Free modify_mem_list and
+ canon_modify_mem_list.
+
+2015-11-06 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ PR tree-optimization/68145
+ * tree-vect-stmts.c (vectorizable_operation): Fix
+ determination for booleans.
+
+2015-11-06 Tom de Vries <tom@codesourcery.com>
+
+ * tree-cfg.c (gimple_split_block_before_cond_jump): Split before
+ cond_jump, instead of split after last nondebug insn before cond_jump.
+ * tree-parloops.c (transform_to_exit_first_loop_alt): Verify ssa before
+ returning.
+
+2015-11-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/68088
+ * config/arm/aarch-common.c (aarch_accumulator_forwarding): Strip
+ subregs from accumulator and make sure it's a register.
+
+2015-11-06 Simon Dardis <simon.dardis@imgtec.com>
+
+ * config/mips/loongson.md (vec_loongson_extract_lo_<mode>): New, extract
+ low part to scalar.
+ (reduc_uplus_<mode>): Remove.
+ (reduc_plus_scal_<mode>): Rename from reduc_splus_<mode>, Use vec
+ loongson_extract_lo_<mode>.
+ (reduc_smax_scal_<mode>, reduc_smin_scal_<mode>): Rename from
+ reduc_smax_<mode>, reduc_smax_<mode>, use vec
+ loongson_extract_lo_<mode>.
+ (reduc_umax_scal_<mode>, reduc_umin_scal_<mode>): Rename.
+
+2015-11-06 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (struct _bb_vec_info): Add region_begin/end
+ members.
+ (vect_stmt_in_region_p): Declare.
+ * tree-vect-slp.c (new_bb_vec_info): Work on a region.
+ (destroy_bb_vec_info): Likewise.
+ (vect_bb_slp_scalar_cost): Use vect_stmt_in_region_p.
+ (vect_get_and_check_slp_defs): Likewise.
+ (vect_slp_analyze_bb_1): Refactor to make it work on sub-BBs.
+ (vect_slp_bb): Likewise.
+ * tree-vect-patterns.c (vect_same_loop_or_bb_p): Implement
+ in terms of vect_stmt_in_region_p.
+ (vect_pattern_recog): Iterate over the BB region.
+ * tree-vect-stmts.c (vect_is_simple_use): Use vect_stmt_in_region_p.
+ * tree-vectorizer.c (vect_stmt_in_region_p): New function.
+ (pass_slp_vectorize::execute): Initialize all stmt UIDs to -1.
+ * config/i386/i386.c: Include gimple-iterator.h.
+ * config/aarch64/aarch64.c: Likewise.
+
+2015-11-06 Alexandre Oliva <aoliva@redhat.com>
+
+ PR rtl-optimization/67753
+ PR rtl-optimization/64164
+ * function.c (assign_parm_setup_block): Avoid allocating a
+ stack slot if we don't have an ABI-reserved one. Emit the
+ copy to target_reg in the conversion seq if the copy from
+ entry_parm is in it too. Don't use the conversion seq to copy
+ a PARALLEL to a REG or a CONCAT.
+
+2015-11-06 Richard Biener <rguenther@suse.de>
+
+ * tree-hash-traits.h (tree_operand_hash): Provide equal, not
+ equal_keys.
+
+2015-11-05 Cesar Philippidis <cesar@codesourcery.com>
+ Thomas Schwinge <thomas@codesourcery.com>
+ James Norris <jnorris@codesourcery.com>
+
+
+ * gimplify.c (gimplify_scan_omp_clauses): Add support for
+ OMP_CLAUSE_TILE. Update handling of OMP_CLAUSE_INDEPENDENT.
+ (gimplify_adjust_omp_clauses): Likewise.
+ * omp-low.c (scan_sharing_clauses): Add support for OMP_CLAUSE_TILE.
+ * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_TILE.
+ * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_TILE.
+ * tree.c (omp_clause_num_ops): Add an entry for OMP_CLAUSE_TILE.
+ (omp_clause_code_name): Likewise.
+ (walk_tree_1): Handle OMP_CLAUSE_TILE.
+ * tree.h (OMP_TILE_LIST): New macro.
+
+2015-11-05 Martin Sebor <msebor@redhat.com>
+
+ PR c++/67942
+ * doc/invoke.texi (-Wplacement-new): Document new option.
+
+2015-11-05 Alan Lawrence <alan.lawrence@arm.com>
+
+ PR tree-optimization/65963
+ * tree-scalar-evolution.c (interpret_rhs_expr): Try to handle
+ LSHIFT_EXPRs as equivalent unsigned MULT_EXPRs.
+
+2015-11-05 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * ifcvt.c (bb_ok_for_noce_convert_multiple_sets): New.
+ (noce_convert_multiple_sets): Likewise.
+ (noce_process_if_block): Call them.
+
+2015-11-05 Nathan Sidwell <nathan@codesourcery.com>
+
+ * gimple-fold.c: Include omp-low.h.
+ (fold_internal_goacc_dim): New.
+ (gimple_fold_call): Call it.
+
+2015-11-05 Jakub Jelinek <jakub@redhat.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+
+ * builtin-types.def
+ (BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR): Remove.
+ (BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_INT_INT): New.
+ * cgraph.h (enum cgraph_simd_clone_arg_type): Add
+ SIMD_CLONE_ARG_TYPE_LINEAR_REF_VARIABLE_STEP,
+ SIMD_CLONE_ARG_TYPE_LINEAR_UVAL_VARIABLE_STEP and
+ SIMD_CLONE_ARG_TYPE_LINEAR_VAL_VARIABLE_STEP.
+ (struct cgraph_simd_clone_arg): Adjust comment.
+ * omp-builtins.def (BUILT_IN_GOMP_TARGET): Rename GOMP_target_41
+ to GOMP_target_ext. Add num_teams and thread_limit arguments.
+ (BUILT_IN_GOMP_TARGET_DATA): Rename GOMP_target_data_41
+ to GOMP_target_data_ext.
+ (BUILT_IN_GOMP_TARGET_UPDATE): Rename GOMP_target_update_41
+ to GOMP_target_update_ext.
+ (BUILT_IN_GOMP_LOOP_NONMONOTONIC_DYNAMIC_START,
+ BUILT_IN_GOMP_LOOP_NONMONOTONIC_GUIDED_START,
+ BUILT_IN_GOMP_LOOP_NONMONOTONIC_DYNAMIC_NEXT,
+ BUILT_IN_GOMP_LOOP_NONMONOTONIC_GUIDED_NEXT,
+ BUILT_IN_GOMP_LOOP_ULL_NONMONOTONIC_DYNAMIC_START,
+ BUILT_IN_GOMP_LOOP_ULL_NONMONOTONIC_GUIDED_START,
+ BUILT_IN_GOMP_LOOP_ULL_NONMONOTONIC_DYNAMIC_NEXT,
+ BUILT_IN_GOMP_LOOP_ULL_NONMONOTONIC_GUIDED_NEXT,
+ BUILT_IN_GOMP_PARALLEL_LOOP_NONMONOTONIC_DYNAMIC,
+ BUILT_IN_GOMP_PARALLEL_LOOP_NONMONOTONIC_GUIDED): New built-ins.
+ * tree-core.h (enum omp_clause_schedule_kind): Add
+ OMP_CLAUSE_SCHEDULE_MASK, OMP_CLAUSE_SCHEDULE_MONOTONIC,
+ OMP_CLAUSE_SCHEDULE_NONMONOTONIC and change
+ OMP_CLAUSE_SCHEDULE_LAST value.
+ * tree.def (OMP_SIMD, CILK_SIMD, CILK_FOR, OMP_DISTRIBUTE,
+ OMP_TASKLOOP, OACC_LOOP): Add OMP_FOR_ORIG_DECLS argument.
+ * tree.h (OMP_FOR_ORIG_DECLS): Use OMP_LOOP_CHECK instead of
+ OMP_FOR_CHECK. Remove comment.
+ * tree-pretty-print.c (dump_omp_clause): Handle
+ GOMP_MAP_FIRSTPRIVATE_REFERENCE and GOMP_MAP_ALWAYS_POINTER.
+ Simplify. Print schedule clause modifiers.
+ * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
+ SIMD_CLONE_ARG_TYPE_LINEAR_{REF,VAL,UVAL}_VARIABLE_STEP
+ cases.
+ * gimplify.c (enum gimplify_omp_var_data): Add GOVD_MAP_ALWAYS_TO.
+ (omp_default_clause): Tweak for
+ private/firstprivate/is_device_ptr variables on target
+ construct and use_device_ptr on target data.
+ (omp_check_private): Likewise.
+ (omp_notice_variable): For references check whether what it refers
+ to has mappable type, rather than the reference itself.
+ (omp_is_private): Diagnose linear iteration variables on non-simd
+ constructs.
+ (omp_no_lastprivate): Return true only for Fortran.
+ (gimplify_scan_omp_clauses): Or in GOVD_MAP_ALWAYS_TO for
+ GOMP_MAP_ALWAYS_TO or GOMP_MAP_ALWAYS_TOFROM kinds.
+ Add support for GOMP_MAP_FIRSTPRIVATE_REFERENCE and
+ GOMP_MAP_ALWAYS_POINTER, remove old handling of structure element
+ based array sections. Use GOMP_MAP_ALWAYS_P. Fix up handling of
+ lastprivate and linear when combined with distribute. Gimplify
+ variable low-bound for array reduction. Look through
+ POINTER_PLUS_EXPR when looking for ADDR_EXPR for array section
+ reductions.
+ (gimplify_adjust_omp_clauses_1): For implicit references to
+ variables with reference type and when not ref to scalar or
+ ref to pointer, map what they refer to using tofrom and
+ use GOMP_MAP_FIRSTPRIVATE_REFERENCE for the reference.
+ (gimplify_adjust_omp_clauses): Remove GOMP_MAP_ALWAYS_POINTER
+ from target exit data. Handle GOMP_MAP_FIRSTPRIVATE_REFERENCE.
+ Drop OMP_CLAUSE_MAP_PRIVATE support. Use GOMP_MAP_ALWAYS_P.
+ Diagnose the same var on both firstprivate and lastprivate on
+ distribute construct.
+ (gimplify_omp_for): Fix up handling of predetermined
+ lastprivate or linear iter vars when combined with distribute.
+ (find_omp_teams, computable_teams_clause, optimize_target_teams): New
+ functions.
+ (gimplify_omp_workshare): Call optimize_target_teams.
+ * omp-low.c (struct omp_region): Add sched_modifiers field.
+ (struct omp_for_data): Likewise.
+ (omp_any_child_fn_dumped): New variable.
+ (extract_omp_for_data): Fill in sched_modifiers, and mask out
+ OMP_CLAUSE_SCHEDULE_KIND bits outside of OMP_CLAUSE_SCHEDULE_MASK
+ from sched_kind.
+ (determine_parallel_type): Use only OMP_CLAUSE_SCHEDULE_MASK
+ bits of OMP_CLAUSE_SCHED_KIND.
+ (scan_sharing_clauses): Handle GOMP_MAP_FIRSTPRIVATE_REFERENCE,
+ drop OMP_CLAUSE_MAP_PRIVATE support. Look through POINTER_PLUS_EXPR
+ for array section reductions.
+ (add_taskreg_looptemp_clauses): Add one extra _looptemp_ clause even
+ for distribute parallel for, if there are lastprivate clauses on the
+ for.
+ (lower_rec_input_clauses): Handle non-zero low-bound on array
+ section reductions.
+ (lower_reduction_clauses): Likewise.
+ (lower_send_clauses): Look through POINTER_PLUS_EXPR
+ for array section reductions.
+ (expand_parallel_call): Use nonmonotonic entrypoints for
+ nonmonotonic: dynamic/guided.
+ (expand_omp_taskreg): Call assign_assembler_name_if_neeeded on
+ child_fn if current_function_decl has assembler name set, but child_fn
+ does not. Dump the header and IL of the child function when not in SSA
+ form.
+ (expand_omp_target): Likewise. Pass num_teams and thread_limit
+ arguments to BUILT_IN_GOMP_TARGET.
+ (expand_omp_for_static_nochunk, expand_omp_for_static_chunk):
+ Initialize the extra _looptemp_ clause to fd->loop.n2.
+ (expand_omp_for): Use nonmonotonic entrypoints for
+ nonmonotonic: dynamic/guided. Initialize region->sched_modifiers.
+ (expand_omp): Clear omp_any_child_fn_dumped. Dump function header
+ again if we have dumped any child functions.
+ (lower_omp_for_lastprivate): Determine the right count variable
+ for distribute simd, or distribute parallel for{, simd}.
+ (lower_omp_target): Handle GOMP_MAP_FIRSTPRIVATE_REFERENCE
+ and GOMP_MAP_ALWAYS_POINTER. Drop OMP_CLAUSE_MAP_PRIVATE
+ support.
+ (simd_clone_clauses_extract): Handle variable step
+ for references and arguments passed by reference.
+ (simd_clone_mangle): Mangle ref/uval/val variable steps.
+ (simd_clone_adjust_argument_types): Handle
+ SIMD_CLONE_ARG_TYPE_LINEAR_UVAL_VARIABLE_STEP like
+ SIMD_CLONE_ARG_TYPE_LINEAR_UVAL_CONSTANT_STEP and
+ SIMD_CLONE_ARG_TYPE_LINEAR_VAL_VARIABLE_STEP like
+ SIMD_CLONE_ARG_TYPE_LINEAR_VAL_CONSTANT_STEP.
+ (simd_clone_linear_addend): New function.
+ (simd_clone_adjust): Handle variable step like similarly
+ to constant step, use simd_clone_linear_addend to determine
+ the actual step at runtime.
+
+2015-11-05 Nathan Sidwell <nathan@codesourcery.com>
+
+ * target.def (goacc.dim_limit): New hook.
+ * targhooks.h (default_goacc_dim_limit): Declare.
+ * doc/tm.texi.in (TARGET_GOACC_DIM_LIMIT): Add.
+ * doc/tm.texi: Rebuilt.
+ * omp-low.h (get_oacc_fn_dim_size, get_oacc_ifn_dim_arg): Declare.
+ * omp-low.c (get_oacc_fn_dim_size, get_oacc_ifn_dim_arg): New.
+ (default_goacc_dim_limit): New.
+ * config/nvptx/nvptx.c (PTX_VECTOR_LENGTH, PTX_WORKER_LENGTH): New.
+ (nvptx_goacc_dim_limit) New.
+ (TARGET_GOACC_DIM_LIMIT): Override.
+ * tree-vrp.c: Include omp-low.h, target.h.
+ (extract_range_basic): Add handling for IFN_GOACC_DIM_SIZE &
+ IFN_GOACC_DIM_POS.
+
+2015-11-05 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ * tree-vect-generic.c (do_compare): Use -1 for true
+ result instead of 1.
+
+2015-11-05 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * config/aarch64/aarch64.c
+ (aarch64_can_use_per_function_literal_pools_p): New.
+ (aarch64_use_blocks_for_constant_p): Adjust declaration
+ and use aarch64_can_use_function_literal_pools_p.
+ (aarch64_select_rtx_section): Update.
+
+2015-11-05 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ * targhooks.c (default_get_mask_mode): Use BLKmode in
+ case target doesn't support required vector mode.
+ * stor-layout.c (layout_type); Check for BLKmode.
+
+2015-11-04 Aditya Kumar <aditya.k7@samsung.com>
+ Sebastian Pop <s.pop@samsung.com>
+
+ * graphite-isl-ast-to-gimple.c (gcc_expression_from_isl_ast_expr_id):
+ Remove use of parameter_rename_map.
+ (copy_def): Remove.
+ (copy_internal_parameters): Remove.
+ (graphite_regenerate_ast_isl): Remove call to copy_internal_parameters.
+ * sese.c (new_sese_info): Do not initialize parameter_rename_map.
+ (free_sese_info): Do not free parameter_rename_map.
+ (set_rename): Do not use parameter_rename_map.
+ (rename_uses): Update call to set_rename.
+ (graphite_copy_stmts_from_block): Do not use parameter_rename_map.
+ * sese.h (parameter_rename_map_t): Remove.
+ (struct sese_info_t): Remove field parameter_rename_map.
+
+2015-11-04 Aditya Kumar <aditya.k7@samsung.com>
+ Sebastian Pop <s.pop@samsung.com>
+
+ * graphite-isl-ast-to-gimple.c: Include tree-cfg.h.
+ (translate_isl_ast_node_user): Add more dumps: call print_loops_bb.
+ * graphite-scop-detection.c (dot_all_scops_1): Moved out of
+ anonymous namespace.
+ * graphite-sese-to-poly.c (ssa_name_version_typesize): Remove.
+ (isl_id_for_pbb): Use a buffer of size 10.
+ (isl_id_for_ssa_name): Same.
+ * sese.c (set_rename): Add more dumps.
+
+2015-11-04 Nathan Sidwell <nathan@codesourcery.com>
+
+ * omp-low.c (struct omp_context): Remove reduction_map field.
+ (lookup_oacc_reduction, maybe_lookup_oacc_reduction): Delete.
+ (new_omp_context, delete_omp_context, scan_omp_target): Remove
+ reduction_map handling.
+ (lower_omp_target): Remove obsolete openacc reduction handling.
+
+2015-11-04 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Add checking.
+
+2015-11-04 Nathan Sidwell <nathan@codesourcery.com>
+ Cesar Philippidis <cesar@codesourcery.com>
+
+ * config/nvptx/nvptx.c: Include gimple headers.
+ (worker_red_size, worker_red_align, worker_red_name,
+ worker_red_sym): New.
+ (nvptx_option_override): Initialize worker reduction buffer.
+ (nvptx_file_end): Write out worker reduction buffer var.
+ (nvptx_expand_shuffle, nvptx_expand_worker_addr,
+ nvptx_expand_cmp_swap): New builtin expanders.
+ (enum nvptx_builtins): New.
+ (nvptx_builtin_decls): New.
+ (nvptx_builtin_decl, nvptx_init_builtins, nvptx_expand_builtin): New
+ (PTX_VECTOR_LENGTH, PTX_WORKER_LENGTH): New.
+ (nvptx_get_worker_red_addr, nvptx_generate_vector_shuffle,
+ nvptx_lockless_update): New helpers.
+ (nvptx_goacc_reduction_setup, nvptx_goacc_reduction_init,
+ nvptx_goacc_reduction_fini, nvptx_goacc_reduction_teaddown): New.
+ (nvptx_goacc_reduction): New.
+ (TARGET_INIT_BUILTINS, TARGET_EXPAND_BUILTIN,
+ TARGET_BUILTIN_DECL): Override.
+ (TARGET_GOACC_REDUCTION): Override.
+
+2015-11-04 Nathan Sidwell <nathan@codesourcery.com>
+ Cesar Philippidis <cesar@codesourcery.com>
+
+ * internal-fn.def (GOACC_REDUCTION): New.
+ * internal-fn.h (enum ifn_goacc_reduction_kind): New.
+ * internal-fn.c (expand_GOACC_REDUCTION): New.
+ * target.def (goacc.reduction): New OpenACC hook.
+ * targhooks.h (default_goacc_reduction): Declare.
+ * doc/tm.texi.in: Add TARGET_GOACC_REDUCTION.
+ * doc/tm.texi: Rebuilt.
+ * omp-low.c (oacc_get_reduction_array_id, oacc_max_threads,
+ scan_sharing_clauses): Remove oacc reduction handling here.
+ (lower_rec_input_clauses): Don't handle OpenACC reductions here.
+ (oacc_lower_reduction_var_helper): Delete.
+ (lower_oacc_reductions): New.
+ (lower_reduction_clauses): Don't handle OpenACC reductions here.
+ (lower_oacc_head_tail): Call lower_oacc_reductions.
+ (oacc_gimple_assign, oacc_init_reduction_array,
+ oacc_initialize_reduction_data, oacc_finalize_reduction_data,
+ oacc_process_reduction_data): Delete.
+ (lower_omp_target): Remove old OpenACC reduction handling. Insert
+ dummy OpenACC gang reduction for reductions at outer level.
+ (oacc_loop_xform_head_tail): Transform IFN_GOACC_REDUCTION.
+ (default_goacc_reduction): New.
+ (execute_oacc_device_lower): Handle IFN_GOACC_REDUCTION.
+
+2015-11-04 Martin Liska <mliska@suse.cz>
+
+ * cgraphunit.c (cgraph_node::expand_thunk): Call
+ allocate_struct_function before init_function_start.
+ (cgraph_node::expand): Use push_cfun and pop_cfun.
+ * config/i386/i386.c (ix86_code_end): Call
+ allocate_struct_function before init_function_start.
+ * config/rs6000/rs6000.c (rs6000_code_end): Likewise.
+ * function.c (init_function_start): Move preamble to all
+ callers.
+ * passes.c (do_per_function_toporder): Use push_cfun and pop_cfun.
+ (execute_one_pass): Handle newly added TODO_discard_function.
+ (execute_pass_list_1): Terminate if cfun equals to NULL.
+ (execute_pass_list): Do not push and pop cfun, expect that
+ cfun is set.
+ * tree-pass.h (TODO_discard_function): Define.
+
+2015-11-04 Mikhail Maltsev <maltsevm@gmail.com>
+
+ * cfganal.c (inverted_post_order_compute): Remove conditional
+ compilation, use flag_checking.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * configure.ac: Remove ENABLE_CHECKING.
+ * genconditions.c: Do not #undef ENABLE_CHECKING.
+ * sese.h (bb_in_region): Comment out broken check.
+ * tree-ssa-loop-manip.c (rewrite_into_loop_closed_ssa_1): Remove
+ conditional compilation, use flag_checking.
+
+2015-11-04 Tom de Vries <tom@codesourcery.com>
+
+ PR tree-optimization/67742
+ * tree-ssa-structalias.c (struct fieldoff): Add restrict_pointed_type
+ field.
+ (push_fields_onto_fieldstack): Handle restrict_pointed_type field.
+ (create_variable_info_for_1): Add and handle handle_param parameter.
+ Add restrict handling.
+ (create_variable_info_for): Call create_variable_info_for_1 with extra
+ arg.
+ (make_param_constraints): Drop restrict_name parameter. Ignore
+ vi->only_restrict_pointers.
+ (intra_create_variable_infos): Call create_variable_info_for_1 with
+ extra arg. Remove restrict handling. Call make_param_constraints with
+ one fewer arg.
+
+2015-11-04 Tom de Vries <tom@codesourcery.com>
+
+ * tree-ssa-structalias.c (create_variable_info_for_1): Use decl_type
+ variable.
+
+2015-11-03 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * config/arm/coff.h: Remove.
+
+2015-11-03 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gimple-expr.c (useless_type_conversion_p): Reinstate type canonical
+ check for aggregate types and beef up comment for mode check.
+
+2015-11-03 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-data-refs.c (vect_analyze_data_refs): Do not collect
+ data references here.
+ * tree-vect-loop.c: Include cgraph.h.
+ (vect_analyze_loop_2): Collect data references here.
+ * tree-vect-slp.c (find_bb_location): Inline ...
+ (vect_slp_bb): ... here. Renamed from vect_slp_analyze_bb.
+ Factor in vect_slp_transform_bb.
+ (vect_slp_transform_bb): Removed.
+ (vect_slp_analyze_bb_1): Collect data references here.
+ * tree-vectorizer.c (pass_slp_vectorize::execute): Call
+ vect_slp_bb.
+ * tree-vectorizer.h (vect_slp_bb): Declare.
+ (vect_slp_analyze_bb): Remove.
+ (vect_slp_transform_bb): Remove.
+ (find_bb_location): Remove.
+ (vect_analyze_data_refs): Remove stmt count reference parameter.
+
+2015-11-03 Evgeny Stupachenko <evstupac@gmail.com>
+
+ * multiple_target.c (create_dispatcher_calls): Add target check
+ on ifunc.
+ (create_target_clone): Change assembler name for versioned declarations.
+
+2015-11-03 Thomas Schwinge <thomas@codesourcery.com>
+ Chung-Lin Tang <cltang@codesourcery.com>
+
+ * builtins.def (DEF_GOMP_BUILTIN): Enable for flag_openacc.
+ * omp-low.c (check_omp_nesting_restrictions): Allow
+ GIMPLE_OMP_ATOMIC_LOAD, GIMPLE_OMP_ATOMIC_STORE inside OpenACC
+ contexts.
+
+2015-11-03 Bilyan Borisov <bilyan.borisov@arm.com>
+
+ * config/aarch64/aarch64-simd-builtins.def (fmulx): New.
+ * config/aarch64/aarch64-simd.md (aarch64_fmulx<mode>): New.
+ * config/aarch64/arm_neon.h (vmulx_f32): Rewrite to call fmulx
+ builtin.
+ (vmulxq_f32): Likewise.
+ (vmulx_f64): New.
+ (vmulxq_f64): Rewrite to call fmulx builtin.
+ (vmulxs_f32): Likewise.
+ (vmulxd_f64): Likewise.
+ (vmulx_lane_f32): Remove.
+ * config/aarch64/iterators.md (UNSPEC): Add fmulx.
+
+2015-11-03 Alan Lawrence <alan.lawrence@arm.com>
+
+ * config/aarch64/aarch64.md (*movhf_aarch64): Use
+ aarch64_reg_or_fp_zero for second operand.
+
+2015-11-03 Alexandre Oliva <aoliva@redhat.com>
+
+ * gimple-expr.c: Include hash-set.h and rtl.h.
+ (mark_addressable_queue): New var.
+ (mark_addressable): Factor actual marking into...
+ (mark_addressable_1): ... this. Queue it up during expand.
+ (mark_addressable_2): New.
+ (flush_mark_addressable_queue): New.
+ * gimple-expr.h (flush_mark_addressable_queue): Declare.
+ * cfgexpand.c: Include gimple-expr.h.
+ (pass_expand::execute): Flush mark_addressable queue.
+
+2015-11-02 Alexandre Oliva <aoliva@redhat.com>
+
+ * tree-ssa-ifcombine.c (tree_ssa_ifcombine_bb_1): Factor out
+ bb_no_side_effects_p tests...
+ (tree_ssa_ifcombine_bb): ... here.
+
+ PR tree-optimization/68083
+ * tree-ssa-ifcombine.c: Include tree-ssa.h.
+ (bb_no_side_effects_p): Test for undefined uses too.
+ * tree-ssa.c (gimple_uses_undefined_value_p): New.
+ * tree-ssa.h (gimple_uses_undefined_value_p): Declare.
+
+2015-11-02 Jeff Law <law@redhat.com>
+
+ * tree-ssa-threadupdate.c (valid_jump_thread_path): Also detect
+ cases where the loop latch edge is in the middle of an FSM path.
+
+2015-11-03 Tom de Vries <tom@codesourcery.com>
+
+ * tree-ssa-structalias.c (make_restrict_var_constraints): Rename to ...
+ (make_param_constraints): ... this. Add and handle restrict_name
+ parameter. Handle is_full_var case.
+ (intra_create_variable_infos): Use make_param_constraints.
+
+2015-11-03 Tom de Vries <tom@codesourcery.com>
+
+ * tree-ssa-structalias.c (make_restrict_var_constraints): Replace
+ make_copy_constraint call with make_constraint_from call.
+
+2015-11-02 Andreas Tobler <andreast@gcc.gnu.org>
+
+ * config/rs6000/freebsd64.h (ASM_SPEC32): Adust spec to handle
+ PIE executables.
+
+2015-11-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * builtins.h (fold_fma): Move to fold-const-call.h.
+ * builtins.c: Include fold-const-call.h.
+ (mathfn_built_in_2): New function, split out from...
+ (mathfn_built_in_1): ...here.
+ (do_real_to_int_conversion, fold_const_builtin_pow)
+ (fold_const_builtin_logb, fold_const_builtin_significand)
+ (fold_const_builtin_load_exponent, do_mpfr_arg1, do_mpfr_arg2)
+ (do_mpfr_arg3, do_mpfr_sincos, do_mpfr_bessel_n, do_mpc_arg1): Delete.
+ (fold_builtin_sincos): Use fold_const_call to handle constants.
+ (fold_builtin_1, fold_builtin_2, fold_builtin_3): Add explicit
+ checks for ERROR_MARK. Use fold_const_call to handle constant
+ folds for math functions.
+ (fold_fma): Move to fold-const-call.c.
+ * fold-const.c: Include fold-const-call.h.
+ * Makefile.in (OBJS): Add fold-const-call.o.
+ (PLUGIN_HEADERS): Add fold-const-call.h.
+ * realmpfr.h (real_from_mpfr): Allow the format to be specified
+ directly.
+ * realmpfr.c (real_from_mpfr): Likewise.
+ * fold-const-call.h, fold-const-call.c: New files.
+
+2015-11-02 Julian Brown <julian@codesourcery.com>
+
+ * config/arm/neon-testgen.ml (emit_epilogue): Remove extraneous
+ brackets and semicolon.
+
+2015-11-02 Alan Lawrence <alan.lawrence@arm.com>
+
+ Revert:
+ 2015-10-27 Alan Lawrence <alan.lawrence@arm.com>
+
+ PR tree-optimization/65963
+ * tree-scalar-evolution.c (interpret_rhs_expr): Handle some
+ LSHIFT_EXPRs as equivalent MULT_EXPRs.
+
+2015-11-02 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR middle-end/68166
+ * fold-const.c: Include "md5.h".
+
+2015-11-01 Jeff Law <law@redhat.com>
+
+ * vmsdbgout.c: Revert unused header file reduction patch.
+
+ * config/mcore/mcore.c: Include regs.h.
+
+2015-10-31 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.c (rs6000_reg_live_or_pic_offset_p): Rewrite.
+
2015-10-31 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.c (rs6000_reg_live_or_pic_offset_p): Use the
* tree-ssa-structalias.c (ipa_pta_execute): Use make_copy_constraint.
-2015-10-30 Jeff Law <jeff@redhat.com>
+2015-10-30 Jeff Law <law@redhat.com>
Nathan Sidwell <nathan@acm.org>
* config/nvptx/nvptx.h (HARD_REGNO_NREGS): Avoid warning on unused
* config/mcore/mcore.c (mcore_reg_ok_for_base_p,
mcore_base_register_rtx_p, mcore_legitimate_index_p,
mcore_legitimate_address_p): New functions.
- (TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Define.
+ (TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Define.
2015-10-29 Jeff Law <law@redhat.com>
2015-10-29 Mikhail Maltsev <maltsevm@gmail.com>
- * genautomata.c: Use CHECKING_P instead of ENABLE_CHECKING.
- * genconditions.c: Define CHECKING_P in the generated code.
- * genextract.c: Use flag_checking in insn_extract.
- * gengtype.c (main): Remove conditional compilation.
- * gengtype.h: Likewise.
+ * genautomata.c: Use CHECKING_P instead of ENABLE_CHECKING.
+ * genconditions.c: Define CHECKING_P in the generated code.
+ * genextract.c: Use flag_checking in insn_extract.
+ * gengtype.c (main): Remove conditional compilation.
+ * gengtype.h: Likewise.
2015-10-29 Jeff Law <law@redhat.com>
* omp-low.c (pass_oacc_device_lower::execute): Ignore errors.
2015-10-27 Nathan Sidwell <nathan@codesourcery.com>
-
+
* internal-fn.c (expand_UNIQUE): New.
* internal-fn.h (enum ifn_unique_kind): New.
* internal-fn.def (IFN_UNIQUE): New.
2015-10-27 Alan Lawrence <alan.lawrence@arm.com>
PR tree-optimization/65963
- * tree-scalar-evolution.c (interpret_rhs_expr): Handle some LSHIFT_EXPRs
- as equivalent MULT_EXPRs.
+ * tree-scalar-evolution.c (interpret_rhs_expr): Handle some
+ LSHIFT_EXPRs as equivalent MULT_EXPRs.
2015-10-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* target.def (get_mask_mode): New.
* targhooks.c (default_get_mask_mode): New.
* targhooks.h (default_get_mask_mode): New.
- * gcc/tree-vect-stmts.c (get_same_sized_vectype): Add special case
+ * tree-vect-stmts.c (get_same_sized_vectype): Add special case
for boolean vector.
* tree.c (MAX_BOOL_CACHED_PREC): New.
(nonstandard_boolean_type_cache): New.
New hook.
* doc/tm.texi.in (TARGET_RELAYOUT_FUNCTION): Document.
* doc/tm.texi (TARGET_RELAYOUT_FUNCTION): New hook.
- * gcc/target.def (TARGET_RELAYOUT_FUNCTION): Likewise.
- * gcc/function.c (allocate_struct_function): Call
+ * target.def (TARGET_RELAYOUT_FUNCTION): Likewise.
+ * function.c (allocate_struct_function): Call
relayout_function hook.
- * gcc/passes.c (rest_of_decl_compilation): Likewise.
+ * passes.c (rest_of_decl_compilation): Likewise.
2015-10-16 Christian Bruel <christian.bruel@st.com>
2015-10-13 Nikolai Bozhenov <n.bozhenov@samsung.com>
- * gcc/rtl.h (print_insn): Fix prototype.
+ * rtl.h (print_insn): Fix prototype.
2015-10-13 Tom de Vries <tom@codesourcery.com>
2015-10-11 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/67864
- * gcc/bb-reorder (reorder_basic_blocks_simple): Prefer existing
+ * bb-reorder (reorder_basic_blocks_simple): Prefer existing
fallthrough edges for conditional jumps. Don't sort candidate
edges if not optimizing for speed.
* config/i386/sse.md (set_attr znver1_decode): Likewise.
* config/i386/x86-tune.def: Add znver1 tunings.
* config/i386/znver1.md: Introduce znver1 cpu and include new md file.
- * gcc/doc/invoke.texi: Add details about znver1
+ * doc/invoke.texi: Add details about znver1
2015-10-06 Richard Biener <rguenther@suse.de>
2015-09-22 Kirill Yukhin <kirill.yukhin@intel.com>
- * gcc/config/i386/i386.md (define_insn "kunpckhi"): Fix
+ * config/i386/i386.md (define_insn "kunpckhi"): Fix
operand in pattern.
(define_insn "kunpcksi"): Ditto.
(define_insn "kunpckdi"): Ditto.
2015-09-22 Kirill Yukhin <kirill.yukhin@intel.com>
- * gcc/config/i386/i386.md (define_split not/xor SWI1248x): Use
+ * config/i386/i386.md (define_split not/xor SWI1248x): Use
iterator instead of fixed modes.
2015-09-22 Matthew Wahab <matthew.wahab@arm.com>
(TARGET_ARM_SAT, TARGET_IDIV, TARGET_HAVE_LDREX)
(TARGET_HAVE_LDREXBH, TARGET_HAVE_LDREXD, TARGET_ARM_FEATURE_LDREX)
(TARGET_DSP_MULTIPLY, TARGET_INT_SIMD): Redefined macros.
- * gcc/config/arm/arm-protos.h (arm_cpu_builtins): Remove declaration.
+ * config/arm/arm-protos.h (arm_cpu_builtins): Remove declaration.
2015-09-15 Alan Lawrence <alan.lawrence@arm.com>
* config/mips/mips-opts.h (mips_cb_setting): New enum.
* config/mips/mips-protos.h: Add definitions for
mips_output_jump and mips_output_equal_conditional_branch
- * gcc/config/mips/mips.c (MIPS_JR): Change to support the
+ * config/mips/mips.c (MIPS_JR): Change to support the
JIC instruction.
(mips_emit_compare): Add support for the MIPS R6 conditional
compact branches.
(mips_trampoline_init): Add compact branch support.
(mips_mult_zero_zero_cost): Allow zero initialisation of
accumulators with TARGET_DSP.
- * gcc/config/mips/mips.h (TARGET_CB_NEVER): New define.
+ * config/mips/mips.h (TARGET_CB_NEVER): New define.
(TARGET_CB_MAYBE): New define.
(TARGET_CB_ALWAYS): New define.
(ISA_HAS_DELAY_SLOTS): New define.
2015-08-26 Matthew Wahab <matthew.wahab@arm.com>
- * gcc/config/arm/arm-cores.def: Add FL_FOR_ARCH flag for each
+ * config/arm/arm-cores.def: Add FL_FOR_ARCH flag for each
ARM_CORE entry. Fix some white-space.
- * gcc/config/arm/arm.c: Remove FL_FOR_ARCH derivation from
+ * config/arm/arm.c: Remove FL_FOR_ARCH derivation from
ARM_CORE definition.
2015-08-26 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
2015-08-05 Lynn Boger <laboger@linux.vnet.ibm.com>
PR target/66870
- * gcc/config/rs6000/rs6000.c (rs6000_emit_prologue): Check
+ * config/rs6000/rs6000.c (rs6000_emit_prologue): Check
for no_split_stack function attribute along with
flag_split_stack.
(rs6000_expand_split_stack_prologue): Likewise.
2015-08-01 Michael Collison <michael.collison@linaro.org
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
- * gcc/config/arm/arm.md (*arm_smin_cmp): New pattern.
+ * config/arm/arm.md (*arm_smin_cmp): New pattern.
(*arm_umin_cmp): Likewise.
2015-08-01 Caroline Tice <cmtice@google.com>
2015-07-27 Wilco Dijkstra <wdijkstr@arm.com>
- * gcc/config/aarch64/aarch64.md (aarch64_lshr_sisd_or_int_<mode>3):
+ * config/aarch64/aarch64.md (aarch64_lshr_sisd_or_int_<mode>3):
Place integer variant first.
(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
* config/aarch64/aarch64-arches.def: Add "armv8.1-a".
* config/aarch64/aarch64-options-extensions.def: Update "fP",
"simd" and "crypto". Add "lse", "pan", "lor" and "rdma".
- * gcc/config/aarch64/aarch64.h (AARCH64_FL_LSE): New.
+ * config/aarch64/aarch64.h (AARCH64_FL_LSE): New.
(AARCH64_FL_PAN): New.
(AARCH64_FL_LOR): New.
(AARCH64_FL_RDMA): New.
2015-06-01 James Greenhalgh <james.greenhalgh@arm.com>
- * gcc/config/arm/arm-protos.h (tune_params): Rename fuseable_ops
+ * config/arm/arm-protos.h (tune_params): Rename fuseable_ops
to fusible_ops.
- * gcc/config/arm/arm.c (arm_print_tune_info): Likewise.
+ * config/arm/arm.c (arm_print_tune_info): Likewise.
(arm_macro_fusion_p): Likewise.
(arm_macro_fusion_pair_p): Likewise.
2015-05-30 Mike Frysinger <vapier@gentoo.org>
- * gcc/config/alpha/elf.h (ASM_SPEC): Add %{mcpu=*:-m%*}.
+ * config/alpha/elf.h (ASM_SPEC): Add %{mcpu=*:-m%*}.
2015-05-28 DJ Delorie <dj@redhat.com>
FPIE2_OR_FPIC2_SPEC.
* config/m68k/netbsd-elf.h (ASM_SPEC): Likewise.
* config/m68k/openbsd.h (ASM_SPEC): Likewise.
- * gcc/config/sol2.h (ASM_PIC_SPEC): Likewise.
+ * config/sol2.h (ASM_PIC_SPEC): Likewise.
* config/arm/freebsd.h (SUBTARGET_EXTRA_ASM_SPEC): Likewise.
* config/arm/netbsd-elf.h (SUBTARGET_EXTRA_ASM_SPEC): Likewise.
* config/arm/semi.h (SUBTARGET_EXTRA_ASM_SPEC): Likewise.
* common/config/rs6000/rs6000-common.c (TARGET_SUPPORTS_SPLIT_STACK):
Define.
(rs6000_supports_split_stack): New function.
- * gcc/config/rs6000/rs6000.c (machine_function): Add
+ * config/rs6000/rs6000.c (machine_function): Add
split_stack_arg_pointer.
(TARGET_EXTRA_LIVE_ON_ENTRY, TARGET_INTERNAL_ARG_POINTER): Define.
(setup_incoming_varargs): Use crtl->args.internal_arg_pointer
rs6000_internal_arg_pointer, rs6000_live_on_entry,
rs6000_split_stack_space_check): New functions.
(rs6000_elf_file_end): Call file_end_indicate_split_stack.
- * gcc/config/rs6000/rs6000.md (UNSPEC_STACK_CHECK): Define.
+ * config/rs6000/rs6000.md (UNSPEC_STACK_CHECK): Define.
(UNSPECV_SPLIT_STACK_RETURN): Define.
(split_stack_prologue, load_split_stack_limit,
load_split_stack_limit_di, load_split_stack_limit_si,
split_stack_return, split_stack_space_check): New expands and insns.
- * gcc/config/rs6000/rs6000-protos.h
+ * config/rs6000/rs6000-protos.h
(rs6000_expand_split_stack_prologue): Declare.
(rs6000_split_stack_space_check): Declare.
2015-05-05 Matthew Wahab <matthew.wahab@arm.com>
- * gcc/config/aarch64-protos.h (struct cpu_branch_cost): New.
+ * config/aarch64-protos.h (struct cpu_branch_cost): New.
(tune_params): Add field branch_costs.
(aarch64_branch_cost): Declare.
- * gcc/config/aarch64.c (generic_branch_cost): New.
+ * config/aarch64.c (generic_branch_cost): New.
(generic_tunings): Set field cpu_branch_cost to generic_branch_cost.
(cortexa53_tunings): Likewise.
(cortexa57_tunings): Likewise.
(thunderx_tunings): Likewise.
(xgene1_tunings): Likewise.
(aarch64_branch_cost): Define.
- * gcc/config/aarch64/aarch64.h (BRANCH_COST): Redefine.
+ * config/aarch64/aarch64.h (BRANCH_COST): Redefine.
2015-05-05 Uros Bizjak <ubizjak@gmail.com>
2015-05-01 Wilco Dijkstra <wdijkstr@arm.com>
- * gcc/config/aarch64/aarch64-protos.h (tune_params):
+ * config/aarch64/aarch64-protos.h (tune_params):
Add min_div_recip_mul_sf and min_div_recip_mul_df fields.
- * gcc/config/aarch64/aarch64.c (aarch64_min_divisions_for_recip_mul):
+ * config/aarch64/aarch64.c (aarch64_min_divisions_for_recip_mul):
Return value depending on target.
(generic_tunings): Initialize new target settings.
(cortexa53_tunings): Likewise.
2015-05-01 Wilco Dijkstra <wdijkstr@arm.com>
- * gcc/config/arm/aarch-cost-tables.h (cortexa53_extra_costs):
+ * config/arm/aarch-cost-tables.h (cortexa53_extra_costs):
Make Cortex-A53 shift costs more accurate.
2015-05-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2015-05-01 Wilco Dijkstra <wdijkstr@arm.com>
- * gcc/config/aarch64/aarch64.c (aarch64_rtx_costs):
+ * config/aarch64/aarch64.c (aarch64_rtx_costs):
Calculate cost of op0 and op1 in PLUS and MINUS cases.
2015-05-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2015-03-02 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65184
- * gcc/config/i386/i386.c (ix86_pass_by_reference) Bounds
- are never passed by reference.
+ * config/i386/i386.c (ix86_pass_by_reference): Bounds are never
+ passed by reference.
2015-03-02 Ilya Enkovich <ilya.enkovich@intel.com>
2015-02-25 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65167
- * gcc/config/i386/i386.c (ix86_function_arg_regno_p): Support
+ * config/i386/i386.c (ix86_function_arg_regno_p): Support
bounds registers.
(avoid_func_arg_motion): Add dependencies for BNDSTX insns.
* config/aarch64/aarch64-cores.def (xgene1): Update/add the
xgene1 (APM XGene-1) core definition.
- * gcc/config/aarch64/aarch64.c: Add cost tables for APM XGene-1
+ * config/aarch64/aarch64.c: Add cost tables for APM XGene-1
* config/arm/aarch-cost-tables.h: Add cost tables for APM XGene-1
* doc/invoke.texi: Document -mcpu=xgene1.
* ipa-icf.c (sem_function::equals_private): Use '&&' instead of
'||' to fix typo issue.
- * gcc/tree.h (target_opts_for_fn): Check NULL_TREE since it can
+ * tree.h (target_opts_for_fn): Check NULL_TREE since it can
accept and return NULL.
2015-01-12 Martin Liska <mliska@suse.cz>
projects / gcc.git / blobdiff