+2018-11-07 Jan Hubicka <jh@suse.cz>
+
+ * ipa-devirt.c (odr_types_equivalent_p): Expect constants
+ than const decls in TREE_VALUE of enum.
+ (dump_type_inheritance_graph): Improve duplicate dumping.
+ (free_enum_values): New.
+ (build_type_inheritance_graph): Use it.
+ * tree.c (free_lang_data_in_type): Free TYPE_VALUES of enums
+ which are not main variants or not ODR types.
+ (verify_type_variant): Expect variants to have no TYPE_VALUES.
+
+2018-11-07 Richard Biener <rguenther@suse.de>
+
+ * ipa-inline.c (want_inline_small_function_p): Compute
+ big_speedup_p lazily and last.
+
+2018-11-07 Jan Hubicka <jh@suse.cz>
+
+ * tree.c (fld_type_variant_equal_p): Skip TYPE_ALIGN check when
+ building incomplete variant of complete type.
+ (fld_type_variant): Do not copy TYPE_ALIGN when building incomplete
+ variant of complete type.
+
+2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/mips/mips.c: Fix typo in documentation of
+ mips_loongson_ext2_prefetch_cookie.
+ (mips_option_override): fix brain twister logical.
+ * config/mips/mips.h: Fix typo in documentation of
+ ISA_HAS_CTZ_CTO and define pattern.
+ * config/mips/mips.md (prefetch): Hoist EXT2 above
+ the 2EF/EXT block.
+ (prefetch_indexed): Hoist EXT2 above the EXT block.
+
+2018-11-07 Jan Hubicka <jh@suse.cz>
+
+ * tree.c (free_lang_data_in_type): Add fld parameter; simplify
+ return and parameter types of function and method types.
+ (free_lang_data_in_cgraph): Update.
+
+2018-11-07 Martin Liska <mliska@suse.cz>
+
+ PR rtl-optimization/87868
+ * postreload-gcse.c (eliminate_partially_redundant_load): Set
+ threshold to max_count if we would overflow.
+ * profile-count.h: Make max_count a public constant.
+
+2018-11-07 Martin Liska <mliska@suse.cz>
+
+ * mem-stats.h: Fix GNU coding style.
+
+2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/mips/gs264e.md: New.
+ * config/mips/mips-cpus.def: Define gs264e.
+ * config/mips/mips-tables.opt: Regenerate.
+ * config/mips/mips.c (mips_rtx_cost_data): Add DEFAULT_COSTS for
+ gs264e.
+ (mips_issue_rate): Add support for gs264e.
+ (mips_multipass_dfa_lookahead): Likewise.
+ * config/mips/mips.h: Define TARGET_GS264E and TUNE_GS264E.
+ (MIPS_ISA_LEVEL_SPEC): Infer mips64r2 from gs264e.
+ (MIPS_ASE_MSA_SPEC): New.
+ (BASE_DRIVER_SELF_SPECS): march=gs264e implies -mmsa.
+ (ISA_HAS_FUSED_MADD4): Enable for TARGET_GS264E.
+ (ISA_HAS_UNFUSED_MADD4): Exclude TARGET_GS264E.
+ * config/mips/mips.md: Include gs264e.md.
+ (processor): Add gs264e.
+ * config/mips/mips.opt (MSA): Use Mask instead of Var.
+ * doc/invoke.texi: Add gs264e to supported architectures.
+
+2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/mips/gs464e.md: New.
+ * config/mips/mips-cpus.def: Define gs464e.
+ * config/mips/mips-tables.opt: Regenerate.
+ * config/mips/mips.c (mips_rtx_cost_data): Add DEFAULT_COSTS for
+ gs464e.
+ (mips_issue_rate): Add support for gs464e.
+ (mips_multipass_dfa_lookahead): Likewise.
+ (mips_option_override): Enable MMI, EXT and EXT2 for gs464e.
+ * config/mips/mips.h: Define TARGET_GS464E and TUNE_GS464E.
+ (MIPS_ISA_LEVEL_SPEC): Infer mips64r2 from gs464e.
+ (ISA_HAS_FUSED_MADD4): Enable for TARGET_GS464E.
+ (ISA_HAS_UNFUSED_MADD4): Exclude TARGET_GS464E.
+ * config/mips/mips.md: Include gs464e.md.
+ (processor): Add gs464e.
+ * doc/invoke.texi: Add gs464e to supported architectures.
+
+2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/mips/loongson3a.md: Rename to ...
+ * config/mips/gs464.md: ... here.
+ * config/mips/mips-cpus.def: Define gs464; Add loongson3a
+ as an alias of gs464 processor.
+ * config/mips/mips-tables.opt: Regenerate.
+ * config/mips/mips.c (mips_issue_rate): Use PROCESSOR_GS464
+ instead of PROCESSOR_LOONGSON_3A.
+ (mips_multipass_dfa_lookahead): Use TUNE_GS464 instead of
+ TUNE_LOONGSON_3A.
+ (mips_option_override): Enable MMI and EXT for gs464.
+ * config/mips/mips.h: Rename TARGET_LOONGSON_3A to TARGET_GS464;
+ Rename TUNE_LOONGSON_3A to TUNE_GS464.
+ (MIPS_ISA_LEVEL_SPEC): Infer mips64r2 from gs464.
+ (ISA_HAS_ODD_SPREG, ISA_AVOID_DIV_HILO, ISA_HAS_FUSED_MADD4,
+ ISA_HAS_UNFUSED_MADD4): Use TARGET_GS464 instead of
+ TARGET_LOONGSON_3A.
+ * config/mips/mips.md: Include gs464.md instead of loongson3a.md.
+ (processor): Add gs464;
+ * doc/invoke.texi: Add gs464 to supported architectures.
+
+2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/mips/mips-protos.h
+ (mips_loongson_ext2_prefetch_cookie): New prototype.
+ * config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): New.
+ (mips_option_override): Enable TARGET_LOONGSON_EXT when
+ TARGET_LOONGSON_EXT2 is true.
+ * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
+ __mips_loongson_ext2, __mips_loongson_ext_rev=2.
+ (ISA_HAS_CTZ_CTO): New, true if TARGET_LOONGSON_EXT2.
+ (ISA_HAS_PREFETCH): Include TARGET_LOONGSON_EXT and
+ TARGET_LOONGSON_EXT2.
+ (ASM_SPEC): Add mloongson-ext2 and mno-loongson-ext2.
+ (define_insn "ctz<mode>2"): New insn pattern.
+ (define_insn "prefetch"): Include TARGET_LOONGSON_EXT2.
+ (define_insn "prefetch_indexed_<mode>"): Include
+ TARGET_LOONGSON_EXT and TARGET_LOONGSON_EXT2.
+ * config/mips/mips.opt (-mloongson-ext2): Add option.
+ * gcc/doc/invoke.texi (-mloongson-ext2): Document.
+
+2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add
+ __mips_loongson_ext.
+ (MIPS_ASE_LOONGSON_EXT_SPEC): New.
+ (BASE_DRIVER_SELF_SPECS): march=loongson3a implies
+ -mloongson-ext.
+ (ASM_SPEC): Add mloongson-ext and mno-loongson-ext.
+ * config/mips/mips.md (mul<mode>3, mul<mode>3_mul3_nohilo,
+ <u>div<mode>3, <u>mod<mode>3, prefetch): Use TARGET_LOONGSON_EXT
+ instead of TARGET_LOONGSON_3A.
+ * config/mips/mips.opt (-mloongson-ext): Add option.
+ * gcc/doc/invoke.texi (-mloongson-ext): Document.
+
+2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config.gcc (extra_headers): Add loongson-mmiintrin.h.
+ * config/mips/loongson.md: Move to ...
+ * config/mips/loongson-mmi.md: here; Adjustment.
+ * config/mips/loongson.h: Move to ...
+ State as deprecated. Include loongson-mmiintrin.h for back
+ compatibility and warning.
+ * config/mips/loongson-mmiintrin.h: ... here.
+ * config/mips/mips.c (mips_hard_regno_mode_ok_uncached,
+ mips_vector_mode_supported_p, AVAIL_NON_MIPS16): Use
+ TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
+ (mips_option_override): Make sure MMI use hard float;
+ (mips_shift_truncation_mask, mips_expand_vpc_loongson_even_odd,
+ mips_expand_vpc_loongson_pshufh, mips_expand_vpc_loongson_bcast,
+ mips_expand_vector_init): Use TARGET_LOONGSON_MMI instead of
+ TARGET_LOONGSON_VECTORS.
+ * gcc/config/mips/mips.h (TARGET_LOONGSON_VECTORS): Delete.
+ (TARGET_CPU_CPP_BUILTINS): Add __mips_loongson_mmi.
+ (MIPS_ASE_DSP_SPEC, MIPS_ASE_LOONGSON_MMI_SPEC): New.
+ (BASE_DRIVER_SELF_SPECS): march=loongson2e/2f/3a implies
+ -mloongson-mmi.
+ (SHIFT_COUNT_TRUNCATED): Use TARGET_LOONGSON_MMI instead of
+ TARGET_LOONGSON_VECTORS.
+ * gcc/config/mips/mips.md (MOVE64, MOVE128): Use
+ TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
+ (Loongson MMI patterns): Include loongson-mmi.md instead of
+ loongson.md.
+ * gcc/config/mips/mips.opt (-mloongson-mmi): New option.
+ * gcc/doc/invoke.texi (-mloongson-mmi): Document.
+
+2018-11-07 Richard Biener <rguenther@suse.de>
+
+ PR lto/87906
+ * tree-streamer-in.c (lto_input_ts_block_tree_pointers): Fixup
+ BLOCK_ABSTRACT_ORIGIN to be the ultimate origin.
+
+2018-11-07 Alexandre Oliva <aoliva@redhat.com>
+
+ PR rtl-optimization/87874
+ * lra.c (lra_substitute_pseudo): Do not create a subreg for
+ const wide ints.
+
+2018-11-06 Aaron Sawdey <acsawdey@linux.ibm.com>
+
+ * config/rs6000/rs6000.md (bswap<mode>2): Force address into register
+ if not in indexed or indirect form.
+ (bswap<mode>2_load): Change predicate to indexed_or_indirect_operand.
+ (bswap<mode>2_store): Ditto.
+
+2018-11-06 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/aarch64/aarch64.md (speculation_tracker): Set the mode for
+ the UNSPEC.
+
+2018-11-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/86850
+ * vec.h (vec<T, va_heap, vl_ptr>::splice): Check src.length ()
+ instead of src.m_vec.
+
+2018-11-06 Jan Hubicka <jh@suse.cz>
+
+ * tree.c (fld_simplified_type_name): Break out form ...
+ (free_lang_data_in_type): ... here.
+ (fld_type_variant_equal_p): Use it.
+
+2018-11-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * config/default-d.c: Include memmodel.h.
+
+ * config/sol2-d.c: New file.
+ * config/t-sol2 (sol2-d.o): New rule.
+ * config.gcc <*-*-solaris2*>: Set d_target_objs,
+ target_has_targetdm.
+
+2018-11-06 Jan Hubicka <jh@suse.cz>
+
+ * tree.c (fld_type_variant): Also copy alignment; be sure that
+ new variant is equal.
+
+2018-11-06 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ PR target/87762
+ * config/s390/s390.md: Add relative_long attribute.
+
+2018-11-06 Jan Hubicka <jh@suse.cz>
+
+ * ipa-pure-const.c (check_decl): Do not test TYPE_NEEDS_CONSTRUCTING.
+ * lto-streamer-out.c (hash_tree): Do not hash TYPE_NEEDS_CONSTRUCTING.
+ * tree-streamer-in.c (unpack_ts_type_common_value_fields): Do not
+ stream TYPE_NEEDS_CONSTRUCTING.
+ * tree-streamer-out.c (pack_ts_type_common_value_fields): Likewise.
+ * tree.c (free_lang_data_in_type): Clear TYPE_NEEDS_CONSTRUCTING.
+
+2018-11-06 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.c (vect_slp_bb): Move opening of vect_slp_analyze_bb
+ dump-scope ...
+ (vect_slp_analyze_bb_1): ... here to avoid hiding optimized locations.
+
2018-11-06 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc/config/msp430/msp430.h (REG_CLASS_CONTENTS): Add R0 to