+2020-03-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/94001
+ * tree-tailcall.c (process_assignment): Before comparing op1 to
+ *ass_var, verify *ass_var is non-NULL.
+
+2020-03-04 Kito Cheng <kito.cheng@sifive.com>
+
+ PR target/93995
+ * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
+ the result of IOR.
+
+2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
+ * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
+ (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
+ (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
+ * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
+ (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
+ * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
+ (V_bf_low, V_bf_cvt_m): New mode attributes.
+ * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
+ (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
+ (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
+ (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
+ * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
+
+2020-03-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/93582
+ * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
+ * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
+ members, initialize them in the constructor and if mask is non-NULL,
+ artificially push_partial_def {} for the portions of the mask that
+ contain zeros.
+ (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
+ val and return (void *)-1. Formatting fix.
+ (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
+ Formatting fix.
+ (vn_reference_lookup): Add mask argument. If non-NULL, don't call
+ fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
+ data.mask_result.
+ (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
+ mask.
+ (visit_stmt): Formatting fix.
+
+2020-03-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/93946
+ * alias.h (refs_same_for_tbaa_p): Declare.
+ * alias.c (refs_same_for_tbaa_p): New function.
+ * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
+ zero.
+ * tree-ssa-scopedtables.h
+ (avail_exprs_stack::lookup_avail_expr): Add output argument
+ giving access to the hashtable entry.
+ * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
+ Likewise.
+ * tree-ssa-dom.c: Include alias.h.
+ (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
+ removing redundant store.
+ * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
+ (ao_ref_init_from_vn_reference): Adjust prototype.
+ (vn_reference_lookup_pieces): Likewise.
+ (vn_reference_insert_pieces): Likewise.
+ * tree-ssa-sccvn.c: Track base alias set in addition to alias
+ set everywhere.
+ (eliminate_dom_walker::eliminate_stmt): Also check base alias
+ set when removing redundant stores.
+ (visit_reference_op_store): Likewise.
+ * dse.c (record_store): Adjust valdity check for redundant
+ store removal.
+
+2020-03-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/26877
+ * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
+
+ PR rtl-optimization/94002
+ * explow.c (plus_constant): Punt if cst has VOIDmode and
+ get_pool_mode is different from mode.
+
+2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
+ address has an offset which fits the scalling constraint for a
+ load/store operation.
+ (legitimate_scaled_address_p): Update use
+ leigitimate_small_data_address_p.
+ (arc_print_operand): Likewise.
+ (arc_legitimate_address_p): Likewise.
+ (legitimate_small_data_address_p): Likewise.
+
+2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
+ (fnmasf4_fpu): Likewise.
+
+2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.md (adddi3): Early expand the 64bit operation into
+ 32bit ops.
+ (subdi3): Likewise.
+ (adddi3_i): Remove pattern.
+ (subdi3_i): Likewise.
+
+2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.md (eh_return): Add length info.
+
+2020-03-02 David Malcolm <dmalcolm@redhat.com>
+
+ * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
+
+2020-03-02 David Malcolm <dmalcolm@redhat.com>
+
+ * doc/invoke.texi (Static Analyzer Options): Add
+ -Wanalyzer-stale-setjmp-buffer to the list of options enabled
+ by -fanalyzer.
+
+2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/93997
+ * config/i386/i386.md (movstrict<mode>): Allow only
+ registers with VALID_INT_MODE_P modes.
+
+2020-03-02 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-valu.md (dpp_move<mode>): New.
+ (reduc_insn): Use 'U' and 'B' operand codes.
+ (reduc_<reduc_op>_scal_<mode>): Allow all types.
+ (reduc_<reduc_op>_scal_v64di): Delete.
+ (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
+ (*plus_carry_dpp_shr_v64si): Change to ...
+ (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
+ (mov_from_lane63_v64di): Change to ...
+ (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
+ * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
+ Support UNSPEC_MOV_DPP_SHR output formats.
+ (gcn_expand_reduc_scalar): Add "use_moves" reductions.
+ Add "use_extends" reductions.
+ (print_operand_address): Add 'I' and 'U' codes.
+ * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
+
+2020-03-02 Martin Liska <mliska@suse.cz>
+
+ * lto-wrapper.c: Fix typo in comment about
+ C++ standard version.
+
+2020-03-01 Martin Sebor <msebor@redhat.com>
+
+ PR c++/92721
+ * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
+
+2020-03-01 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/93829
+ * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
+ of a pointer in the outermost ADDR_EXPRs.
+
+2020-02-28 Jeff Law <law@redhat.com>
+
+ * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
+ * config/v850/v850.c (v850_asm_trampoline_template): Update
+ accordingly.
+
+2020-02-28 Michael Meissner <meissner@linux.ibm.com>
+
+ PR target/93937
+ * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
+ Delete insn.
+
+2020-02-28 Martin Liska <mliska@suse.cz>
+
+ PR other/93965
+ * configure.ac: Improve detection of ld_date by requiring
+ either two dashes or none.
+ * configure: Regenerate.
+
+2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/93564
+ * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
+ do not honor reg alloc order.
+
+2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
+
+ PR target/87612
+ * config/aarch64/aarch64.c (aarch64_override_options): Fix
+ misleading warning string.
+
+2020-02-27 Martin Sebor <msebor@redhat.com>
+
+ * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
+
+2020-02-27 Michael Meissner <meissner@linux.ibm.com>
+
+ PR target/93932
+ * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
+ Split the insn into two parts. This insn only does variable
+ extract from a register.
+ (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
+ variable extract from memory.
+ (vsx_extract_v4sf_var): Split the insn into two parts. This insn
+ only does variable extract from a register.
+ (vsx_extract_v4sf_var_load): New insn, do variable extract from
+ memory.
+ (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
+ into two parts. This insn only does variable extract from a
+ register.
+ (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
+ do variable extract from memory.
+
2020-02-27 Martin Jambor <mjambor@suse.cz>
Feng Xue <fxue@os.amperecomputing.com>
projects / gcc.git / blobdiff