+2007-07-23 Jan Hubicka <jH@suse.cz>
+
+ * i386.c (ix86_secondary_memory_needed): Break out to...
+ (inline_secondary_memory_needed): ... here.
+ (ix86_memory_move_cost): Break out to ...
+ (inline_memory_move_cost): ... here; add support for IN value of 2 for
+ maximum of input and output; fix handling of Q_REGS on 64bit.
+ (ix86_secondary_memory_needed): Microoptimize.
+
+2007-07-23 Sebastian Pop <sebpop@gmail.com>
+
+ * tree-data-ref.c (find_vertex_for_stmt, create_rdg_edge_for_ddr,
+ create_rdg_edges_for_scalar, create_rdg_edges, create_rdg_vertices,
+ stmts_from_loop, known_dependences_p, build_rdg): New.
+ * tree-data-ref.h: Depends on graphds.h.
+ (rdg_vertex, RDGV_STMT, rdg_dep_type, rdg_edge, RDGE_TYPE): New.
+ (build_rdg): Declared.
+ * Makefile.in (TREE_DATA_REF_H): Depends on graphds.h.
+
+2007-07-23 Daniel Berlin <dberlin@dberlin.org>
+
+ * tree-ssa-propagate.c (valid_gimple_expression_p): Match up with
+ ccp_min_invariant.
+
+2007-07-23 Peter Bergner <bergner@vnet.ibm.com>
+ Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/PR28690
+ * optabs.c (expand_binop): (emit_cmp_and_jump_insns): Allow EQ compares.
+ * rtlanal.c (commutative_operand_precedence): Prefer both REG_POINTER
+ and MEM_POINTER operands over REG and MEM operands.
+ (swap_commutative_operands_p): Change return value to bool.
+ * rtl.h: Update the corresponding prototype.
+ * tree-ssa-address.c (gen_addr_rtx): Use simplify_gen_binary
+ instead of gen_rtx_PLUS.
+ * simplify-rtx.c (simplify_plus_minus_op_data_cmp): Change return
+ value to bool. Change function arguments to rtx's and update code
+ to match.
+ (simplify_plus_minus): Update the simplify_plus_minus_op_data_cmp
+ calls to match the new declaration.
+ * simplify-rtx.c (simplify_associative_operation): Don't
+ reorder simplify_binary_operation arguments.
+
+2007-07-23 Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/mips.c (override_options): Use mips_costs to derive
+ the default branch cost.
+ * config/mips/mips.h (BRANCH_COST): Use mips_branch_cost rather
+ than mips_costs.
+ * config/mips/mips.opt (mbranch-cost=): New option.
+ * doc/invoke.texi (-mbrach-cost): Document new MIPS option.
+
+2007-07-23 Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/mips.h (GR_REG_CLASS_P, COP_REG_CLASS_P): Delete.
+ (SECONDARY_MEMORY_NEEDED): Delete commented-out definition.
+ * config/mips/mips.c (mips_register_move_cost): Use reg_class_subset_p
+ instead of GR_REG_CLASS_P and COP_REG_CLASS_P.
+
+2007-07-23 Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/constraints.md (ks): New constraint.
+ * config/mips/mips.md (*add<mode>3_sp1, *add<mode>3_sp2): Fold into...
+ (*add<mode>3_mips16): ...here.
+
+2007-07-21 Uros Bizjak <ubizjak@gmail.com>
+
+ * optabs.h (enum optab_index): Add new OTI_signbit.
+ (signbit_optab): Define corresponding macro.
+ (enum insn_code signbit_optab[]): Remove array.
+ * optabs.c (init_optabs): Initialize signbit_optab using init_optab.
+ (expand_copysign_absneg): If back end provides signbit insn, use it
+ instead of bit operations on floating point argument.
+ * builtins.c (enum insn_code signbit_optab[]): Remove array.
+ (expand_builtin_signbit): Check signbit_optab->handlers[].insn_code for
+ availability of signbit insn.
+
+ * config/i386/i386.md (signbit<mode>2): New insn pattern to implement
+ signbitf, signbit and signbitl built-ins as inline x87 intrinsics when
+ SSE mode is not active.
+ (isinf<mode>2): Disable for mfpmath=sse,387.
+
+2007-07-22 Ben Elliston <bje@au.ibm.com>
+
+ * regclass.c (invalid_mode_change_p): Attach ATTRIBUTE_UNUSED to
+ `class' parameter.
+ * struct-equiv.c (note_local_live): Likewise for `y_regno'.
+
+2007-07-20 Richard Guenther <rguenther@suse.de>
+
+ * tree-cfg.c (verify_expr): COND_EXPRs can have any
+ integral typed condition.
+ * tree-ssa.c (useless_type_conversion_p): Do not preserve
+ booleanness. Only preserve conversions from a non-base
+ type to a base type, not in general between types with
+ different TYPE_MIN_VALUE or TYPE_MAX_VALUE.
+ * tree.def (COND_EXPR): Document that the condition
+ can be of any integral type.
+
+2007-07-20 Nigel Stephens <nigel@mips.com>
+ Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/mips.h (mips_dwarf_regno): Declare.
+ (DBX_REGISTER_NUMBER): Remove redundant brackets.
+ (HI_REGNUM, LO_REGNUM): Define in an endian-dependent way.
+ (AC1HI_REGNUM, AC1LO_REGNUM, AC2HI_REGNUM, AC2LO_REGNUM)
+ (AC3HI_REGNUM, AC3LO_REGNUM, ACC_HI_REG_P): Delete.
+ (reg_class): Rename HI_REG to MD0_REG and LO_REG to MD1_REG.
+ (REG_CLASS_NAMES): Update accordingly.
+ * config/mips/mips.c (mips_dwarf_regno): New array.
+ (mips_regno_to_class): Rename HI_REG to MD0_REG and LO_REG to MD1_REG.
+ (mips_subword): Remove special handling for accumulator registers.
+ (override_options): Initiailize mips_dwarf_regno. Remove use
+ of ACC_HI_REG_P.
+ (mips_swap_registers): New function.
+ (mips_conditional_register_usage): Swap accumulator registers
+ around if TARGET_LITTLE_ENDIAN.
+ (mips_cannot_change_mode_class): Remove special treatment of ACC_REGS.
+ * config/mips/constraints.md (h, l): Use the endianness to choose
+ between MD0_REG and MD1_REG.
+ * config/mips/mips.md (*mfhilo_<mode>_macc): Use a fixed-string,
+ alternative-dependent template.
+
+2007-07-20 Richard Sandiford <richard@codesourcery.com>
+
+ * config/arm/arm.md (movsi): Use can_create_pseudo_p instead of
+ no_new_pseudos.
+
+2007-07-20 Zdenek Dvorak <dvorakz@suse.cz>
+
+ * function.c (thread_prologue_and_epilogue_insns): Fix exit
+ predecessor fallthru flags.
+
+2007-07-20 Zdenek Dvorak <dvorakz@suse.cz>
+
+ * tree-ssa-loop-niter.c (assert_loop_rolls_lt): Convert the operands
+ of compare to the same type.
+ * cfgloopmanip.c (add_loop): Update information about loop exits.
+ (loop_version): Remove the innermost loop requirement.
+ * tree-ssa-loop-manip.c (determine_exit_conditions): Convert bounds
+ to sizetype for pointers.
+
+2007-07-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.in (D32PBIT_FUNCS): Add _sd_to_tf and _tf_to_sd.
+ (D64PBIT_FUNCS): Add _dd_to_tf and _tf_to_dd.
+ (D128PBIT_FUNCS): Add _td_to_tf and _tf_to_td.
+
+ * config/dfp-bit.c: Empty for TFmode conversions.
+
2007-07-18 Caroline Tice <ctice@apple.com>
* var-tracking.c (find_src_status): Check for COND_EXEC insns
2007-07-16 Paul Brook <paul@codesourcery.com>
PR target/32753
- gcc/
* config/arm/cirrus.md (cirrus_arm_movsi_insn): Remove dead insn.
(cirrus_thumb2_movsi_insn): Ditto.
offsets->locals_base to avoid negative stack size.
(thumb1_expand_prologue): Assert on negative stack size.
-2007-04-19 Sebastian Pop <sebpop@gmail.com>
+2007-06-19 Sebastian Pop <sebpop@gmail.com>
PR tree-optimization/32367
* tree-chrec.h (build_polynomial_chrec): Verify that the left hand side
float constant.
(_m_to_float): Use C89 compatible assignment.
-2007-04-20 Martin Michlmayr <tbm@cyrius.com>
+2007-05-20 Martin Michlmayr <tbm@cyrius.com>
PR target/32007
* config/arm/lib1funcs.asm: Define __ARM_ARCH__ on v2/v3 machines.
size never inline functions increasing caller size.
(cgraph_early_inlining): Inline for size when optimizing for size.
-2007-04-18 Bernd Schmidt <bernd.schmidt@analog.com>
+2007-05-04 Bernd Schmidt <bernd.schmidt@analog.com>
* config/bfin/bfin.md (<optab>di3): Now a define_expand which expands
logical operations piecewise.