+2018-05-24 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * gimple-match.h (gimple_match_op): New class.
+ (mprts_hook): Replace parameters with a gimple_match_op *.
+ (maybe_build_generic_op): Likewise.
+ (gimple_simplified_result_is_gimple_val): Replace parameters with
+ a const gimple_match_op *.
+ (gimple_simplify): Replace code_helper * and tree * parameters with
+ a gimple_match_op * parameter.
+ (gimple_resimplify1): Replace code_helper *, tree and tree *
+ parameters with a gimple_match_op * parameter.
+ (gimple_resimplify2): Likewise.
+ (gimple_resimplify3): Likewise.
+ (maybe_push_res_to_seq): Replace code_helper, tree and tree *
+ parameters with a gimple_match_op * parameter.
+ * gimple-match-head.c (gimple_simplify): Change prototypes of
+ auto-generated functions to take a gimple_match_op * instead of
+ separate code_helper * and tree * parameters. Make the same
+ change in the top-level overload and update calls to the
+ gimple_resimplify routines. Update calls to the auto-generated
+ functions and to maybe_push_res_to_seq in the publicly-facing
+ operation-specific gimple_simplify overloads.
+ (gimple_match_op::MAX_NUM_OPS): Define.
+ (gimple_resimplify1): Replace rcode and ops with a single res_op
+ parameter. Update call to gimple_simplify.
+ (gimple_resimplify2): Likewise.
+ (gimple_resimplify3): Likewise.
+ (mprts_hook): Replace parameters with a gimple_match_op *.
+ (maybe_build_generic_op): Likewise.
+ (build_call_internal): Replace type, nargs and ops with
+ a gimple_match_op *.
+ (maybe_push_res_to_seq): Replace res_code, type and ops parameters
+ with a single gimple_match_op *. Update calls to mprts_hook,
+ build_call_internal and gimple_simplified_result_is_gimple_val.
+ Factor out code that is common to the tree_code and combined_fn cases.
+ * genmatch.c (expr::gen_transform): Replace tem_code and
+ tem_ops with a gimple_match_op called tem_op. Update calls
+ to the gimple_resimplify functions and maybe_push_res_to_seq.
+ (dt_simplify::gen_1): Manipulate res_op instead of res_code and
+ res_ops. Update call to the gimple_resimplify functions.
+ (dt_simplify::gen): Pass res_op instead of res_code and res_ops.
+ (decision_tree::gen): Make the functions take a gimple_match_op *
+ called res_op instead of separate res_code and res_ops parameters.
+ Update call accordingly.
+ * gimple-fold.c (replace_stmt_with_simplification): Replace rcode
+ and ops with a single res_op parameter. Update calls to
+ maybe_build_generic_op and maybe_push_res_to_seq.
+ (fold_stmt_1): Update calls to gimple_simplify and
+ replace_stmt_with_simplification.
+ (gimple_fold_stmt_to_constant_1): Update calls to gimple_simplify
+ and gimple_simplified_result_is_gimple_val.
+ * tree-cfgcleanup.c (cleanup_control_expr_graph): Update call to
+ gimple_simplify.
+ * tree-ssa-sccvn.c (vn_lookup_simplify_result): Replace parameters
+ with a gimple_match_op *.
+ (vn_nary_build_or_lookup): Likewise. Update call to
+ vn_nary_build_or_lookup_1.
+ (vn_nary_build_or_lookup_1): Replace rcode, type and ops with a
+ gimple_match_op *. Update calls to the gimple_resimplify routines
+ and to gimple_simplified_result_is_gimple_val.
+ (vn_nary_simplify): Update call to vn_nary_build_or_lookup_1.
+ Use gimple_match_op::MAX_NUM_OPS instead of a hard-coded 3.
+ (vn_reference_lookup_3): Update call to vn_nary_build_or_lookup.
+ (visit_nary_op): Likewise.
+ (visit_reference_op_load): Likewise.
+
+2018-05-23 Luis Machado <luis.machado@linaro.org>
+
+ * tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Use correct type
+ modifier for printing the step amount.
+
+2018-05-23 Jozef Lawrynowicz <jozef.l@somniumtech.com>
+
+ PR target/78849
+ * gcc/tree.c (build_common_tree_nodes): Dont set TYPE_SIZE for __intN
+ types.
+
+2018-05-23 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * doc/sourcebuild.texi (Endianness): New subsubsection.
+
+2018-05-23 Luis Machado <luis.machado@linaro.org>
+
+ * config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
+ <prefetch_dynamic_strides>: New const bool field.
+ * config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
+ prefetch_dynamic_strides.
+ (exynosm1_prefetch_tune): Likewise.
+ (thunderxt88_prefetch_tune): Likewise.
+ (thunderx_prefetch_tune): Likewise.
+ (thunderx2t99_prefetch_tune): Likewise.
+ (qdf24xx_prefetch_tune): Likewise. Set prefetch_dynamic_strides to
+ false.
+ (aarch64_override_options_internal): Update to set
+ PARAM_PREFETCH_DYNAMIC_STRIDES.
+ * doc/invoke.texi (prefetch-dynamic-strides): Document new option.
+ * params.def (PARAM_PREFETCH_DYNAMIC_STRIDES): New.
+ * params.h (PARAM_PREFETCH_DYNAMIC_STRIDES): Define.
+ * tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Account for
+ prefetch-dynamic-strides setting.
+
+2018-05-23 Luis Machado <luis.machado@linaro.org>
+
+ * config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
+ <minimum_stride>: New const int field.
+ * config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
+ minimum_stride field defaulting to -1.
+ (exynosm1_prefetch_tune): Likewise.
+ (thunderxt88_prefetch_tune): Likewise.
+ (thunderx_prefetch_tune): Likewise.
+ (thunderx2t99_prefetch_tune): Likewise.
+ (qdf24xx_prefetch_tune) <minimum_stride>: Set to 2048.
+ <default_opt_level>: Set to 3.
+ (aarch64_override_options_internal): Update to set
+ PARAM_PREFETCH_MINIMUM_STRIDE.
+ * doc/invoke.texi (prefetch-minimum-stride): Document new option.
+ * params.def (PARAM_PREFETCH_MINIMUM_STRIDE): New.
+ * params.h (PARAM_PREFETCH_MINIMUM_STRIDE): Define.
+ * tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Return false if
+ stride is constant and is below the minimum stride threshold.
+
+2018-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/arm/arm-cpus.in (mode26): Delete.
+ (armv4): Delete mode26 reference.
+ * config/arm/arm.c (arm_configure_build_target): Delete use of
+ isa_bit_mode26.
+
+2018-05-23 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*floatuns<SWI48:mode><MODEF:mode>2_avx512):
+ New insn pattern.
+ (floatunssi<mode>2): Also enable for AVX512F and TARGET_SSE_MATH.
+ Rewrite expander pattern. Emit gen_floatunssi<mode>2_i387_with_xmm
+ for non-SSE modes.
+ (floatunsdisf2): Rewrite expander pattern. Hanlde TARGET_AVX512F.
+ (floatunsdidf2): Ditto.
+
+2018-05-23 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (fixuns_trunc<mode>di2): New insn pattern.
+ (fixuns_trunc<mode>si2_avx512f): Ditto.
+ (*fixuns_trunc<mode>si2_avx512f_zext): Ditto.
+ (fixuns_trunc<mode>si2): Also enable for AVX512F and TARGET_SSE_MATH.
+ Emit fixuns_trunc<mode>si2_avx512f for AVX512F targets.
+
+2018-05-23 Alexander Monakov <amonakov@ispras.ru>
+
+ PR rtl-optimization/79985
+ * df-scan.c (df_insn_refs_collect): Remove special case for
+ global registers and asm statements.
+
+2018-05-23 Alexander Monakov <amonakov@ispras.ru>
+
+ * extend.texi (Global Register Variables): Rewrite the bullet list.
+ Note that the register is available for allocation. Note that access
+ via inline asm must use constraints. Add note about async-signal
+ handlers. Remove paragraph about automagic register selection.
+
+2018-05-23 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-sccvn.c (vn_reference_lookup_3): Remove restriction
+ of fixed offset from memset VN.
+
+2018-05-23 Bill Schmidt <wschmidt@linux.ibm.com>
+
+ * gimple-ssa-strength-reduction.c (struct slsr_cand_d): Add
+ first_interp field.
+ (alloc_cand_and_find_basis): Initialize first_interp field.
+ (slsr_process_mul): Modify first_interp field.
+ (slsr_process_add): Likewise.
+ (slsr_process_cast): Modify first_interp field for each new
+ interpretation.
+ (slsr_process_copy): Likewise.
+ (dump_candidate): Dump first_interp field.
+ (replace_mult_candidate): Process all interpretations, not just
+ subsequent ones.
+ (replace_rhs_if_not_dup): Likewise.
+ (replace_one_candidate): Likewise.
+
+2018-05-23 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_use_frame_pointer):
+ Add new boolean.
+ (aarch64_needs_frame_chain): New function.
+ (aarch64_parse_override_string): Set aarch64_use_frame_pointer.
+
+2018-05-23 Sudakshina Das <sudi.das@arm.com>
+
+ PR target/84882
+ * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
+ Check val before adding MASK_STRICT_ALIGN to opts->x_target_flags.
+ * config/aarch64/aarch64.opt (mstrict-align): Remove RejectNegative.
+ * config/aarch64/aarch64.c (aarch64_attributes): Mark allow_neg
+ as true for strict-align.
+ (aarch64_can_inline_p): Perform checks even when callee has no
+ attributes to check for strict alignment.
+ * doc/extend.texi (AArch64 Function Attributes): Document
+ no-strict-align.
+ * doc/invoke.texi: (AArch64 Options): Likewise.
+
+2018-05-23 Richard Sandiford <richard.sandiford@linaro.org>
+
+ PR tree-optimization/85853
+ * tree-vect-slp.c (vect_slp_analyze_node_operations): Split out
+ the handling of the root of the node to...
+ (vect_slp_analyze_node_operations_1): ...this new function,
+ and run the whole thing with the child nodes' def types
+ set according to their SLP node's def type.
+
+2018-05-23 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/85874
+ * tree-data-ref.c (create_runtime_alias_checks): Defer
+ and ignore overflow warnings.
+
+2018-05-23 Yury Gribov <tetra2005@gmail.com>
+
+ PR tree-optimization/85822
+ * tree-vrp.c (is_masked_range_test): Fix handling of negative
+ constants.
+
+2018-05-23 Richard Biener <rguenther@suse.de>
+
+ * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle arbitrary
+ memset constants via native_interpret_expr.
+
+2018-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/85345
+ * cgraph.h (cgraph_node::create): Set ifunc_resolver for ifunc
+ attribute.
+ (cgraph_node::create_alias): Likewise.
+ (cgraph_node::get_availability): Check ifunc_resolver instead
+ of looking up ifunc attribute.
+ * cgraphunit.c (maybe_diag_incompatible_alias): Likewise.
+ * varasm.c (do_assemble_alias): Likewise.
+ (assemble_alias): Likewise.
+ (default_binds_local_p_3): Likewise.
+ * cgraph.h (cgraph_node): Add ifunc_resolver.
+ (cgraph_node::only_called_directly_or_aliased_p): Return false
+ for IFUNC resolver.
+ * lto-cgraph.c (input_node): Set ifunc_resolver for ifunc
+ attribute.
+ * symtab.c (symtab_node::verify_base): Verify that ifunc_resolver
+ is equivalent to lookup_attribute ("ifunc", DECL_ATTRIBUTES (decl)).
+ (symtab_node::binds_to_current_def_p): Check ifunc_resolver
+ instead of looking up ifunc attribute.
+
+2018-05-22 Luis Machado <luis.machado@linaro.org>
+
+ * config/aarch64/aarch64.md (*ashift<mode>_extv_bfiz): New pattern.
+
+2018-05-22 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/85359
+ * builtins.c (expand_builtin_strcpy): Call maybe_warn_nonstring_arg
+ only when expasion succeeds.
+ (expand_builtin_strcmp): Same.
+ (expand_builtin_strncmp): Same.
+
+2018-05-22 Martin Sebor <msebor@redhat.com>
+
+ * calls.c (maybe_warn_nonstring_arg): Fix a typo in a comment.
+
+2018-05-22 Jackson Woodruff <jackson.woodruff@arm.com>
+ Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64-ldpstp.md: Replace uses of
+ aarch64_mem_pair_operand with memory_operand and delete operand swapping
+ code.
+ * config/aarch64/aarch64.c (aarch64_operands_ok_for_ldpstp):
+ Add check for legitimate_address.
+ (aarch64_gen_adjusted_ldpstp): Swap operands where appropriate.
+ (aarch64_swap_ldrstr_operands): New.
+ * config/aarch64/aarch64-protos.h (aarch64_swap_ldrstr_operands):
+ Define prototype.
+
+2018-05-22 Jackson Woodruff <jackson.woodruff@arm.com>
+ Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.md: New patterns to generate stp
+ and ldp.
+ (store_pair_sw, store_pair_dw): New patterns to generate stp for
+ single words and double words.
+ (load_pair_sw, load_pair_dw): Likewise.
+ (store_pair_sf, store_pair_df, store_pair_si, store_pair_di):
+ Delete.
+ (load_pair_sf, load_pair_df, load_pair_si, load_pair_di):
+ Delete.
+ * config/aarch64/aarch64-ldpstp.md: Modify peephole
+ for different mode ldpstp and add peephole for merged zero stores.
+ Likewise for loads.
+ * config/aarch64/aarch64.c (aarch64_operands_ok_for_ldpstp):
+ Add size check.
+ (aarch64_gen_store_pair): Rename calls to match new patterns.
+ (aarch64_gen_load_pair): Rename calls to match new patterns.
+ * config/aarch64/aarch64-simd.md (load_pair<mode>): Rename to...
+ (load_pair<DREG:mode><DREG2:mode>): ... This.
+ (store_pair<mode>): Rename to...
+ (vec_store_pair<DREG:mode><DREG2:mode>): ... This.
+ * config/aarch64/iterators.md (DREG, DREG2, DX2, SX, SX2, DSX):
+ New mode iterators.
+ (V_INT_EQUIV): Handle SImode.
+ * config/aarch64/predicates.md (aarch64_reg_zero_or_fp_zero):
+ New predicate.
+
+2018-05-22 Martin Sebor <msebor@redhat.com>
+
+ PR c/85623
+ * calls.c (maybe_warn_nonstring_arg): Use string length to set
+ or ajust the presumed bound on an operation to avoid unnecessary
+ warnings.
+
+2018-05-22 Martin Sebor <msebor@redhat.com>
+
+ PR tree-optimization/85826
+ * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Avoid
+ assuming that a DECL necesarily has a constant size.
+
+2018-05-22 Richard Sandiford <richard.sandiford@linaro.org>
+
+ PR middle-end/85862
+ * internal-fn.c (expand_direct_optab_fn): Cope with a null lhs.
+
+2018-05-22 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/85834
+ * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly handle
+ non-constant and non-zero memset arguments.
+
+2018-05-22 Martin Liska <mliska@suse.cz>
+
+ PR ipa/85607
+ * ipa-icf.c (sem_item::add_type): Do not ICE for incomplete types.
+
+2018-05-22 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/85863
+ * tree-vect-stmts.c (vect_is_simple_cond): Only widen invariant
+ comparisons when vectype is specified.
+ (vectorizable_condition): Do not specify vectype for
+ vect_is_simple_cond when SLP vectorizing.
+
2018-05-21 Michael Meissner <meissner@linux.ibm.com>
PR target/85657
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Do not
define __ibm128 as long double.
- * config/rs6000/rs6000.c (rs6000_init_builtins): Always create
- __ibm128 as a distinct type.
+ * config/rs6000/rs6000.c (rs6000_init_builtins): Create __ibm128
+ as a distinct type when IEEE 128-bit support is enabled.
(init_float128_ieee): Fix up conversions between IFmode and IEEE
128-bit types to use the correct functions.
(rs6000_expand_float128_convert): Use explicit FLOAT_EXTEND to
projects / gcc.git / blobdiff