* config/arm/arm-cores.def (cortex-m1, cortex-m0)

[gcc.git] / gcc / config / arm / arm.c

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 3bec7c57421ced32836bd8952824c88bc8688c43..50dcff5ea401759a56907e08438ddd9f79a58063 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -893,7 +893,8 @@ const struct tune_params arm_slowmul_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   true,                                                /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 const struct tune_params arm_fastmul_tune =
@@ -905,7 +906,8 @@ const struct tune_params arm_fastmul_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   true,                                                /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 /* StrongARM has early execution of branches, so a sequence that is worth
@@ -920,7 +922,8 @@ const struct tune_params arm_strongarm_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   true,                                                /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 const struct tune_params arm_xscale_tune =
@@ -932,7 +935,8 @@ const struct tune_params arm_xscale_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   true,                                                /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 const struct tune_params arm_9e_tune =
@@ -944,7 +948,8 @@ const struct tune_params arm_9e_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   true,                                                /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 const struct tune_params arm_v6t2_tune =
@@ -956,7 +961,8 @@ const struct tune_params arm_v6t2_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   false,                                       /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 /* Generic Cortex tuning.  Use more specific tunings if appropriate.  */
@@ -969,7 +975,8 @@ const struct tune_params arm_cortex_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   false,                                       /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 const struct tune_params arm_cortex_a15_tune =
@@ -981,7 +988,8 @@ const struct tune_params arm_cortex_a15_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   false,                                       /* Prefer constant pool.  */
   arm_default_branch_cost,
-  true                                          /* Prefer LDRD/STRD.  */
+  true,                                                /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };
 
 /* Branches can be dual-issued on Cortex-A5, so conditional execution is
@@ -996,7 +1004,8 @@ const struct tune_params arm_cortex_a5_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   false,                                       /* Prefer constant pool.  */
   arm_cortex_a5_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {false, false},                              /* Prefer non short circuit.  */
 };
 
 const struct tune_params arm_cortex_a9_tune =
@@ -1008,7 +1017,23 @@ const struct tune_params arm_cortex_a9_tune =
   ARM_PREFETCH_BENEFICIAL(4,32,32),
   false,                                       /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
+};
+
+/* The arm_v6m_tune is duplicated from arm_cortex_tune, rather than
+   arm_v6t2_tune. It is used for cortex-m0, cortex-m1 and cortex-m0plus.  */
+const struct tune_params arm_v6m_tune =
+{
+  arm_9e_rtx_costs,
+  NULL,
+  1,                                           /* Constant limit.  */
+  5,                                           /* Max cond insns.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  false,                                       /* Prefer constant pool.  */
+  arm_default_branch_cost,
+  false,                                       /* Prefer LDRD/STRD.  */
+  {false, false},                              /* Prefer non short circuit.  */
 };
 
 const struct tune_params arm_fa726te_tune =
@@ -1020,7 +1045,8 @@ const struct tune_params arm_fa726te_tune =
   ARM_PREFETCH_NOT_BENEFICIAL,
   true,                                                /* Prefer constant pool.  */
   arm_default_branch_cost,
-  false                                         /* Prefer LDRD/STRD.  */
+  false,                                       /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
 };