/* Definitions of target machine for GNU compiler,
for Motorola M*CORE Processor.
- Copyright (C) 1993, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright (C) 1993, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
This file is part of GNU CC.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
#ifndef GCC_MCORE_H
#define GCC_MCORE_H
%{!mbig-endian: -D__MCORELE__} \
%{!m210: -D__M340__} \
"
-/* If -m4align is ever re-enabled then add this line to the defintion of CPP_SPEC
+/* If -m4align is ever re-enabled then add this line to the definition of CPP_SPEC
%{!m4align:-D__MCORE_ALIGN_8__} %{m4align:-D__MCORE__ALIGN_4__} */
/* We don't have a -lg library, so don't put it in the list. */
{ {"hardlit", HARDLIT_BIT, \
N_("Inline constants if it can be done in 2 insns or less") }, \
{"no-hardlit", - HARDLIT_BIT, \
- N_("inline constants if it only takes 1 instruction") }, \
+ N_("Inline constants if it only takes 1 instruction") }, \
{"4align", - ALIGN8_BIT, \
N_("Set maximum alignment to 4") }, \
{"8align", ALIGN8_BIT, \
{"no-relax-immediates", - RELAX_IMM_BIT, \
N_("Do not arbitary sized immediates in bit operations") }, \
{"wide-bitfields", W_FIELD_BIT, \
- N_("Always treat bitfield as int-sized") }, \
+ N_("Always treat bit-field as int-sized") }, \
{"no-wide-bitfields", - W_FIELD_BIT, \
"" }, \
{"4byte-functions", OVERALIGN_FUNC_BIT, \
N_("Maximum amount for a single stack increment operation")} \
}
-/* The MCore ABI says that bitfields are unsigned by default. */
-/* The EPOC C++ environment does not support exceptions. */
-#define CC1_SPEC "-funsigned-bitfields %{!DIN_GCC:-fno-rtti} %{!DIN_GCC:-fno-exceptions}"
+#ifndef CC1_SPEC
+/* The MCore ABI says that bitfields are unsigned by default. */
+#define CC1_SPEC "-funsigned-bitfields"
+#endif
/* What options are we going to default to specific settings when
-O* happens; the user can subsequently override these settings.
/* Target machine storage Layout. */
-/* Define to use software floating point emulator for REAL_ARITHMETIC and
- decimal <-> binary conversion. */
-#define REAL_ARITHMETIC
-
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
if (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
#define LIBGCC2_WORDS_BIG_ENDIAN 0
#endif
-/* Number of bits in an addressable storage unit. */
-#define BITS_PER_UNIT 8
-
-/* Width in bits of a "word", which is the contents of a machine register.
- Note that this is not necessarily the width of data type `int';
- if using 16-bit ints on a 68000, this would still be 32.
- But on a machine with 16-bit registers, this would be 16. */
-#define BITS_PER_WORD 32
#define MAX_BITS_PER_WORD 32
/* Width of a word, in units (bytes). */
#define UNITS_PER_WORD 4
-/* Width in bits of a pointer.
- See also the macro `Pmode' defined below. */
-#define POINTER_SIZE 32
-
/* A C expression for the size in bits of the type `long long' on the
target machine. If you don't define this, the default is two
words. */
#define LONG_LONG_TYPE_SIZE 64
-/* the size of the boolean type -- in C++; */
-#define BOOL_TYPE_SIZE 8
-
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY 32
#define LK_REG 15 /* overloaded on general register */
#define AP_REG 16 /* fake arg pointer register */
/* RBE: mcore.md depends on CC_REG being set to 17 */
-#define CC_REG 17 /* cant name it C_REG */
+#define CC_REG 17 /* can't name it C_REG */
#define FP_REG 18 /* fake frame pointer register */
/* Specify the registers used for certain standard purposes.
reg number REGNO. This could be a conditional expression
or could index an array. */
-extern int regno_reg_class[];
+extern const int regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
/* When defined, the compiler allows registers explicitly used in the
/* Get reg_class from a letter such as appears in the machine
description. */
-extern enum reg_class reg_class_from_letter[];
+extern const enum reg_class reg_class_from_letter[];
#define REG_CLASS_FROM_LETTER(C) \
- ( (C) >= 'a' && (C) <= 'z' ? reg_class_from_letter[(C) - 'a'] : NO_REGS )
+ ( ISLOWER (C) ? reg_class_from_letter[(C) - 'a'] : NO_REGS )
/* The letters I, J, K, L, M, N, O, and P in a register constraint string
can be used to stand for particular ranges of immediate operands.
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE 12
-/* Alignment required for a trampoline in units. */
-#define TRAMPOLINE_ALIGN 4
+/* Alignment required for a trampoline in bits. */
+#define TRAMPOLINE_ALIGNMENT 32
/* Emit RTL insns to initialize the variable parts of a trampoline.
FNADDR is an RTX for the address of the function's pure code.
Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE */
-/* Specify the tree operation to be used to convert reals to integers. */
-#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
-
-/* This is the kind of divide that is easiest to do in the general case. */
-#define EASY_DIV_EXPR TRUNC_DIV_EXPR
-
/* 'char' is signed by default. */
#define DEFAULT_SIGNED_CHAR 0
#define DATA_SECTION_ASM_OP "\t.data"
#undef EXTRA_SECTIONS
-#define EXTRA_SECTIONS in_ctors, in_dtors, SUBTARGET_EXTRA_SECTIONS
+#define EXTRA_SECTIONS SUBTARGET_EXTRA_SECTIONS
#undef EXTRA_SECTION_FUNCTIONS
#define EXTRA_SECTION_FUNCTIONS \
- CTORS_SECTION_FUNCTION \
- DTORS_SECTION_FUNCTION \
SUBTARGET_EXTRA_SECTION_FUNCTIONS \
SWITCH_SECTION_FUNCTION
-#ifndef CTORS_SECTION_FUNCTION
-#define CTORS_SECTION_FUNCTION \
-void \
-ctors_section () \
-{ \
- if (in_section != in_ctors) \
- { \
- fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \
- in_section = in_ctors; \
- } \
-}
-
-#define DTORS_SECTION_FUNCTION \
-void \
-dtors_section () \
-{ \
- if (in_section != in_dtors) \
- { \
- fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
- in_section = in_dtors; \
- } \
-}
-#endif
-
/* Switch to SECTION (an `enum in_section').
??? This facility should be provided by GCC proper.
ASM_DECLARE_OBJECT_NAME and then switch back to the original section
afterwards. */
#define SWITCH_SECTION_FUNCTION \
-void \
+static void switch_to_section PARAMS ((enum in_section, tree)); \
+static void \
switch_to_section (section, decl) \
enum in_section section; \
tree decl; \
case in_text: text_section (); break; \
case in_data: data_section (); break; \
case in_named: named_section (decl, NULL, 0); break; \
- case in_ctors: ctors_section (); break; \
- case in_dtors: dtors_section (); break; \
SUBTARGET_SWITCH_SECTIONS \
default: abort (); break; \
} \
}
-
-#define ASM_OUTPUT_SECTION(file, nam) \
- do { fprintf (file, "\t.section\t%s\n", nam); } while (0)
+/* Switch into a generic section. */
+#undef TARGET_ASM_NAMED_SECTION
+#define TARGET_ASM_NAMED_SECTION mcore_asm_named_section
/* This is how to output an insn to push a register on the stack.
It need not be very fast code. */
(STACK_BOUNDARY / BITS_PER_UNIT))
-/* DBX register number for a given compiler register number. */
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
-
-/* Output a label definition. */
-#define ASM_OUTPUT_LABEL(FILE,NAME) \
- do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
-
/* Output a reference to a label. */
#undef ASM_OUTPUT_LABELREF
#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
- fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, MCORE_STRIP_NAME_ENCODING (NAME))
-
+ fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, \
+ (* targetm.strip_name_encoding) (NAME))
/* This is how to output an assembler line
that says to advance the location counter
#define ASM_DECLARE_RESULT(FILE, RESULT)
#endif
-/* Strip export encoding from a function name. */
-#define MCORE_STRIP_NAME_ENCODING(SYM_NAME) \
- ((SYM_NAME) + ((SYM_NAME)[0] == '@' ? 3 : 0))
-
-/* Strip any text from SYM_NAME added by ENCODE_SECTION_INFO and store
- the result in VAR. */
-#undef STRIP_NAME_ENCODING
-#define STRIP_NAME_ENCODING(VAR, SYM_NAME) \
- (VAR) = MCORE_STRIP_NAME_ENCODING (SYM_NAME)
-
-#undef UNIQUE_SECTION
-#define UNIQUE_SECTION(DECL, RELOC) mcore_unique_section (DECL, RELOC)
-
-#define REDO_SECTION_INFO_P(DECL) 1
-
#define MULTIPLE_SYMBOL_SPACES 1
#define SUPPORTS_ONE_ONLY 1
} \
while (0)
-/* Output a globalising directive for a label. */
-#define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
- (fprintf (STREAM, "\t.export\t"), \
- assemble_name (STREAM, NAME), \
- fputc ('\n',STREAM)) \
+/* Globalizing directive for a label. */
+#define GLOBAL_ASM_OP "\t.export\t"
/* The prefix to add to user-visible assembler symbols. */
#undef USER_LABEL_PREFIX
/* Output various types of constants. */
-/* This is how to output an assembler line defining a `double'. */
-#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
- do \
- { \
- char dstr[30]; \
- REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
- fprintf (FILE, "\t.double %s\n", dstr); \
- } \
- while (0)
-
-
-/* This is how to output an assembler line defining a `float' constant. */
-#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
- do \
- { \
- char dstr[30]; \
- REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
- fprintf (FILE, "\t.float %s\n", dstr); \
- } \
- while (0)
-
-#define ASM_OUTPUT_INT(STREAM, EXP) \
- (fprintf (STREAM, "\t.long\t"), \
- output_addr_const (STREAM, (EXP)), \
- fputc ('\n', STREAM))
-
-#define ASM_OUTPUT_SHORT(STREAM, EXP) \
- (fprintf (STREAM, "\t.short\t"), \
- output_addr_const (STREAM, (EXP)), \
- fputc ('\n', STREAM))
-
-#define ASM_OUTPUT_CHAR(STREAM, EXP) \
- (fprintf (STREAM, "\t.byte\t"), \
- output_addr_const (STREAM, (EXP)), \
- fputc ('\n', STREAM))
-
-#define ASM_OUTPUT_BYTE(STREAM, VALUE) \
- fprintf (STREAM, "\t.byte\t%d\n", VALUE) \
-
/* This is how to output an assembler line
that says to advance the location counter by SIZE bytes. */
#undef ASM_OUTPUT_SKIP
} \
while (0)
-/* We must mark dll symbols specially. Definitions of dllexport'd objects
- install some info in the .drective (PE) or .exports (ELF) sections. */
-#undef ENCODE_SECTION_INFO
-#define ENCODE_SECTION_INFO(DECL) mcore_encode_section_info (DECL)
-
/* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
For `%' followed by punctuation, CODE is the punctuation and X is null. */
/* This is to handle loads from the constant pool. */
#define MACHINE_DEPENDENT_REORG(X) mcore_dependent_reorg (X)
-/* This handles MCore dependent rtl simplifications. */
-#define MACHINE_DEPENDENT_SIMPLIFY(X,M,L,I,S) \
- mcore_dependent_simplify_rtx (X, M, L, I, S)
-
#define PREDICATE_CODES \
{ "mcore_arith_reg_operand", { REG, SUBREG }}, \
{ "mcore_general_movsrc_operand", { MEM, CONST_INT, REG, SUBREG }},\
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