/* Definitions of target machine for GNU compiler. MIPS version.
- Copyright (C) 1989-2014 Free Software Foundation, Inc.
+ Copyright (C) 1989-2015 Free Software Foundation, Inc.
Contributed by A. Lichnewsky (lich@inria.inria.fr).
Changed by Michael Meissner (meissner@osf.org).
64-bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and
#define ISA_HAS_DSP_MULT ISA_HAS_DSPR2
#endif
+/* ISA has LSA available. */
+#define ISA_HAS_LSA (mips_isa_rev >= 6)
+
+/* ISA has DLSA available. */
+#define ISA_HAS_DLSA (TARGET_64BIT && mips_isa_rev >= 6)
+
/* The ISA compression flags that are currently in effect. */
#define TARGET_COMPRESSION (target_flags & (MASK_MIPS16 | MASK_MICROMIPS))
#define MIPS_ARCH_OPTION_SPEC \
MIPS_ISA_LEVEL_OPTION_SPEC "|march=*"
-/* A spec that infers a -mips argument from an -march argument,
- or injects the default if no architecture is specified. */
+/* A spec that infers a -mips argument from an -march argument. */
#define MIPS_ISA_LEVEL_SPEC \
"%{" MIPS_ISA_LEVEL_OPTION_SPEC ":;: \
%{march=mips64r2|march=loongson3a|march=octeon|march=xlp: -mips64r2} \
%{march=mips64r3: -mips64r3} \
%{march=mips64r5: -mips64r5} \
- %{march=mips64r6: -mips64r6} \
+ %{march=mips64r6: -mips64r6}}"
+
+/* A spec that injects the default multilib ISA if no architecture is
+ specified. */
+
+#define MIPS_DEFAULT_ISA_LEVEL_SPEC \
+ "%{" MIPS_ISA_LEVEL_OPTION_SPEC ":;: \
%{!march=*: -" MULTILIB_ISA_DEFAULT "}}"
/* A spec that infers a -mhard-float or -msoft-float setting from an
"%{msynci|mno-synci:;:%{mips32r2|mips32r3|mips32r5|mips32r6|mips64r2 \
|mips64r3|mips64r5|mips64r6:-msynci;:-mno-synci}}"
+/* Infer a -mnan=2008 setting from a -mips argument. */
#define MIPS_ISA_NAN2008_SPEC \
"%{mnan*:;mips32r6|mips64r6:-mnan=2008}"
{"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \
{"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }
-/* A spec that infers the -mdsp setting from an -march argument. */
+/* A spec that infers the:
+ -mnan=2008 setting from a -mips argument,
+ -mdsp setting from a -march argument. */
#define BASE_DRIVER_SELF_SPECS \
MIPS_ISA_NAN2008_SPEC, \
"%{!mno-dsp: \
|| mips_isa_rev >= 1) \
&& !TARGET_MIPS16)
-/* ISA has data prefetch with limited 9-bit displacement. */
-#define ISA_HAS_PREFETCH_9BIT (mips_isa_rev >= 6)
+/* ISA has data prefetch, LL and SC with limited 9-bit displacement. */
+#define ISA_HAS_9BIT_DISPLACEMENT (mips_isa_rev >= 6)
/* ISA has data indexed prefetch instructions. This controls use of
'prefx', along with TARGET_HARD_FLOAT and TARGET_DOUBLE_FLOAT.
%{gcoff*:-mdebug} %{!gcoff*:-no-mdebug}"
#endif
+/* FP_ASM_SPEC represents the floating-point options that must be passed
+ to the assembler when FPXX support exists. Prior to that point the
+ assembler could accept the options but were not required for
+ correctness. We only add the options when absolutely necessary
+ because passing -msoft-float to the assembler will cause it to reject
+ all hard-float instructions which may require some user code to be
+ updated. */
+
+#ifdef HAVE_AS_DOT_MODULE
+#define FP_ASM_SPEC "\
+%{mhard-float} %{msoft-float} \
+%{msingle-float} %{mdouble-float}"
+#else
+#define FP_ASM_SPEC
+#endif
+
/* SUBTARGET_ASM_SPEC is always passed to the assembler. It may be
overridden by subtargets. */
%{modd-spreg} %{mno-odd-spreg} \
%{mshared} %{mno-shared} \
%{msym32} %{mno-sym32} \
-%{mtune=*} \
-%{mhard-float} %{msoft-float} \
-%{msingle-float} %{mdouble-float} \
+%{mtune=*}" \
+FP_ASM_SPEC "\
%(subtarget_asm_spec)"
/* Extra switches sometimes passed to the linker. */