/* Common subexpression elimination for GNU compiler.
- Copyright (C) 1987-2015 Free Software Foundation, Inc.
+ Copyright (C) 1987-2017 Free Software Foundation, Inc.
This file is part of GCC.
#include "config.h"
#include "system.h"
#include "coretypes.h"
-#include "tm.h"
+#include "backend.h"
+#include "target.h"
#include "rtl.h"
+#include "tree.h"
+#include "cfghooks.h"
+#include "df.h"
+#include "memmodel.h"
#include "tm_p.h"
-#include "hard-reg-set.h"
+#include "insn-config.h"
#include "regs.h"
-#include "predict.h"
-#include "vec.h"
-#include "hashtab.h"
-#include "hash-set.h"
-#include "machmode.h"
-#include "input.h"
-#include "function.h"
-#include "dominance.h"
-#include "cfg.h"
+#include "emit-rtl.h"
+#include "recog.h"
#include "cfgrtl.h"
#include "cfganal.h"
#include "cfgcleanup.h"
-#include "basic-block.h"
-#include "flags.h"
-#include "insn-config.h"
-#include "recog.h"
-#include "symtab.h"
-#include "statistics.h"
-#include "double-int.h"
-#include "real.h"
-#include "fixed-value.h"
#include "alias.h"
-#include "wide-int.h"
-#include "inchash.h"
-#include "tree.h"
-#include "expmed.h"
-#include "dojump.h"
-#include "explow.h"
-#include "calls.h"
-#include "emit-rtl.h"
-#include "varasm.h"
-#include "stmt.h"
-#include "expr.h"
-#include "diagnostic-core.h"
#include "toplev.h"
-#include "ggc.h"
-#include "except.h"
-#include "target.h"
#include "params.h"
#include "rtlhooks-def.h"
#include "tree-pass.h"
-#include "df.h"
#include "dbgcnt.h"
#include "rtl-iter.h"
|| (HARD_REGISTER_NUM_P (N) \
&& FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
-#define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
-#define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
+#define COST(X, MODE) \
+ (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
+#define COST_IN(X, MODE, OUTER, OPNO) \
+ (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
/* Get the number of times this register has been updated in this
basic block. */
static sbitmap cse_visited_basic_blocks;
static bool fixed_base_plus_p (rtx x);
-static int notreg_cost (rtx, enum rtx_code, int);
+static int notreg_cost (rtx, machine_mode, enum rtx_code, int);
static int preferable (int, int, int, int);
static void new_basic_block (void);
static void make_new_qty (unsigned int, machine_mode);
from COST macro to keep it simple. */
static int
-notreg_cost (rtx x, enum rtx_code outer, int opno)
+notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno)
{
+ scalar_int_mode int_mode, inner_mode;
return ((GET_CODE (x) == SUBREG
&& REG_P (SUBREG_REG (x))
- && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
- && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
- && (GET_MODE_SIZE (GET_MODE (x))
- < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
+ && is_int_mode (mode, &int_mode)
+ && is_int_mode (GET_MODE (SUBREG_REG (x)), &inner_mode)
+ && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
&& subreg_lowpart_p (x)
- && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x),
- GET_MODE (SUBREG_REG (x))))
+ && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode))
? 0
- : rtx_cost (x, outer, opno, optimize_this_for_speed_p) * 2);
+ : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2);
}
\f
don't prefer pseudos over hard regs so that we derive constants in
argument registers from other argument registers rather than from the
original pseudo that was used to synthesize the constant. */
- insert_with_costs (exp, elt, hash, mode, COST (reg), 1);
+ insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1);
}
/* The constant CST is equivalent to the register REG. Create
insert (rtx x, struct table_elt *classp, unsigned int hash,
machine_mode mode)
{
- return
- insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x));
+ return insert_with_costs (x, classp, hash, mode,
+ COST (x, mode), approx_reg_cost (x));
}
\f
{
HOST_WIDE_INT in_table
= TEST_HARD_REG_BIT (hard_regs_in_table, regno);
- unsigned int endregno = END_HARD_REGNO (x);
+ unsigned int endregno = END_REGNO (x);
unsigned int tregno, tendregno, rn;
struct table_elt *p, *next;
continue;
tregno = REGNO (p->exp);
- tendregno = END_HARD_REGNO (p->exp);
+ tendregno = END_REGNO (p->exp);
if (tendregno > regno && tregno < endregno)
remove_from_table (p, hash);
}
continue;
regno = REGNO (p->exp);
- endregno = END_HARD_REGNO (p->exp);
+ endregno = END_REGNO (p->exp);
for (i = regno; i < endregno; i++)
if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
/* We don't hash on the address of the CODE_LABEL to avoid bootstrap
differences and differences between each stage's debugging dumps. */
hash += (((unsigned int) LABEL_REF << 7)
- + CODE_LABEL_NUMBER (LABEL_REF_LABEL (x)));
+ + CODE_LABEL_NUMBER (label_ref_label (x)));
return hash;
case SYMBOL_REF:
return x == y;
case LABEL_REF:
- return LABEL_REF_LABEL (x) == LABEL_REF_LABEL (y);
+ return label_ref_label (x) == label_ref_label (y);
case SYMBOL_REF:
return XSTR (x, 0) == XSTR (y, 0);
if (x == 0)
break;
- /* If we need to reverse the comparison, make sure that that is
+ /* If we need to reverse the comparison, make sure that is
possible -- we can't necessarily infer the value of GE from LT
with floating-point operands. */
if (reverse_code)
{
- enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
+ enum rtx_code reversed = reversed_comparison_code (x, NULL);
if (reversed == UNKNOWN)
break;
else
}
return x;
-#ifdef NO_FUNCTION_CSE
case CALL:
- if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
+ if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0)))
return x;
break;
-#endif
/* Anything else goes through the loop below. */
default:
argument. */
if (const_arg != 0
&& const_arg != folded_arg
- && COST_IN (const_arg, code, i) <= COST_IN (folded_arg, code, i)
+ && (COST_IN (const_arg, mode_arg, code, i)
+ <= COST_IN (folded_arg, mode_arg, code, i))
/* It's not safe to substitute the operand of a conversion
operator with a constant, as the conversion's identity
consistent with the order in X. */
if (canonicalize_change_group (insn, x))
{
- rtx tem;
- tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
- tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
+ std::swap (const_arg0, const_arg1);
+ std::swap (folded_arg0, folded_arg1);
}
apply_change_group ();
if (SCALAR_FLOAT_MODE_P (mode))
{
#ifdef FLOAT_STORE_FLAG_VALUE
- true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
+ true_rtx = (const_double_from_real_value
(FLOAT_STORE_FLAG_VALUE (mode), mode));
#else
true_rtx = NULL_RTX;
if (p != NULL)
{
cheapest_simplification = x;
- cheapest_cost = COST (x);
+ cheapest_cost = COST (x, mode);
for (p = p->first_same_value; p != NULL; p = p->next_same_value)
{
if (simp_result == NULL)
continue;
- cost = COST (simp_result);
+ cost = COST (simp_result, mode);
if (cost < cheapest_cost)
{
cheapest_cost = cost;
: lookup_as_function (folded_arg0, MINUS);
if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg1))
+ && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg1))
return XEXP (y, 0);
/* Now try for a CONST of a MINUS like the above. */
: lookup_as_function (folded_arg0, CONST))) != 0
&& GET_CODE (XEXP (y, 0)) == MINUS
&& GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg1))
+ && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg1))
return XEXP (XEXP (y, 0), 0);
}
: lookup_as_function (folded_arg1, MINUS);
if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg0))
+ && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg0))
return XEXP (y, 0);
/* Now try for a CONST of a MINUS like the above. */
: lookup_as_function (folded_arg1, CONST))) != 0
&& GET_CODE (XEXP (y, 0)) == MINUS
&& GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
- && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg0))
+ && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg0))
return XEXP (XEXP (y, 0), 0);
}
instead we test for the problematic value in a more direct
manner and hope the Sun compilers get it correct. */
&& INTVAL (const_arg1) !=
- ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
+ (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1))
&& REG_P (folded_arg1))
{
rtx new_const = GEN_INT (-INTVAL (const_arg1));
{
if (SHIFT_COUNT_TRUNCATED)
canon_const_arg1 = GEN_INT (INTVAL (const_arg1)
- & (GET_MODE_BITSIZE (mode)
+ & (GET_MODE_UNIT_BITSIZE (mode)
- 1));
else
break;
if (code == PLUS && const_arg1 == inner_const
&& ((HAVE_PRE_INCREMENT
- && exact_log2 (INTVAL (const_arg1)) >= 0)
+ && pow2p_hwi (INTVAL (const_arg1)))
|| (HAVE_POST_INCREMENT
- && exact_log2 (INTVAL (const_arg1)) >= 0)
+ && pow2p_hwi (INTVAL (const_arg1)))
|| (HAVE_PRE_DECREMENT
- && exact_log2 (- INTVAL (const_arg1)) >= 0)
+ && pow2p_hwi (- INTVAL (const_arg1)))
|| (HAVE_POST_DECREMENT
- && exact_log2 (- INTVAL (const_arg1)) >= 0)))
+ && pow2p_hwi (- INTVAL (const_arg1)))))
break;
/* ??? Vector mode shifts by scalar
{
if (SHIFT_COUNT_TRUNCATED)
inner_const = GEN_INT (INTVAL (inner_const)
- & (GET_MODE_BITSIZE (mode) - 1));
+ & (GET_MODE_UNIT_BITSIZE (mode)
+ - 1));
else
break;
}
/* As an exception, we can turn an ASHIFTRT of this
form into a shift of the number of bits - 1. */
if (code == ASHIFTRT)
- new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
+ new_const = GEN_INT (GET_MODE_UNIT_BITSIZE (mode) - 1);
else if (!side_effects_p (XEXP (y, 0)))
return CONST0_RTX (mode);
else
the subreg. Note that the upper bits of paradoxical subregs
are undefined, so they cannot be said to equal anything. */
if (REG_P (SUBREG_REG (x))
- && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (imode)
+ && !paradoxical_subreg_p (x)
&& (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
+ /* On a cc0 target the cc0-setter and cc0-user may end up in different
+ blocks. When that happens the tracking of the cc0-setter via
+ PREV_INSN_CC0 is spoiled. That means that fold_rtx may return
+ NULL_RTX. In those cases, there's nothing to record. */
+ if (op0 == NULL_RTX || op1 == NULL_RTX)
+ return;
+
code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
if (! cond_known_true)
{
if we test MODE instead, we can get an infinite recursion
alternating between two modes each wider than MODE. */
- if (code == NE && GET_CODE (op0) == SUBREG
- && subreg_lowpart_p (op0)
- && (GET_MODE_SIZE (GET_MODE (op0))
- < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
+ if (code == NE
+ && partial_subreg_p (op0)
+ && subreg_lowpart_p (op0))
{
machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
rtx tem = record_jump_cond_subreg (inner_mode, op1);
reversed_nonequality);
}
- if (code == NE && GET_CODE (op1) == SUBREG
- && subreg_lowpart_p (op1)
- && (GET_MODE_SIZE (GET_MODE (op1))
- < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
+ if (code == NE
+ && partial_subreg_p (op1)
+ && subreg_lowpart_p (op1))
{
machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
rtx tem = record_jump_cond_subreg (inner_mode, op0);
The size of this field should match the size of the mode
field of struct rtx_def (see rtl.h). */
ENUM_BITFIELD(machine_mode) mode : 8;
- /* A constant equivalent for SET_SRC, if any. */
- rtx src_const;
/* Hash value of constant equivalent for SET_SRC. */
unsigned src_const_hash;
+ /* A constant equivalent for SET_SRC, if any. */
+ rtx src_const;
/* Table entry for constant equivalent for SET_SRC, if any. */
struct table_elt *src_const_elt;
/* Table entry for the destination address. */
return n_sets;
}
\f
+/* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
+
+static void
+canon_asm_operands (rtx x, rtx_insn *insn)
+{
+ for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
+ {
+ rtx input = ASM_OPERANDS_INPUT (x, i);
+ if (!(REG_P (input) && HARD_REGISTER_P (input)))
+ {
+ input = canon_reg (input, insn);
+ validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
+ }
+ }
+}
+
/* Where possible, substitute every register reference in the N_SETS
- number of SETS in INSN with the the canonical register.
+ number of SETS in INSN with the canonical register.
Register canonicalization propagatest the earliest register (i.e.
one that is set before INSN) with the same value. This is a very
/* Canonicalize a USE of a pseudo register or memory location. */
canon_reg (x, insn);
else if (GET_CODE (x) == ASM_OPERANDS)
- {
- for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
- {
- rtx input = ASM_OPERANDS_INPUT (x, i);
- if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER))
- {
- input = canon_reg (input, insn);
- validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
- }
- }
- }
+ canon_asm_operands (x, insn);
else if (GET_CODE (x) == CALL)
{
canon_reg (x, insn);
&& ! (REG_P (XEXP (y, 0))
&& REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
canon_reg (y, insn);
+ else if (GET_CODE (y) == ASM_OPERANDS)
+ canon_asm_operands (y, insn);
else if (GET_CODE (y) == CALL)
{
canon_reg (y, insn);
canonicalize_insn (insn, &sets, n_sets);
/* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
- if different, or if the DEST is a STRICT_LOW_PART. The latter condition
- is necessary because SRC_EQV is handled specially for this case, and if
- it isn't set, then there will be no equivalence for the destination. */
+ if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
+ latter condition is necessary because SRC_EQV is handled specially for
+ this case, and if it isn't set, then there will be no equivalence
+ for the destination. */
if (n_sets == 1 && REG_NOTES (insn) != 0
- && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
- && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
- || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
- src_eqv = copy_rtx (XEXP (tem, 0));
+ && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
+ {
+
+ if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT
+ && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
+ || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
+ src_eqv = copy_rtx (XEXP (tem, 0));
+ /* If DEST is of the form ZERO_EXTACT, as in:
+ (set (zero_extract:SI (reg:SI 119)
+ (const_int 16 [0x10])
+ (const_int 16 [0x10]))
+ (const_int 51154 [0xc7d2]))
+ REG_EQUAL note will specify the value of register (reg:SI 119) at this
+ point. Note that this is different from SRC_EQV. We can however
+ calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
+ else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
+ && CONST_INT_P (XEXP (tem, 0))
+ && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
+ && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
+ {
+ rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
+ /* This is the mode of XEXP (tem, 0) as well. */
+ scalar_int_mode dest_mode
+ = as_a <scalar_int_mode> (GET_MODE (dest_reg));
+ rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
+ rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
+ HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
+ HOST_WIDE_INT mask;
+ unsigned int shift;
+ if (BITS_BIG_ENDIAN)
+ shift = (GET_MODE_PRECISION (dest_mode)
+ - INTVAL (pos) - INTVAL (width));
+ else
+ shift = INTVAL (pos);
+ if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
+ mask = HOST_WIDE_INT_M1;
+ else
+ mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
+ val = (val >> shift) & mask;
+ src_eqv = GEN_INT (val);
+ }
+ }
/* Set sets[i].src_elt to the class each source belongs to.
Detect assignments from or to volatile things
for (i = 0; i < n_sets; i++)
{
bool repeat = false;
+ bool mem_noop_insn = false;
rtx src, dest;
rtx src_folded;
struct table_elt *elt = 0, *p;
/* Set nonzero if we need to call force_const_mem on with the
contents of src_folded before using it. */
int src_folded_force_flag = 0;
+ scalar_int_mode int_mode;
dest = SET_DEST (sets[i].rtl);
src = SET_SRC (sets[i].rtl);
/* Simplify and foldable subexpressions in SRC. Then get the fully-
simplified result, which may not necessarily be valid. */
- src_folded = fold_rtx (src, insn);
+ src_folded = fold_rtx (src, NULL);
#if 0
/* ??? This caused bad code to be generated for the m68k port with -O2.
&& INTVAL (width) < HOST_BITS_PER_WIDE_INT
&& (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
src_folded
- = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
+ = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1
<< INTVAL (width)) - 1));
}
#endif
wider mode. */
if (src_const && src_related == 0 && CONST_INT_P (src_const)
- && GET_MODE_CLASS (mode) == MODE_INT
- && GET_MODE_PRECISION (mode) < BITS_PER_WORD)
+ && is_int_mode (mode, &int_mode)
+ && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD)
{
- machine_mode wider_mode;
-
- for (wider_mode = GET_MODE_WIDER_MODE (mode);
- wider_mode != VOIDmode
- && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD
- && src_related == 0;
- wider_mode = GET_MODE_WIDER_MODE (wider_mode))
+ opt_scalar_int_mode wider_mode_iter;
+ FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode)
{
+ scalar_int_mode wider_mode = wider_mode_iter.require ();
+ if (GET_MODE_PRECISION (wider_mode) > BITS_PER_WORD)
+ break;
+
struct table_elt *const_elt
= lookup (src_const, HASH (src_const, wider_mode), wider_mode);
const_elt; const_elt = const_elt->next_same_value)
if (REG_P (const_elt->exp))
{
- src_related = gen_lowpart (mode, const_elt->exp);
+ src_related = gen_lowpart (int_mode, const_elt->exp);
break;
}
+
+ if (src_related != 0)
+ break;
}
}
value. */
if (flag_expensive_optimizations && ! src_related
+ && is_a <scalar_int_mode> (mode, &int_mode)
&& GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
- && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
+ && GET_MODE_SIZE (int_mode) < UNITS_PER_WORD)
{
- machine_mode tmode;
+ opt_scalar_int_mode tmode_iter;
rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
- for (tmode = GET_MODE_WIDER_MODE (mode);
- GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
- tmode = GET_MODE_WIDER_MODE (tmode))
+ FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
{
+ scalar_int_mode tmode = tmode_iter.require ();
+ if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
+ break;
+
rtx inner = gen_lowpart (tmode, XEXP (src, 0));
struct table_elt *larger_elt;
if (REG_P (larger_elt->exp))
{
src_related
- = gen_lowpart (mode, larger_elt->exp);
+ = gen_lowpart (int_mode, larger_elt->exp);
break;
}
}
}
-#ifdef LOAD_EXTEND_OP
/* See if a MEM has already been loaded with a widening operation;
if it has, we can use a subreg of that. Many CISC machines
also have such operations, but this is only likely to be
beneficial on these machines. */
+ rtx_code extend_op;
if (flag_expensive_optimizations && src_related == 0
- && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
- && GET_MODE_CLASS (mode) == MODE_INT
&& MEM_P (src) && ! do_not_record
- && LOAD_EXTEND_OP (mode) != UNKNOWN)
+ && is_a <scalar_int_mode> (mode, &int_mode)
+ && (extend_op = load_extend_op (int_mode)) != UNKNOWN)
{
struct rtx_def memory_extend_buf;
rtx memory_extend_rtx = &memory_extend_buf;
- machine_mode tmode;
/* Set what we are trying to extend and the operation it might
have been extended with. */
memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
- PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
+ PUT_CODE (memory_extend_rtx, extend_op);
XEXP (memory_extend_rtx, 0) = src;
- for (tmode = GET_MODE_WIDER_MODE (mode);
- GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
- tmode = GET_MODE_WIDER_MODE (tmode))
+ opt_scalar_int_mode tmode_iter;
+ FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
{
struct table_elt *larger_elt;
+ scalar_int_mode tmode = tmode_iter.require ();
+ if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
+ break;
+
PUT_MODE (memory_extend_rtx, tmode);
larger_elt = lookup (memory_extend_rtx,
HASH (memory_extend_rtx, tmode), tmode);
larger_elt; larger_elt = larger_elt->next_same_value)
if (REG_P (larger_elt->exp))
{
- src_related = gen_lowpart (mode, larger_elt->exp);
+ src_related = gen_lowpart (int_mode, larger_elt->exp);
break;
}
break;
}
}
-#endif /* LOAD_EXTEND_OP */
/* Try to express the constant using a register+offset expression
derived from a constant anchor. */
&& ! (src != 0
&& GET_CODE (src) == SUBREG
&& GET_MODE (src) == GET_MODE (p->exp)
- && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
- < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
+ && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
+ GET_MODE (SUBREG_REG (p->exp)))))
continue;
if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
src_cost = src_regcost = -1;
else
{
- src_cost = COST (src);
+ src_cost = COST (src, mode);
src_regcost = approx_reg_cost (src);
}
}
src_eqv_cost = src_eqv_regcost = -1;
else
{
- src_eqv_cost = COST (src_eqv_here);
+ src_eqv_cost = COST (src_eqv_here, mode);
src_eqv_regcost = approx_reg_cost (src_eqv_here);
}
}
src_folded_cost = src_folded_regcost = -1;
else
{
- src_folded_cost = COST (src_folded);
+ src_folded_cost = COST (src_folded, mode);
src_folded_regcost = approx_reg_cost (src_folded);
}
}
src_related_cost = src_related_regcost = -1;
else
{
- src_related_cost = COST (src_related);
+ src_related_cost = COST (src_related, mode);
src_related_regcost = approx_reg_cost (src_related);
/* If a const-anchor is used to synthesize a constant that
&& ! (src != 0
&& GET_CODE (src) == SUBREG
&& GET_MODE (src) == GET_MODE (elt->exp)
- && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
- < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
+ && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
+ GET_MODE (SUBREG_REG (elt->exp)))))
{
elt = elt->next_same_value;
continue;
}
/* Avoid creation of overlapping memory moves. */
- if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
+ if (MEM_P (trial) && MEM_P (dest) && !rtx_equal_p (trial, dest))
{
rtx src, dest;
HOST_WIDE_INT val = INTVAL (dest_cst);
HOST_WIDE_INT mask;
unsigned int shift;
+ /* This is the mode of DEST_CST as well. */
+ scalar_int_mode dest_mode
+ = as_a <scalar_int_mode> (GET_MODE (dest_reg));
if (BITS_BIG_ENDIAN)
- shift = GET_MODE_PRECISION (GET_MODE (dest_reg))
+ shift = GET_MODE_PRECISION (dest_mode)
- INTVAL (pos) - INTVAL (width);
else
shift = INTVAL (pos);
if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
- mask = ~(HOST_WIDE_INT) 0;
+ mask = HOST_WIDE_INT_M1;
else
- mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1;
+ mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
val &= ~(mask << shift);
val |= (INTVAL (trial) & mask) << shift;
- val = trunc_int_for_mode (val, GET_MODE (dest_reg));
+ val = trunc_int_for_mode (val, dest_mode);
validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
dest_reg, 1);
validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
break;
}
+ /* Similarly, lots of targets don't allow no-op
+ (set (mem x) (mem x)) moves. */
+ else if (n_sets == 1
+ && MEM_P (trial)
+ && MEM_P (dest)
+ && rtx_equal_p (trial, dest)
+ && !side_effects_p (dest)
+ && (cfun->can_delete_dead_exceptions
+ || insn_nothrow_p (insn)))
+ {
+ SET_SRC (sets[i].rtl) = trial;
+ mem_noop_insn = true;
+ break;
+ }
+
/* Reject certain invalid forms of CONST that we create. */
else if (CONSTANT_P (trial)
&& GET_CODE (trial) == CONST
/* If we had a constant that is cheaper than what we are now
setting SRC to, use that constant. We ignored it when we
thought we could make this into a no-op. */
- if (src_const && COST (src_const) < COST (src)
+ if (src_const && COST (src_const, mode) < COST (src, mode)
&& validate_change (insn, &SET_SRC (sets[i].rtl),
src_const, 0))
src = src_const;
else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
{
/* One less use of the label this insn used to jump to. */
- delete_insn_and_edges (insn);
+ cse_cfg_altered |= delete_insn_and_edges (insn);
cse_jumps_altered = true;
/* No more processing for this set. */
sets[i].rtl = 0;
}
+ /* Similarly for no-op MEM moves. */
+ else if (mem_noop_insn)
+ {
+ if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
+ cse_cfg_altered = true;
+ cse_cfg_altered |= delete_insn_and_edges (insn);
+ /* No more processing for this set. */
+ sets[i].rtl = 0;
+ }
+
/* If this SET is now setting PC to a label, we know it used to
be a conditional or computed branch. */
else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
and hope for the best. */
if (n_sets == 1)
{
- rtx_insn *new_rtx;
+ rtx_jump_insn *new_rtx;
rtx note;
- new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
+ rtx_insn *seq = targetm.gen_jump (XEXP (src, 0));
+ new_rtx = emit_jump_insn_before (seq, insn);
JUMP_LABEL (new_rtx) = XEXP (src, 0);
LABEL_NUSES (XEXP (src, 0))++;
REG_NOTES (new_rtx) = note;
}
- delete_insn_and_edges (insn);
+ cse_cfg_altered |= delete_insn_and_edges (insn);
insn = new_rtx;
}
else
{
if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
invalidate_memory ();
+ else
+ /* For const/pure calls, invalidate any argument slots, because
+ those are owned by the callee. */
+ for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
+ if (GET_CODE (XEXP (tem, 0)) == USE
+ && MEM_P (XEXP (XEXP (tem, 0), 0)))
+ invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode);
invalidate_for_call ();
}
|| GET_MODE (dest) == BLKmode
/* If we didn't put a REG_EQUAL value or a source into the hash
table, there is no point is recording DEST. */
- || sets[i].src_elt == 0
- /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
- or SIGN_EXTEND, don't record DEST since it can cause
- some tracking to be wrong.
-
- ??? Think about this more later. */
- || (paradoxical_subreg_p (dest)
- && (GET_CODE (sets[i].src) == SIGN_EXTEND
- || GET_CODE (sets[i].src) == ZERO_EXTEND)))
+ || sets[i].src_elt == 0)
continue;
/* STRICT_LOW_PART isn't part of the value BEING set,
sets[i].dest_hash = HASH (dest, GET_MODE (dest));
}
+ /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
+ outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
+ if (paradoxical_subreg_p (dest))
+ continue;
+
elt = insert (dest, sets[i].src_elt,
sets[i].dest_hash, GET_MODE (dest));
&& (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
/ UNITS_PER_WORD)
== (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
- && (GET_MODE_SIZE (GET_MODE (dest))
- >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
+ && !partial_subreg_p (dest)
&& sets[i].src_elt != 0)
{
machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
rtx new_src = 0;
unsigned src_hash;
struct table_elt *src_elt;
- int byte = 0;
/* Ignore invalid entries. */
if (!REG_P (elt->exp)
new_src = elt->exp;
else
{
- /* Calculate big endian correction for the SUBREG_BYTE.
- We have already checked that M1 (GET_MODE (dest))
- is not narrower than M2 (new_mode). */
- if (BYTES_BIG_ENDIAN)
- byte = (GET_MODE_SIZE (GET_MODE (dest))
- - GET_MODE_SIZE (new_mode));
-
+ unsigned int byte
+ = subreg_lowpart_offset (new_mode, GET_MODE (dest));
new_src = simplify_gen_subreg (new_mode, elt->exp,
GET_MODE (dest), byte);
}
if (GET_CODE (x) == LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x)
&& (!JUMP_P (insn)
- || !label_is_jump_target_p (LABEL_REF_LABEL (x), insn))
- && LABEL_P (LABEL_REF_LABEL (x))
- && INSN_UID (LABEL_REF_LABEL (x)) != 0
- && !find_reg_note (insn, REG_LABEL_OPERAND, LABEL_REF_LABEL (x)))
+ || !label_is_jump_target_p (label_ref_label (x), insn))
+ && LABEL_P (label_ref_label (x))
+ && INSN_UID (label_ref_label (x)) != 0
+ && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x)))
return true;
}
return false;
equivalences due to the condition being tested. */
insn = BB_END (bb);
if (path_entry < path_size - 1
+ && EDGE_COUNT (bb->succs) == 2
&& JUMP_P (insn)
&& single_set (insn)
&& any_condjump_p (insn))
int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
int i, n_blocks;
+ /* CSE doesn't use dominane info but can invalidate it in different ways.
+ For simplicity free dominance info here. */
+ free_dominance_info (CDI_DOMINATORS);
+
df_set_flags (DF_LR_RUN_DCE);
df_note_add_problem ();
df_analyze ();
set_live_p (rtx set, rtx_insn *insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
int *counts)
{
- rtx tem;
+ rtx_insn *tem;
if (set_noop_p (set))
;
count_reg_usage (insn, counts, NULL_RTX, -1);
ndead++;
}
- delete_insn_and_edges (insn);
+ cse_cfg_altered |= delete_insn_and_edges (insn);
}
}
static void
cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
- rtx *loc, rtx insn, rtx newreg)
+ rtx *loc, rtx_insn *insn, rtx newreg)
{
FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
{
newreg);
}
- delete_insn_and_edges (insns[i]);
+ cse_cfg_altered |= delete_insn_and_edges (insns[i]);
}
return mode;
{
timevar_push (TV_JUMP);
rebuild_jump_labels (get_insns ());
- cleanup_cfg (CLEANUP_CFG_CHANGED);
+ cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
timevar_pop (TV_JUMP);
}
else if (tem == 1 || optimize > 1)
- cleanup_cfg (0);
+ cse_cfg_altered |= cleanup_cfg (0);
return 0;
}
{
timevar_push (TV_JUMP);
rebuild_jump_labels (get_insns ());
- cleanup_cfg (CLEANUP_CFG_CHANGED);
+ cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
timevar_pop (TV_JUMP);
}
else if (tem == 1)
- cleanup_cfg (0);
+ cse_cfg_altered |= cleanup_cfg (0);
cse_not_expected = 1;
return 0;
rebuild_jump_labels (get_insns ());
tem = cse_main (get_insns (), max_reg_num ());
- purge_all_dead_edges ();
+ cse_cfg_altered |= purge_all_dead_edges ();
delete_trivially_dead_insns (get_insns (), max_reg_num ());
cse_not_expected = !flag_rerun_cse_after_loop;
{
timevar_push (TV_JUMP);
rebuild_jump_labels (get_insns ());
- cleanup_cfg (CLEANUP_CFG_CHANGED);
+ cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
timevar_pop (TV_JUMP);
}
else if (tem == 1)
- cleanup_cfg (0);
+ cse_cfg_altered |= cleanup_cfg (0);
flag_cse_follow_jumps = save_cfj;
return 0;
projects / gcc.git / blobdiff