-@c Copyright (C) 2002-2017 Free Software Foundation, Inc.
+@c Copyright (C) 2002-2018 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
chapter of this manual.
@end itemize
+The @file{@var{machine}.h} header is included very early in GCC's
+standard sequence of header files, while @file{@var{machine}-protos.h}
+is included late in the sequence. Thus @file{@var{machine}-protos.h}
+can include declarations referencing types that are not defined when
+@file{@var{machine}.h} is included, specifically including those from
+@file{rtl.h} and @file{tree.h}. Since both RTL and tree types may not
+be available in every context where @file{@var{machine}-protos.h} is
+included, in this file you should guard declarations using these types
+inside appropriate @code{#ifdef RTX_CODE} or @code{#ifdef TREE_CODE}
+conditional code segments.
+
+If the backend uses shared data structures that require @code{GTY} markers
+for garbage collection (@pxref{Type Information}), you must declare those
+in @file{@var{machine}.h} rather than @file{@var{machine}-protos.h}.
+Any definitions required for building libgcc must also go in
+@file{@var{machine}.h}.
+
+GCC uses the macro @code{IN_TARGET_CODE} to distinguish between
+machine-specific @file{.c} and @file{.cc} files and
+machine-independent @file{.c} and @file{.cc} files. Machine-specific
+files should use the directive:
+
+@example
+#define IN_TARGET_CODE 1
+@end example
+
+before including @code{config.h}.
+
If the back end is added to the official GCC source repository, the
following are also necessary:
@subsubsection Vector-specific attributes
@table @code
+@item vect_align_stack_vars
+The target's ABI allows stack variables to be aligned to the preferred
+vector alignment.
+
@item vect_condition
Target supports vector conditional operations.
alignment.
@item vect_float
-Target supports hardware vectors of @code{float}.
+Target supports hardware vectors of @code{float} when
+@option{-funsafe-math-optimizations} is in effect.
+
+@item vect_float_strict
+Target supports hardware vectors of @code{float} when
+@option{-funsafe-math-optimizations} is not in effect.
+This implies @code{vect_float}.
@item vect_int
Target supports hardware vectors of @code{int}.
@item vect_long_long
Target supports hardware vectors of @code{long long}.
+@item vect_fully_masked
+Target supports fully-masked (also known as fully-predicated) loops,
+so that vector loops can handle partial as well as full vectors.
+
+@item vect_masked_store
+Target supports vector masked stores.
+
+@item vect_scatter_store
+Target supports vector scatter stores.
+
@item vect_aligned_arrays
Target aligns arrays to vector alignment boundary.
alignment, but also allows unaligned vector accesses in some
circumstances.
+@item vect_variable_length
+Target has variable-length vectors.
+
@item vect_widen_sum_hi_to_si
Target supports a vector widening summation of @code{short} operands
into @code{int} results, or can promote (unpack) from @code{short}
@item vect_sizes_32B_16B
Target supports 32- and 16-bytes vectors.
+
+@item vect_logical_reduc
+Target supports AND, IOR and XOR reduction on vectors.
+
+@item vect_fold_extract_last
+Target supports the @code{fold_extract_last} optab.
@end table
@subsubsection Thread Local Storage attributes
variant of the ABI for the ARM Architecture (as selected with
@code{-mfloat-abi=hard}).
+@item arm_softfloat
+ARM target uses the soft-float ABI with no floating-point instructions
+used whatsoever (as selected with @code{-mfloat-abi=soft}).
+
@item arm_hard_vfp_ok
ARM target supports @code{-mfpu=vfp -mfloat-abi=hard}.
Some multilibs may be incompatible with these options.
@item arm_v8_1a_neon_ok
@anchor{arm_v8_1a_neon_ok}
-ARM target supports options to generate ARMv8.1 Adv.SIMD instructions.
+ARM target supports options to generate ARMv8.1-A Adv.SIMD instructions.
Some multilibs may be incompatible with these options.
@item arm_v8_1a_neon_hw
-ARM target supports executing ARMv8.1 Adv.SIMD instructions. Some
+ARM target supports executing ARMv8.1-A Adv.SIMD instructions. Some
multilibs may be incompatible with the options needed. Implies
arm_v8_1a_neon_ok.
@item arm_v8_2a_fp16_scalar_ok
@anchor{arm_v8_2a_fp16_scalar_ok}
-ARM target supports options to generate instructions for ARMv8.2 and
+ARM target supports options to generate instructions for ARMv8.2-A and
scalar instructions from the FP16 extension. Some multilibs may be
incompatible with these options.
@item arm_v8_2a_fp16_scalar_hw
-ARM target supports executing instructions for ARMv8.2 and scalar
+ARM target supports executing instructions for ARMv8.2-A and scalar
instructions from the FP16 extension. Some multilibs may be
incompatible with these options. Implies arm_v8_2a_fp16_neon_ok.
@item arm_v8_2a_fp16_neon_ok
@anchor{arm_v8_2a_fp16_neon_ok}
-ARM target supports options to generate instructions from ARMv8.2 with
+ARM target supports options to generate instructions from ARMv8.2-A with
the FP16 extension. Some multilibs may be incompatible with these
options. Implies arm_v8_2a_fp16_scalar_ok.
@item arm_v8_2a_fp16_neon_hw
-ARM target supports executing instructions from ARMv8.2 with the FP16
+ARM target supports executing instructions from ARMv8.2-A with the FP16
extension. Some multilibs may be incompatible with these options.
Implies arm_v8_2a_fp16_neon_ok and arm_v8_2a_fp16_scalar_hw.
@item arm_v8_2a_dotprod_neon_ok
@anchor{arm_v8_2a_dotprod_neon_ok}
-ARM target supports options to generate instructions from ARMv8.2 with
+ARM target supports options to generate instructions from ARMv8.2-A with
the Dot Product extension. Some multilibs may be incompatible with these
options.
@item arm_v8_2a_dotprod_neon_hw
-ARM target supports executing instructions from ARMv8.2 with the Dot
+ARM target supports executing instructions from ARMv8.2-A with the Dot
Product extension. Some multilibs may be incompatible with these options.
Implies arm_v8_2a_dotprod_neon_ok.
+@item arm_fp16fml_neon_ok
+@anchor{arm_fp16fml_neon_ok}
+ARM target supports extensions to generate the @code{VFMAL} and @code{VFMLS}
+half-precision floating-point instructions available from ARMv8.2-A and
+onwards. Some multilibs may be incompatible with these options.
+
@item arm_prefer_ldrd_strd
ARM target prefers @code{LDRD} and @code{STRD} instructions over
@code{LDM} and @code{STM} instructions.
@item automatic_stack_alignment
Target supports automatic stack alignment.
-@item cilkplus_runtime
-Target supports the Cilk Plus runtime library.
+@item branch_cost
+Target supports @option{-branch-cost=N}.
@item cxa_atexit
Target uses @code{__cxa_atexit}.
the @ref{arm_vfp3_ok,,arm_vfp3_ok effective target keyword}.
@item arm_v8_1a_neon
-Add options for ARMv8.1 with Adv.SIMD support, if this is supported
+Add options for ARMv8.1-A with Adv.SIMD support, if this is supported
by the target; see the @ref{arm_v8_1a_neon_ok,,arm_v8_1a_neon_ok}
effective target keyword.
@item arm_v8_2a_fp16_scalar
-Add options for ARMv8.2 with scalar FP16 support, if this is
+Add options for ARMv8.2-A with scalar FP16 support, if this is
supported by the target; see the
@ref{arm_v8_2a_fp16_scalar_ok,,arm_v8_2a_fp16_scalar_ok} effective
target keyword.
@item arm_v8_2a_fp16_neon
-Add options for ARMv8.2 with Adv.SIMD FP16 support, if this is
+Add options for ARMv8.2-A with Adv.SIMD FP16 support, if this is
supported by the target; see the
@ref{arm_v8_2a_fp16_neon_ok,,arm_v8_2a_fp16_neon_ok} effective target
keyword.
@item arm_v8_2a_dotprod_neon
-Add options for ARMv8.2 with Adv.SIMD Dot Product support, if this is
+Add options for ARMv8.2-A with Adv.SIMD Dot Product support, if this is
supported by the target; see the
@ref{arm_v8_2a_dotprod_neon_ok} effective target keyword.
+@item arm_fp16fml_neon
+Add options to enable generation of the @code{VFMAL} and @code{VFMSL}
+instructions, if this is supported by the target; see the
+@ref{arm_fp16fml_neon_ok} effective target keyword.
+
@item bind_pic_locally
Add the target-specific flags needed to enable functions to bind
locally when using pic/PIC passes in the testsuite.
@subsubsection Scan optimization dump files
-These commands are available for @var{kind} of @code{tree}, @code{rtl},
-and @code{ipa}.
+These commands are available for @var{kind} of @code{tree}, @code{ltrans-tree},
+@code{rtl}, @code{ipa}, and @code{wpa-ipa}.
@table @code
@item scan-@var{kind}-dump @var{regex} @var{suffix} [@{ target/xfail @var{selector} @}]
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