-@c Copyright (C) 1988-2016 Free Software Foundation, Inc.
+@c Copyright (C) 1988-2017 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
Do not define this macro if it would never modify @var{m}.
@end defmac
+@hook TARGET_C_EXCESS_PRECISION
+
@hook TARGET_PROMOTE_FUNCTION_MODE
@defmac PARM_BOUNDARY
by the @code{__attribute__ ((aligned (@var{n})))} construct.
@end defmac
-@defmac ADJUST_FIELD_ALIGN (@var{field}, @var{computed})
-An expression for the alignment of a structure field @var{field} if the
-alignment computed in the usual way (including applying of
-@code{BIGGEST_ALIGNMENT} and @code{BIGGEST_FIELD_ALIGNMENT} to the
+@defmac ADJUST_FIELD_ALIGN (@var{field}, @var{type}, @var{computed})
+An expression for the alignment of a structure field @var{field} of
+type @var{type} if the alignment computed in the usual way (including
+applying of @code{BIGGEST_ALIGNMENT} and @code{BIGGEST_FIELD_ALIGNMENT} to the
alignment) is @var{computed}. It overrides alignment only if the
field alignment has not been set by the
-@code{__attribute__ ((aligned (@var{n})))} construct.
+@code{__attribute__ ((aligned (@var{n})))} construct. Note that @var{field}
+may be @code{NULL_TREE} in case we just query for the minimum alignment
+of a field of type @var{type} in structure context.
@end defmac
@defmac MAX_STACK_ALIGNMENT
the libgcc @file{config.host}.
@end defmac
-@defmac TARGET_FLT_EVAL_METHOD
-A C expression for the value for @code{FLT_EVAL_METHOD} in @file{float.h},
-assuming, if applicable, that the floating-point control word is in its
-default state. If you do not define this macro the value of
-@code{FLT_EVAL_METHOD} will be zero.
-@end defmac
-
@defmac WIDEST_HARDWARE_FP_SIZE
A C expression for the size in bits of the widest floating-point format
supported by the hardware. If you define this macro, you must specify a
immediate values into general-purpose registers, but does not have an
instruction for loading an immediate value into a floating-point
register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when
-@var{x} is a floating-point constant. If the constant can't be loaded
+@var{x} is a floating-point constant. If the constant cannot be loaded
into any kind of register, code generation will be better if
@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
of using @code{TARGET_PREFERRED_RELOAD_CLASS}.
ordinarily be used.
Unlike @code{PREFERRED_RELOAD_CLASS}, this macro should be used when
-there are certain modes that simply can't go in certain reload classes.
+there are certain modes that simply cannot go in certain reload classes.
The value is a register class; perhaps @var{class}, or perhaps another,
smaller class.
@hook TARGET_SPILL_CLASS
+@hook TARGET_ADDITIONAL_ALLOCNO_CLASS_P
+
@hook TARGET_CSTORE_MODE
+@hook TARGET_COMPUTE_PRESSURE_CLASSES
+
@node Stack and Calling
@section Stack Layout and Calling Conventions
@cindex calling conventions
registers @code{df_regs_ever_live_p} and @code{call_used_regs}.
@end defmac
+@hook TARGET_COMPUTE_FRAME_LAYOUT
+
@node Stack Arguments
@subsection Passing Function Arguments on the Stack
@cindex arguments on stack
@hook TARGET_STACK_PROTECT_FAIL
+@hook TARGET_STACK_PROTECT_RUNTIME_ENABLED_P
+
@hook TARGET_SUPPORTS_SPLIT_STACK
@node Miscellaneous Register Hooks
scheme, by means of compiler command line switches.
@end defmac
-@hook TARGET_PRINTF_POINTER_FORMAT
-
@node Addressing Modes
@section Addressing Modes
@cindex addressing modes
@hook TARGET_SIMD_CLONE_USABLE
+@hook TARGET_SIMT_VF
+
@hook TARGET_GOACC_VALIDATE_DIMS
@hook TARGET_GOACC_DIM_LIMIT
Define this macro to be the value 1 if memory accesses described by the
@var{mode} and @var{alignment} parameters have a cost many times greater
than aligned accesses, for example if they are emulated in a trap
-handler.
+handler. This macro is invoked only for unaligned accesses, i.e. when
+@code{@var{alignment} < GET_MODE_ALIGNMENT (@var{mode})}.
When this macro is nonzero, the compiler will act as if
@code{STRICT_ALIGNMENT} were nonzero when generating code for block
@hook TARGET_MAX_NOCE_IFCVT_SEQ_COST
+@hook TARGET_NOCE_CONVERSION_PROFITABLE_P
+
@hook TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P
@node Scheduling
@hook TARGET_SCHED_SET_SCHED_FLAGS
+@hook TARGET_SCHED_CAN_SPECULATE_INSN
+
@hook TARGET_SCHED_SMS_RES_MII
@hook TARGET_SCHED_DISPATCH
the FPSCR PR bit has to be cleared, while for a double precision
operation, this bit has to be set. Changing the PR bit requires a general
purpose register as a scratch register, hence these FPSCR sets have to
-be inserted before reload, i.e.@: you can't put this into instruction emitting
+be inserted before reload, i.e.@: you cannot put this into instruction emitting
or @code{TARGET_MACHINE_DEPENDENT_REORG}.
You can have multiple entities that are mode-switched, and select at run time
Most RISC machines have this property and most CISC machines do not.
@end defmac
+@hook TARGET_MIN_ARITHMETIC_PRECISION
+
@defmac LOAD_EXTEND_OP (@var{mem_mode})
Define this macro to be a C expression indicating when insns that read
memory in @var{mem_mode}, an integral mode narrower than a word, set the
maintainer is familiar with.
@end defmac
+
+@hook TARGET_RUN_TARGET_SELFTESTS
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