-@c Copyright (C) 1988-2015 Free Software Foundation, Inc.
+@c Copyright (C) 1988-2017 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
By default this is @code{%G %L %G}.
@end defmac
+@defmac POST_LINK_SPEC
+Define this macro to add additional steps to be executed after linker.
+The default value of this macro is empty string.
+@end defmac
+
@defmac LINK_COMMAND_SPEC
A C string constant giving the complete command line need to execute the
linker. When you do this, you will need to update your port each time a
Do not define this macro if it would never modify @var{m}.
@end defmac
+@hook TARGET_C_EXCESS_PRECISION
+
@hook TARGET_PROMOTE_FUNCTION_MODE
@defmac PARM_BOUNDARY
by the @code{__attribute__ ((aligned (@var{n})))} construct.
@end defmac
-@defmac ADJUST_FIELD_ALIGN (@var{field}, @var{computed})
-An expression for the alignment of a structure field @var{field} if the
-alignment computed in the usual way (including applying of
-@code{BIGGEST_ALIGNMENT} and @code{BIGGEST_FIELD_ALIGNMENT} to the
+@defmac ADJUST_FIELD_ALIGN (@var{field}, @var{type}, @var{computed})
+An expression for the alignment of a structure field @var{field} of
+type @var{type} if the alignment computed in the usual way (including
+applying of @code{BIGGEST_ALIGNMENT} and @code{BIGGEST_FIELD_ALIGNMENT} to the
alignment) is @var{computed}. It overrides alignment only if the
field alignment has not been set by the
-@code{__attribute__ ((aligned (@var{n})))} construct.
+@code{__attribute__ ((aligned (@var{n})))} construct. Note that @var{field}
+may be @code{NULL_TREE} in case we just query for the minimum alignment
+of a field of type @var{type} in structure context.
@end defmac
@defmac MAX_STACK_ALIGNMENT
the libgcc @file{config.host}.
@end defmac
-@defmac TARGET_FLT_EVAL_METHOD
-A C expression for the value for @code{FLT_EVAL_METHOD} in @file{float.h},
-assuming, if applicable, that the floating-point control word is in its
-default state. If you do not define this macro the value of
-@code{FLT_EVAL_METHOD} will be zero.
-@end defmac
-
@defmac WIDEST_HARDWARE_FP_SIZE
A C expression for the size in bits of the widest floating-point format
supported by the hardware. If you define this macro, you must specify a
immediate values into general-purpose registers, but does not have an
instruction for loading an immediate value into a floating-point
register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when
-@var{x} is a floating-point constant. If the constant can't be loaded
+@var{x} is a floating-point constant. If the constant cannot be loaded
into any kind of register, code generation will be better if
@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
of using @code{TARGET_PREFERRED_RELOAD_CLASS}.
ordinarily be used.
Unlike @code{PREFERRED_RELOAD_CLASS}, this macro should be used when
-there are certain modes that simply can't go in certain reload classes.
+there are certain modes that simply cannot go in certain reload classes.
The value is a register class; perhaps @var{class}, or perhaps another,
smaller class.
If defined, a C expression that returns nonzero for a @var{class} for which
a change from mode @var{from} to mode @var{to} is invalid.
-For the example, loading 32-bit integer or floating-point objects into
-floating-point registers on the Alpha extends them to 64 bits.
+For example, loading 32-bit integer or floating-point objects into
+floating-point registers on Alpha extends them to 64 bits.
Therefore loading a 64-bit object and then storing it as a 32-bit object
does not store the low-order 32 bits, as would be the case for a normal
register. Therefore, @file{alpha.h} defines @code{CANNOT_CHANGE_MODE_CLASS}
(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
? reg_classes_intersect_p (FLOAT_REGS, (CLASS)) : 0)
@end smallexample
+
+Even if storing from a register in mode @var{to} would be valid,
+if both @var{from} and @code{raw_reg_mode} for @var{class} are wider
+than @code{word_mode}, then we must prevent @var{to} narrowing the
+mode. This happens when the middle-end assumes that it can load
+or store pieces of an @var{N}-word pseudo, and that the pseudo will
+eventually be allocated to @var{N} @code{word_mode} hard registers.
+Failure to prevent this kind of mode change will result in the
+entire @code{raw_reg_mode} being modified instead of the partial
+value that the middle-end intended.
+
@end defmac
@hook TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
@hook TARGET_SPILL_CLASS
+@hook TARGET_ADDITIONAL_ALLOCNO_CLASS_P
+
@hook TARGET_CSTORE_MODE
+@hook TARGET_COMPUTE_PRESSURE_CLASSES
+
@node Stack and Calling
@section Stack Layout and Calling Conventions
@cindex calling conventions
* Function Entry::
* Profiling::
* Tail Calls::
+* Shrink-wrapping separate components::
* Stack Smashing Protection::
* Miscellaneous Register Hooks::
@end menu
@hook TARGET_FRAME_POINTER_REQUIRED
-@findex get_frame_size
-@defmac INITIAL_FRAME_POINTER_OFFSET (@var{depth-var})
-A C statement to store in the variable @var{depth-var} the difference
-between the frame pointer and the stack pointer values immediately after
-the function prologue. The value would be computed from information
-such as the result of @code{get_frame_size ()} and the tables of
-registers @code{regs_ever_live} and @code{call_used_regs}.
-
-If @code{ELIMINABLE_REGS} is defined, this macro will be not be used and
-need not be defined. Otherwise, it must be defined even if
-@code{TARGET_FRAME_POINTER_REQUIRED} always returns true; in that
-case, you may set @var{depth-var} to anything.
-@end defmac
-
@defmac ELIMINABLE_REGS
-If defined, this macro specifies a table of register pairs used to
-eliminate unneeded registers that point into the stack frame. If it is not
-defined, the only elimination attempted by the compiler is to replace
-references to the frame pointer with references to the stack pointer.
+This macro specifies a table of register pairs used to eliminate
+unneeded registers that point into the stack frame.
The definition of this macro is a list of structure initializations, each
of which specifies an original and replacement register.
@hook TARGET_CAN_ELIMINATE
@defmac INITIAL_ELIMINATION_OFFSET (@var{from-reg}, @var{to-reg}, @var{offset-var})
-This macro is similar to @code{INITIAL_FRAME_POINTER_OFFSET}. It
-specifies the initial difference between the specified pair of
-registers. This macro must be defined if @code{ELIMINABLE_REGS} is
-defined.
+This macro returns the initial difference between the specified pair
+of registers. The value would be computed from information
+such as the result of @code{get_frame_size ()} and the tables of
+registers @code{df_regs_ever_live_p} and @code{call_used_regs}.
@end defmac
+@hook TARGET_COMPUTE_FRAME_LAYOUT
+
@node Stack Arguments
@subsection Passing Function Arguments on the Stack
@cindex arguments on stack
@hook TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P
+@hook TARGET_FLOATN_MODE
+
@hook TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P
@node Scalar Return
@hook TARGET_WARN_FUNC_RETURN
+@node Shrink-wrapping separate components
+@subsection Shrink-wrapping separate components
+@cindex shrink-wrapping separate components
+
+The prologue may perform a variety of target dependent tasks such as
+saving callee-saved registers, saving the return address, aligning the
+stack, creating a stack frame, initializing the PIC register, setting
+up the static chain, etc.
+
+On some targets some of these tasks may be independent of others and
+thus may be shrink-wrapped separately. These independent tasks are
+referred to as components and are handled generically by the target
+independent parts of GCC.
+
+Using the following hooks those prologue or epilogue components can be
+shrink-wrapped separately, so that the initialization (and possibly
+teardown) those components do is not done as frequently on execution
+paths where this would unnecessary.
+
+What exactly those components are is up to the target code; the generic
+code treats them abstractly, as a bit in an @code{sbitmap}. These
+@code{sbitmap}s are allocated by the @code{shrink_wrap.get_separate_components}
+and @code{shrink_wrap.components_for_bb} hooks, and deallocated by the
+generic code.
+
+@hook TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS
+
+@hook TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB
+
+@hook TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS
+
+@hook TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS
+
+@hook TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS
+
+@hook TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS
+
@node Stack Smashing Protection
@subsection Stack smashing protection
@cindex stack smashing protection
@hook TARGET_STACK_PROTECT_FAIL
+@hook TARGET_STACK_PROTECT_RUNTIME_ENABLED_P
+
@hook TARGET_SUPPORTS_SPLIT_STACK
@node Miscellaneous Register Hooks
@hook TARGET_TRAMPOLINE_ADJUST_ADDRESS
+@hook TARGET_CUSTOM_FUNCTION_DESCRIPTORS
+
Implementing trampolines is difficult on many machines because they have
separate instruction and data caches. Writing into a stack location
fails to clear the memory in the instruction cache, so when the program
@hook TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION
+@hook TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION
+
@hook TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
@hook TARGET_VECTORIZE_PREFERRED_SIMD_MODE
@hook TARGET_VECTORIZE_DESTROY_COST_DATA
-@hook TARGET_VECTORIZE_BUILTIN_TM_LOAD
-
-@hook TARGET_VECTORIZE_BUILTIN_TM_STORE
-
@hook TARGET_VECTORIZE_BUILTIN_GATHER
@hook TARGET_VECTORIZE_BUILTIN_SCATTER
@hook TARGET_SIMD_CLONE_USABLE
+@hook TARGET_SIMT_VF
+
@hook TARGET_GOACC_VALIDATE_DIMS
+@hook TARGET_GOACC_DIM_LIMIT
+
+@hook TARGET_GOACC_FORK_JOIN
+
+@hook TARGET_GOACC_REDUCTION
+
@node Anchored Addresses
@section Anchored Addresses
@cindex anchored addresses
@smallexample
(define_insn ""
- [(set (reg:CC_NOOV 0)
- (compare:CC_NOOV
+ [(set (reg:CCNZ 0)
+ (compare:CCNZ
(plus:SI (match_operand:SI 0 "register_operand" "%r")
(match_operand:SI 1 "arith_operand" "rI"))
(const_int 0)))]
@end smallexample
@noindent
-together with a @code{SELECT_CC_MODE} that returns @code{CC_NOOVmode}
+together with a @code{SELECT_CC_MODE} that returns @code{CCNZmode}
for comparisons whose argument is a @code{plus}:
@smallexample
? CCFPEmode : CCFPmode) \
: ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \
|| GET_CODE (X) == NEG || GET_CODE (x) == ASHIFT) \
- ? CC_NOOVmode : CCmode))
+ ? CCNZmode : CCmode))
@end smallexample
Another reason to use modes is to retain information on which operands
Define this macro to be the value 1 if memory accesses described by the
@var{mode} and @var{alignment} parameters have a cost many times greater
than aligned accesses, for example if they are emulated in a trap
-handler.
+handler. This macro is invoked only for unaligned accesses, i.e. when
+@code{@var{alignment} < GET_MODE_ALIGNMENT (@var{mode})}.
When this macro is nonzero, the compiler will act as if
@code{STRICT_ALIGNMENT} were nonzero when generating code for block
@hook TARGET_USE_BY_PIECES_INFRASTRUCTURE_P
+@hook TARGET_COMPARE_BY_PIECES_BRANCH_RATIO
+
@defmac MOVE_MAX_PIECES
A C expression used by @code{move_by_pieces} to determine the largest unit
a load or store used to copy memory is. Defaults to @code{MOVE_MAX}.
@end defmac
+@defmac STORE_MAX_PIECES
+A C expression used by @code{store_by_pieces} to determine the largest unit
+a store used to memory is. Defaults to @code{MOVE_MAX_PIECES}, or two times
+the size of @code{HOST_WIDE_INT}, whichever is smaller.
+@end defmac
+
+@defmac COMPARE_MAX_PIECES
+A C expression used by @code{compare_by_pieces} to determine the largest unit
+a load or store used to compare memory is. Defaults to
+@code{MOVE_MAX_PIECES}.
+@end defmac
+
@defmac CLEAR_RATIO (@var{speed})
The threshold of number of scalar move insns, @emph{below} which a sequence
of insns should be generated to clear memory instead of a string clear insn
@code{BRANCH_COST} is greater than or equal to the value 2.
@end defmac
+@hook TARGET_OPTAB_SUPPORTED_P
+
@hook TARGET_RTX_COSTS
@hook TARGET_ADDRESS_COST
+@hook TARGET_MAX_NOCE_IFCVT_SEQ_COST
+
+@hook TARGET_NOCE_CONVERSION_PROFITABLE_P
+
@hook TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P
@node Scheduling
@hook TARGET_SCHED_SET_SCHED_FLAGS
+@hook TARGET_SCHED_CAN_SPECULATE_INSN
+
@hook TARGET_SCHED_SMS_RES_MII
@hook TARGET_SCHED_DISPATCH
@hook TARGET_SCHED_FUSION_PRIORITY
+@hook TARGET_EXPAND_DIVMOD_LIBFUNC
+
@node Sections
@section Dividing the Output into Sections (Texts, Data, @dots{})
@c the above section title is WAY too long. maybe cut the part between
both this macro and @code{FINI_SECTION_ASM_OP}.
@end defmac
+@defmac MACH_DEP_SECTION_ASM_FLAG
+If defined, a C expression whose value is a character constant
+containing the flag used to mark a machine-dependent section. This
+corresponds to the @code{SECTION_MACH_DEP} section flag.
+@end defmac
+
@defmac CRT_CALL_STATIC_FUNCTION (@var{section_op}, @var{function})
If defined, an ASM statement that switches to a different section
via @var{section_op}, calls @var{function}, and switches back to
@hook TARGET_ASM_NAMED_SECTION
+@hook TARGET_ASM_ELF_FLAGS_NUMERIC
+
@hook TARGET_ASM_FUNCTION_SECTION
@hook TARGET_ASM_FUNCTION_SWITCHED_TEXT_SECTIONS
Here are macros for SDB and DWARF output.
@defmac SDB_DEBUGGING_INFO
-Define this macro if GCC should produce COFF-style debugging output
+Define this macro to 1 if GCC should produce COFF-style debugging output
for SDB in response to the @option{-g} option.
@end defmac
@hook TARGET_WANT_DEBUG_PUB_SECTIONS
-@hook TARGET_FORCE_AT_COMP_DIR
-
@hook TARGET_DELAY_SCHED2
@hook TARGET_DELAY_VARTRACK
slots on IA64 VMS, using an integer of the given size.
@end defmac
-@defmac ASM_OUTPUT_DWARF_OFFSET (@var{stream}, @var{size}, @var{label}, @var{section})
+@defmac ASM_OUTPUT_DWARF_OFFSET (@var{stream}, @var{size}, @var{label}, @var{offset}, @var{section})
A C statement to issue assembly directives that create a
-section-relative reference to the given @var{label}, using an integer of the
-given @var{size}. The label is known to be defined in the given @var{section}.
+section-relative reference to the given @var{label} plus @var{offset}, using
+an integer of the given @var{size}. The label is known to be defined in the
+given @var{section}.
@end defmac
@defmac ASM_OUTPUT_DWARF_PCREL (@var{stream}, @var{size}, @var{label})
the FPSCR PR bit has to be cleared, while for a double precision
operation, this bit has to be set. Changing the PR bit requires a general
purpose register as a scratch register, hence these FPSCR sets have to
-be inserted before reload, i.e.@: you can't put this into instruction emitting
+be inserted before reload, i.e.@: you cannot put this into instruction emitting
or @code{TARGET_MACHINE_DEPENDENT_REORG}.
You can have multiple entities that are mode-switched, and select at run time
@hook TARGET_ADDR_SPACE_SUBSET_P
+@hook TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID
+
@hook TARGET_ADDR_SPACE_CONVERT
+@hook TARGET_ADDR_SPACE_DEBUG
+
+@hook TARGET_ADDR_SPACE_DIAGNOSE_USAGE
+
@node Misc
@section Miscellaneous Parameters
@cindex parameters, miscellaneous
Most RISC machines have this property and most CISC machines do not.
@end defmac
+@hook TARGET_MIN_ARITHMETIC_PRECISION
+
@defmac LOAD_EXTEND_OP (@var{mem_mode})
Define this macro to be a C expression indicating when insns that read
memory in @var{mem_mode}, an integral mode narrower than a word, set the
@hook TARGET_INVALID_BINARY_OP
-@hook TARGET_INVALID_PARAMETER_TYPE
-
-@hook TARGET_INVALID_RETURN_TYPE
-
@hook TARGET_PROMOTED_TYPE
@hook TARGET_CONVERT_TO_TYPE
-@defmac TARGET_USE_JCR_SECTION
-This macro determines whether to use the JCR section to register Java
-classes. By default, TARGET_USE_JCR_SECTION is defined to 1 if both
-SUPPORTS_WEAK and TARGET_HAVE_NAMED_SECTIONS are true, else 0.
-@end defmac
-
@defmac OBJC_JBLEN
This macro determines the size of the objective C jump buffer for the
NeXT runtime. By default, OBJC_JBLEN is defined to an innocuous value.
maintainer is familiar with.
@end defmac
+
+@hook TARGET_RUN_TARGET_SELFTESTS
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