#include "tm.h"
#include "diagnostic-core.h"
#include "rtl.h"
-#include "hash-set.h"
-#include "machmode.h"
-#include "vec.h"
-#include "double-int.h"
-#include "input.h"
#include "alias.h"
#include "symtab.h"
-#include "wide-int.h"
-#include "inchash.h"
-#include "real.h"
#include "tree.h"
#include "fold-const.h"
#include "varasm.h"
#include "tm_p.h"
#include "flags.h"
#include "stringpool.h"
-#include "hashtab.h"
-#include "statistics.h"
-#include "fixed-value.h"
#include "insn-config.h"
#include "expmed.h"
#include "dojump.h"
rtx simple_return_rtx;
rtx cc0_rtx;
+/* Marker used for denoting an INSN, which should never be accessed (i.e.,
+ this pointer should normally never be dereferenced), but is required to be
+ distinct from NULL_RTX. Currently used by peephole2 pass. */
+rtx_insn *invalid_insn_rtx;
+
/* A hash table storing CONST_INTs whose absolute value is greater
than MAX_SAVED_CONST_INT. */
-struct const_int_hasher : ggc_cache_hasher<rtx>
+struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
{
typedef HOST_WIDE_INT compare_type;
static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
-struct const_wide_int_hasher : ggc_cache_hasher<rtx>
+struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
{
static hashval_t hash (rtx x);
static bool equal (rtx x, rtx y);
static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
/* A hash table storing register attribute structures. */
-struct reg_attr_hasher : ggc_cache_hasher<reg_attrs *>
+struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
{
static hashval_t hash (reg_attrs *x);
static bool equal (reg_attrs *a, reg_attrs *b);
static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
/* A hash table storing all CONST_DOUBLEs. */
-struct const_double_hasher : ggc_cache_hasher<rtx>
+struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
{
static hashval_t hash (rtx x);
static bool equal (rtx x, rtx y);
static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
/* A hash table storing all CONST_FIXEDs. */
-struct const_fixed_hasher : ggc_cache_hasher<rtx>
+struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
{
static hashval_t hash (rtx x);
static bool equal (rtx x, rtx y);
#endif
+/* Set the mode and register number of X to MODE and REGNO. */
+
+void
+set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
+{
+ unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
+ ? hard_regno_nregs[regno][mode]
+ : 1);
+ PUT_MODE_RAW (x, mode);
+ set_regno_raw (x, regno, nregs);
+}
+
/* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
don't attempt to share with the various global pieces of rtl (such as
frame_pointer_rtx). */
rtx
-gen_raw_REG (machine_mode mode, int regno)
+gen_raw_REG (machine_mode mode, unsigned int regno)
{
- rtx x = gen_rtx_raw_REG (mode, regno);
+ rtx x = rtx_alloc_stat (REG MEM_STAT_INFO);
+ set_mode_and_regno (x, mode, regno);
+ REG_ATTRS (x) = NULL;
ORIGINAL_REGNO (x) = regno;
return x;
}
&& regno == HARD_FRAME_POINTER_REGNUM
&& (!reload_completed || frame_pointer_needed))
return hard_frame_pointer_rtx;
-#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
- if (regno == ARG_POINTER_REGNUM)
+#if !HARD_FRAME_POINTER_IS_ARG_POINTER
+ if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
+ && regno == ARG_POINTER_REGNUM)
return arg_pointer_rtx;
#endif
#ifdef RETURN_ADDRESS_POINTER_REGNUM
returns TRIAL. If the insn to be returned can be split, it will be. */
rtx_insn *
-try_split (rtx pat, rtx uncast_trial, int last)
+try_split (rtx pat, rtx_insn *trial, int last)
{
- rtx_insn *trial = as_a <rtx_insn *> (uncast_trial);
rtx_insn *before = PREV_INSN (trial);
rtx_insn *after = NEXT_INSN (trial);
rtx note;
int probability;
rtx_insn *insn_last, *insn;
int njumps = 0;
- rtx call_insn = NULL_RTX;
+ rtx_insn *call_insn = NULL;
/* We're not good at redistributing frame information. */
if (RTX_FRAME_RELATED_P (trial))
split_branch_probability = XINT (note, 0);
probability = split_branch_probability;
- seq = safe_as_a <rtx_insn *> (split_insns (pat, trial));
+ seq = split_insns (pat, trial);
split_branch_probability = -1;
/* Make an instruction with body X and code JUMP_INSN
and output it before the instruction BEFORE. */
-rtx_insn *
+rtx_jump_insn *
emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
{
- return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
- make_jump_insn_raw);
+ return as_a <rtx_jump_insn *> (
+ emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
+ make_jump_insn_raw));
}
/* Make an instruction with body X and code CALL_INSN
/* Emit the label LABEL before the insn BEFORE. */
-rtx_insn *
+rtx_code_label *
emit_label_before (rtx label, rtx_insn *before)
{
gcc_checking_assert (INSN_UID (label) == 0);
INSN_UID (label) = cur_insn_uid++;
add_insn_before (label, before, NULL);
- return as_a <rtx_insn *> (label);
+ return as_a <rtx_code_label *> (label);
}
\f
/* Helper for emit_insn_after, handles lists of instructions
/* Make an insn of code JUMP_INSN with body X
and output it after the insn AFTER. */
-rtx_insn *
+rtx_jump_insn *
emit_jump_insn_after_noloc (rtx x, rtx after)
{
- return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
+ return as_a <rtx_jump_insn *> (
+ emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
}
/* Make an instruction with body X and code CALL_INSN
rtx_insn *(*make_raw) (rtx))
{
rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
- rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
+ rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
if (pattern == NULL_RTX || !loc)
- return safe_as_a <rtx_insn *> (last);
+ return last;
after = NEXT_INSN (after);
while (1)
break;
after = NEXT_INSN (after);
}
- return safe_as_a <rtx_insn *> (last);
+ return last;
}
/* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
}
/* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
-rtx_insn *
+rtx_jump_insn *
emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
{
- return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
+ return as_a <rtx_jump_insn *> (
+ emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
}
/* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
-rtx_insn *
+rtx_jump_insn *
emit_jump_insn_after (rtx pattern, rtx after)
{
- return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
+ return as_a <rtx_jump_insn *> (
+ emit_pattern_after (pattern, after, true, make_jump_insn_raw));
}
/* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
}
/* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
-rtx_insn *
+rtx_jump_insn *
emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
{
- return emit_pattern_before_setloc (pattern, before, loc, false,
- make_jump_insn_raw);
+ return as_a <rtx_jump_insn *> (
+ emit_pattern_before_setloc (pattern, before, loc, false,
+ make_jump_insn_raw));
}
/* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
-rtx_insn *
+rtx_jump_insn *
emit_jump_insn_before (rtx pattern, rtx before)
{
- return emit_pattern_before (pattern, before, true, false,
- make_jump_insn_raw);
+ return as_a <rtx_jump_insn *> (
+ emit_pattern_before (pattern, before, true, false,
+ make_jump_insn_raw));
}
/* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
/* Add the label LABEL to the end of the doubly-linked list. */
-rtx_insn *
-emit_label (rtx label)
+rtx_code_label *
+emit_label (rtx uncast_label)
{
+ rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
+
gcc_checking_assert (INSN_UID (label) == 0);
INSN_UID (label) = cur_insn_uid++;
- add_insn (as_a <rtx_insn *> (label));
- return as_a <rtx_insn *> (label);
+ add_insn (label);
+ return label;
}
/* Make an insn of code JUMP_TABLE_DATA
return NULL_RTX;
}
\f
-/* Return an indication of which type of insn should have X as a body.
- The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
-
-static enum rtx_code
-classify_insn (rtx x)
-{
- if (LABEL_P (x))
- return CODE_LABEL;
- if (GET_CODE (x) == CALL)
- return CALL_INSN;
- if (ANY_RETURN_P (x))
- return JUMP_INSN;
- if (GET_CODE (x) == SET)
- {
- if (SET_DEST (x) == pc_rtx)
- return JUMP_INSN;
- else if (GET_CODE (SET_SRC (x)) == CALL)
- return CALL_INSN;
- else
- return INSN;
- }
- if (GET_CODE (x) == PARALLEL)
- {
- int j;
- for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
- if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
- return CALL_INSN;
- else if (GET_CODE (XVECEXP (x, 0, j)) == SET
- && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
- return JUMP_INSN;
- else if (GET_CODE (XVECEXP (x, 0, j)) == SET
- && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
- return CALL_INSN;
- }
- return INSN;
-}
+/* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
+ following barrier if the instruction needs one and if ALLOW_BARRIER_P
+ is true.
-/* Emit the rtl pattern X as an appropriate kind of insn.
If X is a label, it is simply added into the insn chain. */
rtx_insn *
-emit (rtx x)
+emit (rtx x, bool allow_barrier_p)
{
enum rtx_code code = classify_insn (x);
case JUMP_INSN:
{
rtx_insn *insn = emit_jump_insn (x);
- if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
+ if (allow_barrier_p
+ && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
return emit_barrier ();
return insn;
}
ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
+ invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
+ /*prev_insn=*/NULL,
+ /*next_insn=*/NULL,
+ /*bb=*/NULL,
+ /*pattern=*/NULL_RTX,
+ /*location=*/-1,
+ CODE_FOR_nothing,
+ /*reg_notes=*/NULL_RTX);
}
\f
/* Produce exact duplicate of insn INSN after AFTER.
bool
need_atomic_barrier_p (enum memmodel model, bool pre)
{
- switch (model & MEMMODEL_MASK)
+ switch (model & MEMMODEL_BASE_MASK)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
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