/* Expand the basic unary and binary arithmetic operations, for GNU compiler.
- Copyright (C) 1987-2014 Free Software Foundation, Inc.
+ Copyright (C) 1987-2016 Free Software Foundation, Inc.
This file is part of GCC.
#include "config.h"
#include "system.h"
#include "coretypes.h"
-#include "tm.h"
+#include "backend.h"
+#include "target.h"
+#include "rtl.h"
+#include "tree.h"
+#include "predict.h"
+#include "tm_p.h"
+#include "expmed.h"
+#include "optabs.h"
+#include "emit-rtl.h"
+#include "recog.h"
#include "diagnostic-core.h"
/* Include insn-config.h before expr.h so that HAVE_conditional_move
is properly defined. */
-#include "insn-config.h"
-#include "rtl.h"
-#include "tree.h"
#include "stor-layout.h"
-#include "stringpool.h"
-#include "varasm.h"
-#include "tm_p.h"
-#include "flags.h"
-#include "function.h"
#include "except.h"
+#include "dojump.h"
+#include "explow.h"
#include "expr.h"
-#include "optabs.h"
+#include "optabs-tree.h"
#include "libfuncs.h"
-#include "recog.h"
-#include "reload.h"
-#include "ggc.h"
-#include "basic-block.h"
-#include "target.h"
-
-struct target_optabs default_target_optabs;
-struct target_libfuncs default_target_libfuncs;
-struct target_optabs *this_fn_optabs = &default_target_optabs;
-#if SWITCHABLE_TARGET
-struct target_optabs *this_target_optabs = &default_target_optabs;
-struct target_libfuncs *this_target_libfuncs = &default_target_libfuncs;
-#endif
-
-#define libfunc_hash \
- (this_target_libfuncs->x_libfunc_hash)
static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *,
- enum machine_mode *);
-static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
+ machine_mode *);
+static rtx expand_unop_direct (machine_mode, optab, rtx, rtx, int);
static void emit_libcall_block_1 (rtx_insn *, rtx, rtx, rtx, bool);
/* Debug facility for use in GDB. */
void debug_optab_libfuncs (void);
-
-/* Prefixes for the current version of decimal floating point (BID vs. DPD) */
-#if ENABLE_DECIMAL_BID_FORMAT
-#define DECIMAL_PREFIX "bid_"
-#else
-#define DECIMAL_PREFIX "dpd_"
-#endif
-\f
-/* Used for libfunc_hash. */
-
-static hashval_t
-hash_libfunc (const void *p)
-{
- const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
- return ((e->mode1 + e->mode2 * NUM_MACHINE_MODES) ^ e->op);
-}
-
-/* Used for libfunc_hash. */
-
-static int
-eq_libfunc (const void *p, const void *q)
-{
- const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
- const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
- return e1->op == e2->op && e1->mode1 == e2->mode1 && e1->mode2 == e2->mode2;
-}
-
-/* Return libfunc corresponding operation defined by OPTAB converting
- from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
- if no libfunc is available. */
-rtx
-convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
- enum machine_mode mode2)
-{
- struct libfunc_entry e;
- struct libfunc_entry **slot;
-
- /* ??? This ought to be an assert, but not all of the places
- that we expand optabs know about the optabs that got moved
- to being direct. */
- if (!(optab >= FIRST_CONV_OPTAB && optab <= LAST_CONVLIB_OPTAB))
- return NULL_RTX;
-
- e.op = optab;
- e.mode1 = mode1;
- e.mode2 = mode2;
- slot = (struct libfunc_entry **)
- htab_find_slot (libfunc_hash, &e, NO_INSERT);
- if (!slot)
- {
- const struct convert_optab_libcall_d *d
- = &convlib_def[optab - FIRST_CONV_OPTAB];
-
- if (d->libcall_gen == NULL)
- return NULL;
-
- d->libcall_gen (optab, d->libcall_basename, mode1, mode2);
- slot = (struct libfunc_entry **)
- htab_find_slot (libfunc_hash, &e, NO_INSERT);
- if (!slot)
- return NULL;
- }
- return (*slot)->libfunc;
-}
-
-/* Return libfunc corresponding operation defined by OPTAB in MODE.
- Trigger lazy initialization if needed, return NULL if no libfunc is
- available. */
-rtx
-optab_libfunc (optab optab, enum machine_mode mode)
-{
- struct libfunc_entry e;
- struct libfunc_entry **slot;
-
- /* ??? This ought to be an assert, but not all of the places
- that we expand optabs know about the optabs that got moved
- to being direct. */
- if (!(optab >= FIRST_NORM_OPTAB && optab <= LAST_NORMLIB_OPTAB))
- return NULL_RTX;
-
- e.op = optab;
- e.mode1 = mode;
- e.mode2 = VOIDmode;
- slot = (struct libfunc_entry **)
- htab_find_slot (libfunc_hash, &e, NO_INSERT);
- if (!slot)
- {
- const struct optab_libcall_d *d
- = &normlib_def[optab - FIRST_NORM_OPTAB];
-
- if (d->libcall_gen == NULL)
- return NULL;
-
- d->libcall_gen (optab, d->libcall_basename, d->libcall_suffix, mode);
- slot = (struct libfunc_entry **)
- htab_find_slot (libfunc_hash, &e, NO_INSERT);
- if (!slot)
- return NULL;
- }
- return (*slot)->libfunc;
-}
-
\f
/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
the result of operation CODE applied to OP0 (and OP1 if it is a binary
for a widening operation would be. In most cases this would be OP0, but if
that's a constant it'll be VOIDmode, which isn't useful. */
-static enum machine_mode
-widened_mode (enum machine_mode to_mode, rtx op0, rtx op1)
+static machine_mode
+widened_mode (machine_mode to_mode, rtx op0, rtx op1)
{
- enum machine_mode m0 = GET_MODE (op0);
- enum machine_mode m1 = GET_MODE (op1);
- enum machine_mode result;
+ machine_mode m0 = GET_MODE (op0);
+ machine_mode m1 = GET_MODE (op1);
+ machine_mode result;
if (m0 == VOIDmode && m1 == VOIDmode)
return to_mode;
return result;
}
\f
-/* Like optab_handler, but for widening_operations that have a
- TO_MODE and a FROM_MODE. */
-
-enum insn_code
-widening_optab_handler (optab op, enum machine_mode to_mode,
- enum machine_mode from_mode)
-{
- unsigned scode = (op << 16) | to_mode;
- if (to_mode != from_mode && from_mode != VOIDmode)
- {
- /* ??? Why does find_widening_optab_handler_and_mode attempt to
- widen things that can't be widened? E.g. add_optab... */
- if (op > LAST_CONV_OPTAB)
- return CODE_FOR_nothing;
- scode |= from_mode << 8;
- }
- return raw_optab_handler (scode);
-}
-
-/* Find a widening optab even if it doesn't widen as much as we want.
- E.g. if from_mode is HImode, and to_mode is DImode, and there is no
- direct HI->SI insn, then return SI->DI, if that exists.
- If PERMIT_NON_WIDENING is non-zero then this can be used with
- non-widening optabs also. */
-
-enum insn_code
-find_widening_optab_handler_and_mode (optab op, enum machine_mode to_mode,
- enum machine_mode from_mode,
- int permit_non_widening,
- enum machine_mode *found_mode)
-{
- for (; (permit_non_widening || from_mode != to_mode)
- && GET_MODE_SIZE (from_mode) <= GET_MODE_SIZE (to_mode)
- && from_mode != VOIDmode;
- from_mode = GET_MODE_WIDER_MODE (from_mode))
- {
- enum insn_code handler = widening_optab_handler (op, to_mode,
- from_mode);
-
- if (handler != CODE_FOR_nothing)
- {
- if (found_mode)
- *found_mode = from_mode;
- return handler;
- }
- }
-
- return CODE_FOR_nothing;
-}
-\f
/* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
not actually do a sign-extend or zero-extend, but can leave the
of logical operations, but not right shifts. */
static rtx
-widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
+widen_operand (rtx op, machine_mode mode, machine_mode oldmode,
int unsignedp, int no_extend)
{
rtx result;
return result;
}
\f
-/* Return the optab used for computing the operation given by the tree code,
- CODE and the tree EXP. This function is not always usable (for example, it
- cannot give complete results for multiplication or division) but probably
- ought to be relied on more widely throughout the expander. */
-optab
-optab_for_tree_code (enum tree_code code, const_tree type,
- enum optab_subtype subtype)
-{
- bool trapv;
- switch (code)
- {
- case BIT_AND_EXPR:
- return and_optab;
-
- case BIT_IOR_EXPR:
- return ior_optab;
-
- case BIT_NOT_EXPR:
- return one_cmpl_optab;
-
- case BIT_XOR_EXPR:
- return xor_optab;
-
- case MULT_HIGHPART_EXPR:
- return TYPE_UNSIGNED (type) ? umul_highpart_optab : smul_highpart_optab;
-
- case TRUNC_MOD_EXPR:
- case CEIL_MOD_EXPR:
- case FLOOR_MOD_EXPR:
- case ROUND_MOD_EXPR:
- return TYPE_UNSIGNED (type) ? umod_optab : smod_optab;
-
- case RDIV_EXPR:
- case TRUNC_DIV_EXPR:
- case CEIL_DIV_EXPR:
- case FLOOR_DIV_EXPR:
- case ROUND_DIV_EXPR:
- case EXACT_DIV_EXPR:
- if (TYPE_SATURATING (type))
- return TYPE_UNSIGNED (type) ? usdiv_optab : ssdiv_optab;
- return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
-
- case LSHIFT_EXPR:
- if (TREE_CODE (type) == VECTOR_TYPE)
- {
- if (subtype == optab_vector)
- return TYPE_SATURATING (type) ? unknown_optab : vashl_optab;
-
- gcc_assert (subtype == optab_scalar);
- }
- if (TYPE_SATURATING (type))
- return TYPE_UNSIGNED (type) ? usashl_optab : ssashl_optab;
- return ashl_optab;
-
- case RSHIFT_EXPR:
- if (TREE_CODE (type) == VECTOR_TYPE)
- {
- if (subtype == optab_vector)
- return TYPE_UNSIGNED (type) ? vlshr_optab : vashr_optab;
-
- gcc_assert (subtype == optab_scalar);
- }
- return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
-
- case LROTATE_EXPR:
- if (TREE_CODE (type) == VECTOR_TYPE)
- {
- if (subtype == optab_vector)
- return vrotl_optab;
-
- gcc_assert (subtype == optab_scalar);
- }
- return rotl_optab;
-
- case RROTATE_EXPR:
- if (TREE_CODE (type) == VECTOR_TYPE)
- {
- if (subtype == optab_vector)
- return vrotr_optab;
-
- gcc_assert (subtype == optab_scalar);
- }
- return rotr_optab;
-
- case MAX_EXPR:
- return TYPE_UNSIGNED (type) ? umax_optab : smax_optab;
-
- case MIN_EXPR:
- return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
-
- case REALIGN_LOAD_EXPR:
- return vec_realign_load_optab;
-
- case WIDEN_SUM_EXPR:
- return TYPE_UNSIGNED (type) ? usum_widen_optab : ssum_widen_optab;
-
- case DOT_PROD_EXPR:
- return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
-
- case SAD_EXPR:
- return TYPE_UNSIGNED (type) ? usad_optab : ssad_optab;
-
- case WIDEN_MULT_PLUS_EXPR:
- return (TYPE_UNSIGNED (type)
- ? (TYPE_SATURATING (type)
- ? usmadd_widen_optab : umadd_widen_optab)
- : (TYPE_SATURATING (type)
- ? ssmadd_widen_optab : smadd_widen_optab));
-
- case WIDEN_MULT_MINUS_EXPR:
- return (TYPE_UNSIGNED (type)
- ? (TYPE_SATURATING (type)
- ? usmsub_widen_optab : umsub_widen_optab)
- : (TYPE_SATURATING (type)
- ? ssmsub_widen_optab : smsub_widen_optab));
-
- case FMA_EXPR:
- return fma_optab;
-
- case REDUC_MAX_EXPR:
- return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
-
- case REDUC_MIN_EXPR:
- return TYPE_UNSIGNED (type) ? reduc_umin_optab : reduc_smin_optab;
-
- case REDUC_PLUS_EXPR:
- return TYPE_UNSIGNED (type) ? reduc_uplus_optab : reduc_splus_optab;
-
- case VEC_LSHIFT_EXPR:
- return vec_shl_optab;
-
- case VEC_RSHIFT_EXPR:
- return vec_shr_optab;
-
- case VEC_WIDEN_MULT_HI_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
-
- case VEC_WIDEN_MULT_LO_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
-
- case VEC_WIDEN_MULT_EVEN_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_widen_umult_even_optab : vec_widen_smult_even_optab;
-
- case VEC_WIDEN_MULT_ODD_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_widen_umult_odd_optab : vec_widen_smult_odd_optab;
-
- case VEC_WIDEN_LSHIFT_HI_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_widen_ushiftl_hi_optab : vec_widen_sshiftl_hi_optab;
-
- case VEC_WIDEN_LSHIFT_LO_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_widen_ushiftl_lo_optab : vec_widen_sshiftl_lo_optab;
-
- case VEC_UNPACK_HI_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_unpacku_hi_optab : vec_unpacks_hi_optab;
-
- case VEC_UNPACK_LO_EXPR:
- return TYPE_UNSIGNED (type) ?
- vec_unpacku_lo_optab : vec_unpacks_lo_optab;
-
- case VEC_UNPACK_FLOAT_HI_EXPR:
- /* The signedness is determined from input operand. */
- return TYPE_UNSIGNED (type) ?
- vec_unpacku_float_hi_optab : vec_unpacks_float_hi_optab;
-
- case VEC_UNPACK_FLOAT_LO_EXPR:
- /* The signedness is determined from input operand. */
- return TYPE_UNSIGNED (type) ?
- vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
-
- case VEC_PACK_TRUNC_EXPR:
- return vec_pack_trunc_optab;
-
- case VEC_PACK_SAT_EXPR:
- return TYPE_UNSIGNED (type) ? vec_pack_usat_optab : vec_pack_ssat_optab;
-
- case VEC_PACK_FIX_TRUNC_EXPR:
- /* The signedness is determined from output operand. */
- return TYPE_UNSIGNED (type) ?
- vec_pack_ufix_trunc_optab : vec_pack_sfix_trunc_optab;
-
- default:
- break;
- }
-
- trapv = INTEGRAL_TYPE_P (type) && TYPE_OVERFLOW_TRAPS (type);
- switch (code)
- {
- case POINTER_PLUS_EXPR:
- case PLUS_EXPR:
- if (TYPE_SATURATING (type))
- return TYPE_UNSIGNED (type) ? usadd_optab : ssadd_optab;
- return trapv ? addv_optab : add_optab;
-
- case MINUS_EXPR:
- if (TYPE_SATURATING (type))
- return TYPE_UNSIGNED (type) ? ussub_optab : sssub_optab;
- return trapv ? subv_optab : sub_optab;
-
- case MULT_EXPR:
- if (TYPE_SATURATING (type))
- return TYPE_UNSIGNED (type) ? usmul_optab : ssmul_optab;
- return trapv ? smulv_optab : smul_optab;
-
- case NEGATE_EXPR:
- if (TYPE_SATURATING (type))
- return TYPE_UNSIGNED (type) ? usneg_optab : ssneg_optab;
- return trapv ? negv_optab : neg_optab;
-
- case ABS_EXPR:
- return trapv ? absv_optab : abs_optab;
-
- default:
- return unknown_optab;
- }
-}
-\f
-
/* Expand vector widening operations.
There are two different classes of operations handled here:
{
struct expand_operand eops[4];
tree oprnd0, oprnd1, oprnd2;
- enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
+ machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
optab widen_pattern_optab;
enum insn_code icode;
int nops = TREE_CODE_LENGTH (ops->code);
this may or may not be TARGET. */
rtx
-expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
+expand_ternary_op (machine_mode mode, optab ternary_optab, rtx op0,
rtx op1, rtx op2, rtx target, int unsignedp)
{
struct expand_operand ops[4];
otherwise the same as for expand_binop. */
rtx
-simplify_expand_binop (enum machine_mode mode, optab binoptab,
+simplify_expand_binop (machine_mode mode, optab binoptab,
rtx op0, rtx op1, rtx target, int unsignedp,
enum optab_methods methods)
{
Return true if the expansion succeeded. */
bool
-force_expand_binop (enum machine_mode mode, optab binoptab,
+force_expand_binop (machine_mode mode, optab binoptab,
rtx op0, rtx op1, rtx target, int unsignedp,
enum optab_methods methods)
{
return true;
}
-/* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
-
-rtx
-expand_vec_shift_expr (sepops ops, rtx target)
-{
- struct expand_operand eops[3];
- enum insn_code icode;
- rtx rtx_op1, rtx_op2;
- enum machine_mode mode = TYPE_MODE (ops->type);
- tree vec_oprnd = ops->op0;
- tree shift_oprnd = ops->op1;
- optab shift_optab;
-
- switch (ops->code)
- {
- case VEC_RSHIFT_EXPR:
- shift_optab = vec_shr_optab;
- break;
- case VEC_LSHIFT_EXPR:
- shift_optab = vec_shl_optab;
- break;
- default:
- gcc_unreachable ();
- }
-
- icode = optab_handler (shift_optab, mode);
- gcc_assert (icode != CODE_FOR_nothing);
-
- rtx_op1 = expand_normal (vec_oprnd);
- rtx_op2 = expand_normal (shift_oprnd);
-
- create_output_operand (&eops[0], target, mode);
- create_input_operand (&eops[1], rtx_op1, GET_MODE (rtx_op1));
- create_convert_operand_from_type (&eops[2], rtx_op2, TREE_TYPE (shift_oprnd));
- expand_insn (icode, 3, eops);
-
- return eops[0].value;
-}
-
/* Create a new vector value in VMODE with all elements set to OP. The
mode of OP must be the element mode of VMODE. If OP is a constant,
then the return value will be a constant. */
static rtx
-expand_vector_broadcast (enum machine_mode vmode, rtx op)
+expand_vector_broadcast (machine_mode vmode, rtx op)
{
enum insn_code icode;
rtvec vec;
value are the same as for the parent routine. */
static bool
-expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
+expand_subword_shift (machine_mode op1_mode, optab binoptab,
rtx outof_input, rtx into_input, rtx op1,
rtx outof_target, rtx into_target,
int unsignedp, enum optab_methods methods,
}
-#ifdef HAVE_conditional_move
/* Try implementing expand_doubleword_shift using conditional moves.
The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
arguments are the same as the parent routine. */
static bool
-expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
+expand_doubleword_shift_condmove (machine_mode op1_mode, optab binoptab,
enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
rtx outof_input, rtx into_input,
rtx subword_op1, rtx superword_op1,
return true;
}
-#endif
/* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
Return true if the shift could be successfully synthesized. */
static bool
-expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
+expand_doubleword_shift (machine_mode op1_mode, optab binoptab,
rtx outof_input, rtx into_input, rtx op1,
rtx outof_target, rtx into_target,
int unsignedp, enum optab_methods methods,
unsignedp, methods, shift_mask);
}
-#ifdef HAVE_conditional_move
/* Try using conditional moves to generate straight-line code. */
- {
- rtx_insn *start = get_last_insn ();
- if (expand_doubleword_shift_condmove (op1_mode, binoptab,
- cmp_code, cmp1, cmp2,
- outof_input, into_input,
- op1, superword_op1,
- outof_target, into_target,
- unsignedp, methods, shift_mask))
- return true;
- delete_insns_since (start);
- }
-#endif
+ if (HAVE_conditional_move)
+ {
+ rtx_insn *start = get_last_insn ();
+ if (expand_doubleword_shift_condmove (op1_mode, binoptab,
+ cmp_code, cmp1, cmp2,
+ outof_input, into_input,
+ op1, superword_op1,
+ outof_target, into_target,
+ unsignedp, methods, shift_mask))
+ return true;
+ delete_insns_since (start);
+ }
/* As a last resort, use branches to select the correct alternative. */
rtx_code_label *subword_label = gen_label_rtx ();
unsignedp, methods))
return false;
- emit_jump_insn (gen_jump (done_label));
+ emit_jump_insn (targetm.gen_jump (done_label));
emit_barrier ();
emit_label (subword_label);
the 0 or -1. */
static rtx
-expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
+expand_doubleword_mult (machine_mode mode, rtx op0, rtx op1, rtx target,
bool umulp, enum optab_methods methods)
{
int low = (WORDS_BIG_ENDIAN ? 1 : 0);
the operation to perform, not an optab pointer. All other
arguments are the same. */
rtx
-expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
+expand_simple_binop (machine_mode mode, enum rtx_code code, rtx op0,
rtx op1, rtx target, int unsignedp,
enum optab_methods methods)
{
register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
static rtx
-avoid_expensive_constant (enum machine_mode mode, optab binoptab,
+avoid_expensive_constant (machine_mode mode, optab binoptab,
int opn, rtx x, bool unsignedp)
{
bool speed = optimize_insn_for_speed_p ();
if (mode != VOIDmode
&& optimize
&& CONSTANT_P (x)
- && (rtx_cost (x, optab_to_code (binoptab), opn, speed)
- > set_src_cost (x, speed)))
+ && (rtx_cost (x, mode, optab_to_code (binoptab), opn, speed)
+ > set_src_cost (x, mode, speed)))
{
if (CONST_INT_P (x))
{
is an insn that directly implements the indicated operation.
Returns null if this is not possible. */
static rtx
-expand_binop_directly (enum machine_mode mode, optab binoptab,
+expand_binop_directly (machine_mode mode, optab binoptab,
rtx op0, rtx op1,
rtx target, int unsignedp, enum optab_methods methods,
rtx_insn *last)
{
- enum machine_mode from_mode = widened_mode (mode, op0, op1);
+ machine_mode from_mode = widened_mode (mode, op0, op1);
enum insn_code icode = find_widening_optab_handler (binoptab, mode,
from_mode, 1);
- enum machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
- enum machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
- enum machine_mode mode0, mode1, tmp_mode;
+ machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
+ machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
+ machine_mode mode0, mode1, tmp_mode;
struct expand_operand ops[3];
bool commutative_p;
- rtx pat;
+ rtx_insn *pat;
rtx xop0 = op0, xop1 = op1;
- rtx swap;
/* If it is a commutative operator and the modes would match
if we would swap the operands, we can save the conversions. */
if (commutative_p
&& GET_MODE (xop0) != xmode0 && GET_MODE (xop1) != xmode1
&& GET_MODE (xop0) == xmode1 && GET_MODE (xop1) == xmode1)
- {
- swap = xop0;
- xop0 = xop1;
- xop1 = swap;
- }
+ std::swap (xop0, xop1);
/* If we are optimizing, force expensive constants into a register. */
xop0 = avoid_expensive_constant (xmode0, binoptab, 0, xop0, unsignedp);
Also try to make the last operand a constant. */
if (commutative_p
&& swap_commutative_operands_with_target (target, xop0, xop1))
- {
- swap = xop1;
- xop1 = xop0;
- xop0 = swap;
- }
+ std::swap (xop0, xop1);
/* Now, if insn's predicates don't allow our operands, put them into
pseudo regs. */
/* The mode of the result is different then the mode of the
arguments. */
tmp_mode = insn_data[(int) icode].operand[0].mode;
- if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
+ if (VECTOR_MODE_P (mode)
+ && GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
{
delete_insns_since (last);
return NULL_RTX;
/* If PAT is composed of more than one insn, try to add an appropriate
REG_EQUAL note to it. If we can't because TEMP conflicts with an
operand, call expand_binop again, this time without a target. */
- if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
- && ! add_equal_note (as_a <rtx_insn *> (pat), ops[0].value,
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
+ && ! add_equal_note (pat, ops[0].value,
optab_to_code (binoptab),
ops[1].value, ops[2].value))
{
this may or may not be TARGET. */
rtx
-expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
+expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
rtx target, int unsignedp, enum optab_methods methods)
{
enum optab_methods next_methods
= (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
? OPTAB_WIDEN : methods);
enum mode_class mclass;
- enum machine_mode wider_mode;
+ machine_mode wider_mode;
rtx libfunc;
rtx temp;
rtx_insn *entry_last = get_last_insn ();
if (otheroptab && optab_handler (otheroptab, mode) != CODE_FOR_nothing)
{
+ /* The scalar may have been extended to be too wide. Truncate
+ it back to the proper size to fit in the broadcast vector. */
+ machine_mode inner_mode = GET_MODE_INNER (mode);
+ if (!CONST_INT_P (op1)
+ && (GET_MODE_BITSIZE (inner_mode)
+ < GET_MODE_BITSIZE (GET_MODE (op1))))
+ op1 = force_reg (inner_mode,
+ simplify_gen_unary (TRUNCATE, inner_mode, op1,
+ GET_MODE (op1)));
rtx vop1 = expand_vector_broadcast (mode, op1);
if (vop1)
{
Also try to make the last operand a constant. */
if (commutative_optab_p (binoptab)
&& swap_commutative_operands_with_target (target, op0, op1))
- {
- temp = op1;
- op1 = op0;
- op0 = temp;
- }
+ std::swap (op0, op1);
/* These can be done a word at a time. */
if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
&& optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
{
unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
- enum machine_mode op1_mode;
+ machine_mode op1_mode;
double_shift_mask = targetm.shift_truncation_mask (mode);
shift_mask = targetm.shift_truncation_mask (word_mode);
if (optab_handler (mov_optab, mode) != CODE_FOR_nothing
|| ! rtx_equal_p (target, xtarget))
{
- rtx temp = emit_move_insn (target, xtarget);
+ rtx_insn *temp = emit_move_insn (target, xtarget);
set_dst_reg_note (temp, REG_EQUAL,
gen_rtx_fmt_ee (optab_to_code (binoptab),
{
rtx_insn *insns;
rtx op1x = op1;
- enum machine_mode op1_mode = mode;
+ machine_mode op1_mode = mode;
rtx value;
start_sequence ();
insns = get_insns ();
end_sequence ();
+ bool trapv = trapv_binoptab_p (binoptab);
target = gen_reg_rtx (mode);
emit_libcall_block_1 (insns, target, value,
- gen_rtx_fmt_ee (optab_to_code (binoptab),
- mode, op0, op1),
- trapv_binoptab_p (binoptab));
+ trapv ? NULL_RTX
+ : gen_rtx_fmt_ee (optab_to_code (binoptab),
+ mode, op0, op1), trapv);
return target;
}
of an unsigned wider operation, since the result would be the same. */
rtx
-sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
+sign_expand_binop (machine_mode mode, optab uoptab, optab soptab,
rtx op0, rtx op1, rtx target, int unsignedp,
enum optab_methods methods)
{
expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
int unsignedp)
{
- enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
+ machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
enum mode_class mclass;
- enum machine_mode wider_mode;
+ machine_mode wider_mode;
rtx_insn *entry_last = get_last_insn ();
rtx_insn *last;
expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
int unsignedp)
{
- enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
+ machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
enum mode_class mclass;
- enum machine_mode wider_mode;
+ machine_mode wider_mode;
rtx_insn *entry_last = get_last_insn ();
rtx_insn *last;
{
struct expand_operand ops[4];
enum insn_code icode = optab_handler (binoptab, mode);
- enum machine_mode mode0 = insn_data[icode].operand[1].mode;
- enum machine_mode mode1 = insn_data[icode].operand[2].mode;
+ machine_mode mode0 = insn_data[icode].operand[1].mode;
+ machine_mode mode1 = insn_data[icode].operand[2].mode;
rtx xop0 = op0, xop1 = op1;
/* If we are optimizing, force expensive constants into a register. */
expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
rtx targ0, rtx targ1, enum rtx_code code)
{
- enum machine_mode mode;
- enum machine_mode libval_mode;
+ machine_mode mode;
+ machine_mode libval_mode;
rtx libval;
rtx_insn *insns;
rtx libfunc;
the operation to perform, not an optab pointer. All other
arguments are the same. */
rtx
-expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
+expand_simple_unop (machine_mode mode, enum rtx_code code, rtx op0,
rtx target, int unsignedp)
{
optab unop = code_to_optab (code);
A similar operation can be used for clrsb. UNOPTAB says which operation
we are trying to expand. */
static rtx
-widen_leading (enum machine_mode mode, rtx op0, rtx target, optab unoptab)
+widen_leading (machine_mode mode, rtx op0, rtx target, optab unoptab)
{
enum mode_class mclass = GET_MODE_CLASS (mode);
if (CLASS_HAS_WIDER_MODES_P (mclass))
{
- enum machine_mode wider_mode;
+ machine_mode wider_mode;
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
/* Try calculating clz of a double-word quantity as two clz's of word-sized
quantities, choosing which based on whether the high word is nonzero. */
static rtx
-expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
+expand_doubleword_clz (machine_mode mode, rtx op0, rtx target)
{
rtx xop0 = force_reg (mode, op0);
rtx subhi = gen_highpart (word_mode, xop0);
if (temp != result)
convert_move (result, temp, true);
- emit_jump_insn (gen_jump (after_label));
+ emit_jump_insn (targetm.gen_jump (after_label));
emit_barrier ();
/* Else clz of the full value is clz of the low word plus the number
return 0;
}
+/* Try calculating popcount of a double-word quantity as two popcount's of
+ word-sized quantities and summing up the results. */
+static rtx
+expand_doubleword_popcount (machine_mode mode, rtx op0, rtx target)
+{
+ rtx t0, t1, t;
+ rtx_insn *seq;
+
+ start_sequence ();
+
+ t0 = expand_unop_direct (word_mode, popcount_optab,
+ operand_subword_force (op0, 0, mode), NULL_RTX,
+ true);
+ t1 = expand_unop_direct (word_mode, popcount_optab,
+ operand_subword_force (op0, 1, mode), NULL_RTX,
+ true);
+ if (!t0 || !t1)
+ {
+ end_sequence ();
+ return NULL_RTX;
+ }
+
+ /* If we were not given a target, use a word_mode register, not a
+ 'mode' register. The result will fit, and nobody is expecting
+ anything bigger (the return type of __builtin_popcount* is int). */
+ if (!target)
+ target = gen_reg_rtx (word_mode);
+
+ t = expand_binop (word_mode, add_optab, t0, t1, target, 0, OPTAB_DIRECT);
+
+ seq = get_insns ();
+ end_sequence ();
+
+ add_equal_note (seq, t, POPCOUNT, op0, 0);
+ emit_insn (seq);
+ return t;
+}
+
+/* Try calculating
+ (parity:wide x)
+ as
+ (parity:narrow (low (x) ^ high (x))) */
+static rtx
+expand_doubleword_parity (machine_mode mode, rtx op0, rtx target)
+{
+ rtx t = expand_binop (word_mode, xor_optab,
+ operand_subword_force (op0, 0, mode),
+ operand_subword_force (op0, 1, mode),
+ NULL_RTX, 0, OPTAB_DIRECT);
+ return expand_unop (word_mode, parity_optab, t, target, true);
+}
+
/* Try calculating
(bswap:narrow x)
as
(lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
static rtx
-widen_bswap (enum machine_mode mode, rtx op0, rtx target)
+widen_bswap (machine_mode mode, rtx op0, rtx target)
{
enum mode_class mclass = GET_MODE_CLASS (mode);
- enum machine_mode wider_mode;
+ machine_mode wider_mode;
rtx x;
rtx_insn *last;
/* Try calculating bswap as two bswaps of two word-sized operands. */
static rtx
-expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
+expand_doubleword_bswap (machine_mode mode, rtx op, rtx target)
{
rtx t0, t1;
/* Try calculating (parity x) as (and (popcount x) 1), where
popcount can also be done in a wider mode. */
static rtx
-expand_parity (enum machine_mode mode, rtx op0, rtx target)
+expand_parity (machine_mode mode, rtx op0, rtx target)
{
enum mode_class mclass = GET_MODE_CLASS (mode);
if (CLASS_HAS_WIDER_MODES_P (mclass))
{
- enum machine_mode wider_mode;
+ machine_mode wider_mode;
for (wider_mode = mode; wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
less convenient for expand_ffs anyway. */
static rtx
-expand_ctz (enum machine_mode mode, rtx op0, rtx target)
+expand_ctz (machine_mode mode, rtx op0, rtx target)
{
rtx_insn *seq;
rtx temp;
may have an undefined value in that case. If they do not give us a
convenient value, we have to generate a test and branch. */
static rtx
-expand_ffs (enum machine_mode mode, rtx op0, rtx target)
+expand_ffs (machine_mode mode, rtx op0, rtx target)
{
HOST_WIDE_INT val = 0;
bool defined_at_zero = false;
register will work around the situation. */
static rtx
-lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
- enum machine_mode imode)
+lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+ machine_mode imode)
{
rtx ret;
ret = lowpart_subreg (omode, val, imode);
logical operation on the sign bit. */
static rtx
-expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
+expand_absneg_bit (enum rtx_code code, machine_mode mode,
rtx op0, rtx target)
{
const struct real_format *fmt;
int bitpos, word, nwords, i;
- enum machine_mode imode;
+ machine_mode imode;
rtx temp;
rtx_insn *insns;
/* As expand_unop, but will fail rather than attempt the operation in a
different mode or with a libcall. */
static rtx
-expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
- int unsignedp)
+expand_unop_direct (machine_mode mode, optab unoptab, rtx op0, rtx target,
+ int unsignedp)
{
if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
{
struct expand_operand ops[2];
enum insn_code icode = optab_handler (unoptab, mode);
rtx_insn *last = get_last_insn ();
- rtx pat;
+ rtx_insn *pat;
create_output_operand (&ops[0], target, mode);
create_convert_operand_from (&ops[1], op0, mode, unsignedp);
pat = maybe_gen_insn (icode, 2, ops);
if (pat)
{
- if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
- && ! add_equal_note (as_a <rtx_insn *> (pat), ops[0].value,
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
+ && ! add_equal_note (pat, ops[0].value,
optab_to_code (unoptab),
ops[1].value, NULL_RTX))
{
this may or may not be TARGET. */
rtx
-expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
+expand_unop (machine_mode mode, optab unoptab, rtx op0, rtx target,
int unsignedp)
{
enum mode_class mclass = GET_MODE_CLASS (mode);
- enum machine_mode wider_mode;
+ machine_mode wider_mode;
rtx temp;
rtx libfunc;
goto try_libcall;
}
+ if (unoptab == popcount_optab
+ && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
+ && optab_handler (unoptab, word_mode) != CODE_FOR_nothing
+ && optimize_insn_for_speed_p ())
+ {
+ temp = expand_doubleword_popcount (mode, op0, target);
+ if (temp)
+ return temp;
+ }
+
+ if (unoptab == parity_optab
+ && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
+ && (optab_handler (unoptab, word_mode) != CODE_FOR_nothing
+ || optab_handler (popcount_optab, word_mode) != CODE_FOR_nothing)
+ && optimize_insn_for_speed_p ())
+ {
+ temp = expand_doubleword_parity (mode, op0, target);
+ if (temp)
+ return temp;
+ }
+
/* Widening (or narrowing) bswap needs special treatment. */
if (unoptab == bswap_optab)
{
rtx_insn *insns;
rtx value;
rtx eq_value;
- enum machine_mode outmode = mode;
+ machine_mode outmode = mode;
/* All of these functions return small values. Thus we choose to
have them return something that isn't a double-word. */
end_sequence ();
target = gen_reg_rtx (outmode);
- eq_value = gen_rtx_fmt_e (optab_to_code (unoptab), mode, op0);
- if (GET_MODE_SIZE (outmode) < GET_MODE_SIZE (mode))
- eq_value = simplify_gen_unary (TRUNCATE, outmode, eq_value, mode);
- else if (GET_MODE_SIZE (outmode) > GET_MODE_SIZE (mode))
- eq_value = simplify_gen_unary (ZERO_EXTEND, outmode, eq_value, mode);
- emit_libcall_block_1 (insns, target, value, eq_value,
- trapv_unoptab_p (unoptab));
+ bool trapv = trapv_unoptab_p (unoptab);
+ if (trapv)
+ eq_value = NULL_RTX;
+ else
+ {
+ eq_value = gen_rtx_fmt_e (optab_to_code (unoptab), mode, op0);
+ if (GET_MODE_SIZE (outmode) < GET_MODE_SIZE (mode))
+ eq_value = simplify_gen_unary (TRUNCATE, outmode, eq_value, mode);
+ else if (GET_MODE_SIZE (outmode) > GET_MODE_SIZE (mode))
+ eq_value = simplify_gen_unary (ZERO_EXTEND,
+ outmode, eq_value, mode);
+ }
+ emit_libcall_block_1 (insns, target, value, eq_value, trapv);
return target;
}
*/
rtx
-expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
+expand_abs_nojump (machine_mode mode, rtx op0, rtx target,
int result_unsignedp)
{
rtx temp;
}
rtx
-expand_abs (enum machine_mode mode, rtx op0, rtx target,
+expand_abs (machine_mode mode, rtx op0, rtx target,
int result_unsignedp, int safe)
{
rtx temp;
NO_DEFER_POP;
do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
- NULL_RTX, NULL_RTX, op1, -1);
+ NULL_RTX, NULL, op1, -1);
op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
target, target, 0);
different but can be deduced from MODE. */
rtx
-expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
+expand_one_cmpl_abs_nojump (machine_mode mode, rtx op0, rtx target)
{
rtx temp;
and not playing with subregs so much, will help the register allocator. */
static rtx
-expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
+expand_copysign_absneg (machine_mode mode, rtx op0, rtx op1, rtx target,
int bitpos, bool op0_is_abs)
{
- enum machine_mode imode;
+ machine_mode imode;
enum insn_code icode;
rtx sign;
rtx_code_label *label;
is true if op0 is known to have its sign bit clear. */
static rtx
-expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
+expand_copysign_bit (machine_mode mode, rtx op0, rtx op1, rtx target,
int bitpos, bool op0_is_abs)
{
- enum machine_mode imode;
+ machine_mode imode;
int word, nwords, i;
rtx temp;
rtx_insn *insns;
rtx
expand_copysign (rtx op0, rtx op1, rtx target)
{
- enum machine_mode mode = GET_MODE (op0);
+ machine_mode mode = GET_MODE (op0);
const struct real_format *fmt;
bool op0_is_abs;
rtx temp;
enum rtx_code code)
{
struct expand_operand ops[2];
- rtx pat;
+ rtx_insn *pat;
create_output_operand (&ops[0], target, GET_MODE (target));
create_input_operand (&ops[1], op0, GET_MODE (op0));
if (!pat)
return false;
- if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& code != UNKNOWN)
- add_equal_note (as_a <rtx_insn *> (pat), ops[0].value, code, ops[1].value,
- NULL_RTX);
+ add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX);
emit_insn (pat);
}
last = emit_move_insn (target, result);
- set_dst_reg_note (last, REG_EQUAL, copy_rtx (equiv), target);
+ if (equiv)
+ set_dst_reg_note (last, REG_EQUAL, copy_rtx (equiv), target);
if (final_dest != target)
emit_move_insn (final_dest, target);
required to implement all (or any) of the unordered bcc operations. */
int
-can_compare_p (enum rtx_code code, enum machine_mode mode,
+can_compare_p (enum rtx_code code, machine_mode mode,
enum can_compare_purpose purpose)
{
rtx test;
static void
prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
int unsignedp, enum optab_methods methods,
- rtx *ptest, enum machine_mode *pmode)
+ rtx *ptest, machine_mode *pmode)
{
- enum machine_mode mode = *pmode;
+ machine_mode mode = *pmode;
rtx libfunc, test;
- enum machine_mode cmp_mode;
+ machine_mode cmp_mode;
enum mode_class mclass;
/* The other methods are not needed. */
/* If we are optimizing, force expensive constants into a register. */
if (CONSTANT_P (x) && optimize
- && (rtx_cost (x, COMPARE, 0, optimize_insn_for_speed_p ())
+ && (rtx_cost (x, mode, COMPARE, 0, optimize_insn_for_speed_p ())
> COSTS_N_INSNS (1)))
x = force_reg (mode, x);
if (CONSTANT_P (y) && optimize
- && (rtx_cost (y, COMPARE, 1, optimize_insn_for_speed_p ())
+ && (rtx_cost (y, mode, COMPARE, 1, optimize_insn_for_speed_p ())
> COSTS_N_INSNS (1)))
y = force_reg (mode, y);
-#ifdef HAVE_cc0
+#if HAVE_cc0
/* Make sure if we have a canonical comparison. The RTL
documentation states that canonical comparisons are required only
for targets which have cc0. */
if (mode == BLKmode)
{
- enum machine_mode result_mode;
+ machine_mode result_mode;
enum insn_code cmp_code;
tree length_type;
rtx libfunc;
if (GET_MODE_CLASS (mode) == MODE_CC)
{
- gcc_assert (can_compare_p (comparison, CCmode, ccp_jump));
- *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
+ enum insn_code icode = optab_handler (cbranch_optab, CCmode);
+ test = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
+ gcc_assert (icode != CODE_FOR_nothing
+ && insn_operand_matches (icode, 0, test));
+ *ptest = test;
return;
}
if (!SCALAR_FLOAT_MODE_P (mode))
{
rtx result;
- enum machine_mode ret_mode;
+ machine_mode ret_mode;
/* Handle a libcall just for the mode we are using. */
libfunc = optab_libfunc (cmp_optab, mode);
y = const0_rtx;
}
- *pmode = word_mode;
+ *pmode = ret_mode;
prepare_cmp_insn (x, y, comparison, NULL_RTX, unsignedp, methods,
ptest, pmode);
}
that it is accepted by the operand predicate. Return the new value. */
rtx
-prepare_operand (enum insn_code icode, rtx x, int opnum, enum machine_mode mode,
- enum machine_mode wider_mode, int unsignedp)
+prepare_operand (enum insn_code icode, rtx x, int opnum, machine_mode mode,
+ machine_mode wider_mode, int unsignedp)
{
if (mode != wider_mode)
x = convert_modes (wider_mode, mode, x, unsignedp);
if (!insn_operand_matches (icode, opnum, x))
{
+ machine_mode op_mode = insn_data[(int) icode].operand[opnum].mode;
if (reload_completed)
return NULL_RTX;
- x = copy_to_mode_reg (insn_data[(int) icode].operand[opnum].mode, x);
+ if (GET_MODE (x) != op_mode && GET_MODE (x) != VOIDmode)
+ return NULL_RTX;
+ x = copy_to_mode_reg (op_mode, x);
}
return x;
we can do the branch. */
static void
-emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label, int prob)
+emit_cmp_and_jump_insn_1 (rtx test, machine_mode mode, rtx label, int prob)
{
- enum machine_mode optab_mode;
+ machine_mode optab_mode;
enum mode_class mclass;
enum insn_code icode;
rtx_insn *insn;
void
emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
- enum machine_mode mode, int unsignedp, rtx label,
+ machine_mode mode, int unsignedp, rtx label,
int prob)
{
rtx op0 = x, op1 = y;
static void
prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
- rtx *ptest, enum machine_mode *pmode)
+ rtx *ptest, machine_mode *pmode)
{
enum rtx_code swapped = swap_condition (comparison);
enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
- enum machine_mode orig_mode = GET_MODE (x);
- enum machine_mode mode, cmp_mode;
+ machine_mode orig_mode = GET_MODE (x);
+ machine_mode mode, cmp_mode;
rtx true_rtx, false_rtx;
rtx value, target, equiv;
rtx_insn *insns;
if (code_to_optab (swapped)
&& (libfunc = optab_libfunc (code_to_optab (swapped), mode)))
{
- rtx tmp;
- tmp = x; x = y; y = tmp;
+ std::swap (x, y);
comparison = swapped;
break;
}
void
emit_indirect_jump (rtx loc)
{
- struct expand_operand ops[1];
-
- create_address_operand (&ops[0], loc);
- expand_jump_insn (CODE_FOR_indirect_jump, 1, ops);
- emit_barrier ();
+ if (!targetm.have_indirect_jump ())
+ sorry ("indirect jumps are not available on this target");
+ else
+ {
+ struct expand_operand ops[1];
+ create_address_operand (&ops[0], loc);
+ expand_jump_insn (targetm.code_for_indirect_jump, 1, ops);
+ emit_barrier ();
+ }
}
\f
-#ifdef HAVE_conditional_move
/* Emit a conditional move instruction if the machine supports one for that
condition and machine mode.
rtx
emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
- enum machine_mode cmode, rtx op2, rtx op3,
- enum machine_mode mode, int unsignedp)
+ machine_mode cmode, rtx op2, rtx op3,
+ machine_mode mode, int unsignedp)
{
- rtx tem, comparison;
+ rtx comparison;
rtx_insn *last;
enum insn_code icode;
enum rtx_code reversed;
if (swap_commutative_operands_p (op0, op1))
{
- tem = op0;
- op0 = op1;
- op1 = tem;
+ std::swap (op0, op1);
code = swap_condition (code);
}
&& ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
!= UNKNOWN))
{
- tem = op2;
- op2 = op3;
- op3 = tem;
+ std::swap (op2, op3);
code = reversed;
}
return NULL_RTX;
}
-/* Return nonzero if a conditional move of mode MODE is supported.
- This function is for combine so it can tell whether an insn that looks
- like a conditional move is actually supported by the hardware. If we
- guess wrong we lose a bit on optimization, but that's it. */
-/* ??? sparc64 supports conditionally moving integers values based on fp
- comparisons, and vice versa. How do we handle them? */
+/* Emit a conditional negate or bitwise complement using the
+ negcc or notcc optabs if available. Return NULL_RTX if such operations
+ are not available. Otherwise return the RTX holding the result.
+ TARGET is the desired destination of the result. COMP is the comparison
+ on which to negate. If COND is true move into TARGET the negation
+ or bitwise complement of OP1. Otherwise move OP2 into TARGET.
+ CODE is either NEG or NOT. MODE is the machine mode in which the
+ operation is performed. */
-int
-can_conditionally_move_p (enum machine_mode mode)
-{
- if (direct_optab_handler (movcc_optab, mode) != CODE_FOR_nothing)
- return 1;
+rtx
+emit_conditional_neg_or_complement (rtx target, rtx_code code,
+ machine_mode mode, rtx cond, rtx op1,
+ rtx op2)
+{
+ optab op = unknown_optab;
+ if (code == NEG)
+ op = negcc_optab;
+ else if (code == NOT)
+ op = notcc_optab;
+ else
+ gcc_unreachable ();
- return 0;
-}
+ insn_code icode = direct_optab_handler (op, mode);
+
+ if (icode == CODE_FOR_nothing)
+ return NULL_RTX;
-#endif /* HAVE_conditional_move */
+ if (!target)
+ target = gen_reg_rtx (mode);
+
+ rtx_insn *last = get_last_insn ();
+ struct expand_operand ops[4];
+
+ create_output_operand (&ops[0], target, mode);
+ create_fixed_operand (&ops[1], cond);
+ create_input_operand (&ops[2], op1, mode);
+ create_input_operand (&ops[3], op2, mode);
+
+ if (maybe_expand_insn (icode, 4, ops))
+ {
+ if (ops[0].value != target)
+ convert_move (target, ops[0].value, false);
+
+ return target;
+ }
+ delete_insns_since (last);
+ return NULL_RTX;
+}
/* Emit a conditional addition instruction if the machine supports one for that
condition and machine mode.
rtx
emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
- enum machine_mode cmode, rtx op2, rtx op3,
- enum machine_mode mode, int unsignedp)
+ machine_mode cmode, rtx op2, rtx op3,
+ machine_mode mode, int unsignedp)
{
- rtx tem, comparison;
+ rtx comparison;
rtx_insn *last;
enum insn_code icode;
if (swap_commutative_operands_p (op0, op1))
{
- tem = op0;
- op0 = op1;
- op1 = tem;
+ std::swap (op0, op1);
code = swap_condition (code);
}
/* Generate and return an insn body to add Y to X. */
-rtx
+rtx_insn *
gen_add2_insn (rtx x, rtx y)
{
enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
/* Generate and return an insn body to add r1 and c,
storing the result in r0. */
-rtx
+rtx_insn *
gen_add3_insn (rtx r0, rtx r1, rtx c)
{
enum insn_code icode = optab_handler (add_optab, GET_MODE (r0));
|| !insn_operand_matches (icode, 0, r0)
|| !insn_operand_matches (icode, 1, r1)
|| !insn_operand_matches (icode, 2, c))
- return NULL_RTX;
+ return NULL;
return GEN_FCN (icode) (r0, r1, c);
}
/* Generate and return an insn body to add Y to X. */
-rtx
+rtx_insn *
gen_addptr3_insn (rtx x, rtx y, rtx z)
{
enum insn_code icode = optab_handler (addptr3_optab, GET_MODE (x));
/* Generate and return an insn body to subtract Y from X. */
-rtx
+rtx_insn *
gen_sub2_insn (rtx x, rtx y)
{
enum insn_code icode = optab_handler (sub_optab, GET_MODE (x));
/* Generate and return an insn body to subtract r1 and c,
storing the result in r0. */
-rtx
+rtx_insn *
gen_sub3_insn (rtx r0, rtx r1, rtx c)
{
enum insn_code icode = optab_handler (sub_optab, GET_MODE (r0));
|| !insn_operand_matches (icode, 0, r0)
|| !insn_operand_matches (icode, 1, r1)
|| !insn_operand_matches (icode, 2, c))
- return NULL_RTX;
+ return NULL;
return GEN_FCN (icode) (r0, r1, c);
}
return 1;
}
+\f
+/* Generate the body of an insn to extend Y (with mode MFROM)
+ into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
-/* Generate the body of an instruction to copy Y into X.
- It may be a list of insns, if one insn isn't enough. */
-
-rtx
-gen_move_insn (rtx x, rtx y)
-{
- rtx_insn *seq;
-
- start_sequence ();
- emit_move_insn_1 (x, y);
- seq = get_insns ();
- end_sequence ();
- return seq;
-}
-\f
-/* Return the insn code used to extend FROM_MODE to TO_MODE.
- UNSIGNEDP specifies zero-extension instead of sign-extension. If
- no such operation exists, CODE_FOR_nothing will be returned. */
-
-enum insn_code
-can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
- int unsignedp)
-{
- convert_optab tab;
-#ifdef HAVE_ptr_extend
- if (unsignedp < 0)
- return CODE_FOR_ptr_extend;
-#endif
-
- tab = unsignedp ? zext_optab : sext_optab;
- return convert_optab_handler (tab, to_mode, from_mode);
-}
-
-/* Generate the body of an insn to extend Y (with mode MFROM)
- into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
-
-rtx
-gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
- enum machine_mode mfrom, int unsignedp)
+rtx_insn *
+gen_extend_insn (rtx x, rtx y, machine_mode mto,
+ machine_mode mfrom, int unsignedp)
{
enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
return GEN_FCN (icode) (x, y);
}
-\f
-/* can_fix_p and can_float_p say whether the target machine
- can directly convert a given fixed point type to
- a given floating point type, or vice versa.
- The returned value is the CODE_FOR_... value to use,
- or CODE_FOR_nothing if these modes cannot be directly converted.
-
- *TRUNCP_PTR is set to 1 if it is necessary to output
- an explicit FTRUNC insn before the fix insn; otherwise 0. */
-
-static enum insn_code
-can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
- int unsignedp, int *truncp_ptr)
-{
- convert_optab tab;
- enum insn_code icode;
-
- tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
- icode = convert_optab_handler (tab, fixmode, fltmode);
- if (icode != CODE_FOR_nothing)
- {
- *truncp_ptr = 0;
- return icode;
- }
-
- /* FIXME: This requires a port to define both FIX and FTRUNC pattern
- for this to work. We need to rework the fix* and ftrunc* patterns
- and documentation. */
- tab = unsignedp ? ufix_optab : sfix_optab;
- icode = convert_optab_handler (tab, fixmode, fltmode);
- if (icode != CODE_FOR_nothing
- && optab_handler (ftrunc_optab, fltmode) != CODE_FOR_nothing)
- {
- *truncp_ptr = 1;
- return icode;
- }
-
- *truncp_ptr = 0;
- return CODE_FOR_nothing;
-}
-
-enum insn_code
-can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
- int unsignedp)
-{
- convert_optab tab;
-
- tab = unsignedp ? ufloat_optab : sfloat_optab;
- return convert_optab_handler (tab, fltmode, fixmode);
-}
-
-/* Function supportable_convert_operation
-
- Check whether an operation represented by the code CODE is a
- convert operation that is supported by the target platform in
- vector form (i.e., when operating on arguments of type VECTYPE_IN
- producing a result of type VECTYPE_OUT).
-
- Convert operations we currently support directly are FIX_TRUNC and FLOAT.
- This function checks if these operations are supported
- by the target platform either directly (via vector tree-codes), or via
- target builtins.
-
- Output:
- - CODE1 is code of vector operation to be used when
- vectorizing the operation, if available.
- - DECL is decl of target builtin functions to be used
- when vectorizing the operation, if available. In this case,
- CODE1 is CALL_EXPR. */
-
-bool
-supportable_convert_operation (enum tree_code code,
- tree vectype_out, tree vectype_in,
- tree *decl, enum tree_code *code1)
-{
- enum machine_mode m1,m2;
- int truncp;
-
- m1 = TYPE_MODE (vectype_out);
- m2 = TYPE_MODE (vectype_in);
-
- /* First check if we can done conversion directly. */
- if ((code == FIX_TRUNC_EXPR
- && can_fix_p (m1,m2,TYPE_UNSIGNED (vectype_out), &truncp)
- != CODE_FOR_nothing)
- || (code == FLOAT_EXPR
- && can_float_p (m1,m2,TYPE_UNSIGNED (vectype_in))
- != CODE_FOR_nothing))
- {
- *code1 = code;
- return true;
- }
-
- /* Now check for builtin. */
- if (targetm.vectorize.builtin_conversion
- && targetm.vectorize.builtin_conversion (code, vectype_out, vectype_in))
- {
- *code1 = CALL_EXPR;
- *decl = targetm.vectorize.builtin_conversion (code, vectype_out, vectype_in);
- return true;
- }
- return false;
-}
-
\f
/* Generate code to convert FROM to floating point
and store in TO. FROM must be fixed point and not VOIDmode.
{
enum insn_code icode;
rtx target = to;
- enum machine_mode fmode, imode;
+ machine_mode fmode, imode;
bool can_do_signed = false;
/* Crash now, because we won't be able to decide which mode to use. */
/* The sign bit is not set. Convert as signed. */
expand_float (target, from, 0);
- emit_jump_insn (gen_jump (label));
+ emit_jump_insn (targetm.gen_jump (label));
emit_barrier ();
/* The sign bit is set.
real_2expN (&offset, GET_MODE_PRECISION (GET_MODE (from)), fmode);
temp = expand_binop (fmode, add_optab, target,
- CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
+ const_double_from_real_value (offset, fmode),
target, 0, OPTAB_LIB_WIDEN);
if (temp != target)
emit_move_insn (target, temp);
{
enum insn_code icode;
rtx target = to;
- enum machine_mode fmode, imode;
- int must_trunc = 0;
+ machine_mode fmode, imode;
+ bool must_trunc = false;
/* We first try to find a pair of modes, one real and one integer, at
least as wide as FROM and TO, respectively, in which we can open-code
bitsize = GET_MODE_PRECISION (GET_MODE (to));
real_2expN (&offset, bitsize - 1, fmode);
- limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
+ limit = const_double_from_real_value (offset, fmode);
lab1 = gen_label_rtx ();
lab2 = gen_label_rtx ();
/* If not, do the signed "fix" and branch around fixup code. */
expand_fix (to, from, 0);
- emit_jump_insn (gen_jump (lab2));
+ emit_jump_insn (targetm.gen_jump (lab2));
emit_barrier ();
/* Otherwise, subtract 2**(N-1), convert to signed number,
}
}
+
+/* Promote integer arguments for a libcall if necessary.
+ emit_library_call_value cannot do the promotion because it does not
+ know if it should do a signed or unsigned promotion. This is because
+ there are no tree types defined for libcalls. */
+
+static rtx
+prepare_libcall_arg (rtx arg, int uintp)
+{
+ machine_mode mode = GET_MODE (arg);
+ machine_mode arg_mode;
+ if (SCALAR_INT_MODE_P (mode))
+ {
+ /* If we need to promote the integer function argument we need to do
+ it here instead of inside emit_library_call_value because in
+ emit_library_call_value we don't know if we should do a signed or
+ unsigned promotion. */
+
+ int unsigned_p = 0;
+ arg_mode = promote_function_mode (NULL_TREE, mode,
+ &unsigned_p, NULL_TREE, 0);
+ if (arg_mode != mode)
+ return convert_to_mode (arg_mode, arg, uintp);
+ }
+ return arg;
+}
+
/* Generate code to convert FROM or TO a fixed-point.
If UINTP is true, either TO or FROM is an unsigned integer.
If SATP is true, we need to saturate the result. */
void
expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
{
- enum machine_mode to_mode = GET_MODE (to);
- enum machine_mode from_mode = GET_MODE (from);
+ machine_mode to_mode = GET_MODE (to);
+ machine_mode from_mode = GET_MODE (from);
convert_optab tab;
enum rtx_code this_code;
enum insn_code code;
libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
gcc_assert (libfunc);
+ from = prepare_libcall_arg (from, uintp);
+ from_mode = GET_MODE (from);
+
start_sequence ();
value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
1, from, from_mode);
{
enum insn_code icode;
rtx target = to;
- enum machine_mode fmode, imode;
+ machine_mode fmode, imode;
/* We first try to find a pair of modes, one real and one integer, at
least as wide as FROM and TO, respectively, in which we can open-code
we can do the conversion either signed or unsigned. */
for (fmode = GET_MODE (from); fmode != VOIDmode;
- fmode = GET_MODE_WIDER_MODE (fmode))
- for (imode = GET_MODE (to); imode != VOIDmode;
- imode = GET_MODE_WIDER_MODE (imode))
- {
- icode = convert_optab_handler (tab, imode, fmode);
- if (icode != CODE_FOR_nothing)
- {
- rtx_insn *last = get_last_insn ();
- if (fmode != GET_MODE (from))
- from = convert_to_mode (fmode, from, 0);
-
- if (imode != GET_MODE (to))
- target = gen_reg_rtx (imode);
-
- if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
- {
- delete_insns_since (last);
- continue;
- }
- if (target != to)
- convert_move (to, target, 0);
- return true;
- }
- }
-
- return false;
-}
-\f
-/* Report whether we have an instruction to perform the operation
- specified by CODE on operands of mode MODE. */
-int
-have_insn_for (enum rtx_code code, enum machine_mode mode)
-{
- return (code_to_optab (code)
- && (optab_handler (code_to_optab (code), mode)
- != CODE_FOR_nothing));
-}
-
-/* Initialize the libfunc fields of an entire group of entries in some
- optab. Each entry is set equal to a string consisting of a leading
- pair of underscores followed by a generic operation name followed by
- a mode name (downshifted to lowercase) followed by a single character
- representing the number of operands for the given operation (which is
- usually one of the characters '2', '3', or '4').
-
- OPTABLE is the table in which libfunc fields are to be initialized.
- OPNAME is the generic (string) name of the operation.
- SUFFIX is the character which specifies the number of operands for
- the given generic operation.
- MODE is the mode to generate for.
-*/
-
-static void
-gen_libfunc (optab optable, const char *opname, int suffix,
- enum machine_mode mode)
-{
- unsigned opname_len = strlen (opname);
- const char *mname = GET_MODE_NAME (mode);
- unsigned mname_len = strlen (mname);
- int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
- int len = prefix_len + opname_len + mname_len + 1 + 1;
- char *libfunc_name = XALLOCAVEC (char, len);
- char *p;
- const char *q;
-
- p = libfunc_name;
- *p++ = '_';
- *p++ = '_';
- if (targetm.libfunc_gnu_prefix)
- {
- *p++ = 'g';
- *p++ = 'n';
- *p++ = 'u';
- *p++ = '_';
- }
- for (q = opname; *q; )
- *p++ = *q++;
- for (q = mname; *q; q++)
- *p++ = TOLOWER (*q);
- *p++ = suffix;
- *p = '\0';
-
- set_optab_libfunc (optable, mode,
- ggc_alloc_string (libfunc_name, p - libfunc_name));
-}
-
-/* Like gen_libfunc, but verify that integer operation is involved. */
-
-void
-gen_int_libfunc (optab optable, const char *opname, char suffix,
- enum machine_mode mode)
-{
- int maxsize = 2 * BITS_PER_WORD;
- int minsize = BITS_PER_WORD;
-
- if (GET_MODE_CLASS (mode) != MODE_INT)
- return;
- if (maxsize < LONG_LONG_TYPE_SIZE)
- maxsize = LONG_LONG_TYPE_SIZE;
- if (minsize > INT_TYPE_SIZE
- && (trapv_binoptab_p (optable)
- || trapv_unoptab_p (optable)))
- minsize = INT_TYPE_SIZE;
- if (GET_MODE_BITSIZE (mode) < minsize
- || GET_MODE_BITSIZE (mode) > maxsize)
- return;
- gen_libfunc (optable, opname, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
-
-void
-gen_fp_libfunc (optab optable, const char *opname, char suffix,
- enum machine_mode mode)
-{
- char *dec_opname;
-
- if (GET_MODE_CLASS (mode) == MODE_FLOAT)
- gen_libfunc (optable, opname, suffix, mode);
- if (DECIMAL_FLOAT_MODE_P (mode))
- {
- dec_opname = XALLOCAVEC (char, sizeof (DECIMAL_PREFIX) + strlen (opname));
- /* For BID support, change the name to have either a bid_ or dpd_ prefix
- depending on the low level floating format used. */
- memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
- strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
- gen_libfunc (optable, dec_opname, suffix, mode);
- }
-}
-
-/* Like gen_libfunc, but verify that fixed-point operation is involved. */
-
-void
-gen_fixed_libfunc (optab optable, const char *opname, char suffix,
- enum machine_mode mode)
-{
- if (!ALL_FIXED_POINT_MODE_P (mode))
- return;
- gen_libfunc (optable, opname, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that signed fixed-point operation is
- involved. */
-
-void
-gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
- enum machine_mode mode)
-{
- if (!SIGNED_FIXED_POINT_MODE_P (mode))
- return;
- gen_libfunc (optable, opname, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that unsigned fixed-point operation is
- involved. */
-
-void
-gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
- enum machine_mode mode)
-{
- if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
- return;
- gen_libfunc (optable, opname, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that FP or INT operation is involved. */
-
-void
-gen_int_fp_libfunc (optab optable, const char *name, char suffix,
- enum machine_mode mode)
-{
- if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
- gen_fp_libfunc (optable, name, suffix, mode);
- if (INTEGRAL_MODE_P (mode))
- gen_int_libfunc (optable, name, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that FP or INT operation is involved
- and add 'v' suffix for integer operation. */
-
-void
-gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
- enum machine_mode mode)
-{
- if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
- gen_fp_libfunc (optable, name, suffix, mode);
- if (GET_MODE_CLASS (mode) == MODE_INT)
- {
- int len = strlen (name);
- char *v_name = XALLOCAVEC (char, len + 2);
- strcpy (v_name, name);
- v_name[len] = 'v';
- v_name[len + 1] = 0;
- gen_int_libfunc (optable, v_name, suffix, mode);
- }
-}
-
-/* Like gen_libfunc, but verify that FP or INT or FIXED operation is
- involved. */
-
-void
-gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
- enum machine_mode mode)
-{
- if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
- gen_fp_libfunc (optable, name, suffix, mode);
- if (INTEGRAL_MODE_P (mode))
- gen_int_libfunc (optable, name, suffix, mode);
- if (ALL_FIXED_POINT_MODE_P (mode))
- gen_fixed_libfunc (optable, name, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
- involved. */
-
-void
-gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
- enum machine_mode mode)
-{
- if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
- gen_fp_libfunc (optable, name, suffix, mode);
- if (INTEGRAL_MODE_P (mode))
- gen_int_libfunc (optable, name, suffix, mode);
- if (SIGNED_FIXED_POINT_MODE_P (mode))
- gen_signed_fixed_libfunc (optable, name, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that INT or FIXED operation is
- involved. */
-
-void
-gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
- enum machine_mode mode)
-{
- if (INTEGRAL_MODE_P (mode))
- gen_int_libfunc (optable, name, suffix, mode);
- if (ALL_FIXED_POINT_MODE_P (mode))
- gen_fixed_libfunc (optable, name, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that INT or signed FIXED operation is
- involved. */
-
-void
-gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
- enum machine_mode mode)
-{
- if (INTEGRAL_MODE_P (mode))
- gen_int_libfunc (optable, name, suffix, mode);
- if (SIGNED_FIXED_POINT_MODE_P (mode))
- gen_signed_fixed_libfunc (optable, name, suffix, mode);
-}
-
-/* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
- involved. */
-
-void
-gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
- enum machine_mode mode)
-{
- if (INTEGRAL_MODE_P (mode))
- gen_int_libfunc (optable, name, suffix, mode);
- if (UNSIGNED_FIXED_POINT_MODE_P (mode))
- gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
-}
-
-/* Initialize the libfunc fields of an entire group of entries of an
- inter-mode-class conversion optab. The string formation rules are
- similar to the ones for init_libfuncs, above, but instead of having
- a mode name and an operand count these functions have two mode names
- and no operand count. */
-
-void
-gen_interclass_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- size_t opname_len = strlen (opname);
- size_t mname_len = 0;
-
- const char *fname, *tname;
- const char *q;
- int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
- char *libfunc_name, *suffix;
- char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
- char *p;
-
- /* If this is a decimal conversion, add the current BID vs. DPD prefix that
- depends on which underlying decimal floating point format is used. */
- const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
-
- mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
-
- nondec_name = XALLOCAVEC (char, prefix_len + opname_len + mname_len + 1 + 1);
- nondec_name[0] = '_';
- nondec_name[1] = '_';
- if (targetm.libfunc_gnu_prefix)
- {
- nondec_name[2] = 'g';
- nondec_name[3] = 'n';
- nondec_name[4] = 'u';
- nondec_name[5] = '_';
- }
-
- memcpy (&nondec_name[prefix_len], opname, opname_len);
- nondec_suffix = nondec_name + opname_len + prefix_len;
-
- dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
- dec_name[0] = '_';
- dec_name[1] = '_';
- memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
- memcpy (&dec_name[2+dec_len], opname, opname_len);
- dec_suffix = dec_name + dec_len + opname_len + 2;
-
- fname = GET_MODE_NAME (fmode);
- tname = GET_MODE_NAME (tmode);
-
- if (DECIMAL_FLOAT_MODE_P (fmode) || DECIMAL_FLOAT_MODE_P (tmode))
- {
- libfunc_name = dec_name;
- suffix = dec_suffix;
- }
- else
- {
- libfunc_name = nondec_name;
- suffix = nondec_suffix;
- }
-
- p = suffix;
- for (q = fname; *q; p++, q++)
- *p = TOLOWER (*q);
- for (q = tname; *q; p++, q++)
- *p = TOLOWER (*q);
-
- *p = '\0';
-
- set_conv_libfunc (tab, tmode, fmode,
- ggc_alloc_string (libfunc_name, p - libfunc_name));
-}
-
-/* Same as gen_interclass_conv_libfunc but verify that we are producing
- int->fp conversion. */
-
-void
-gen_int_to_fp_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (GET_MODE_CLASS (fmode) != MODE_INT)
- return;
- if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
- return;
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* ufloat_optab is special by using floatun for FP and floatuns decimal fp
- naming scheme. */
-
-void
-gen_ufloat_conv_libfunc (convert_optab tab,
- const char *opname ATTRIBUTE_UNUSED,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (DECIMAL_FLOAT_MODE_P (tmode))
- gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
- else
- gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
-}
-
-/* Same as gen_interclass_conv_libfunc but verify that we are producing
- fp->int conversion. */
-
-void
-gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (GET_MODE_CLASS (fmode) != MODE_INT)
- return;
- if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
- return;
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* Same as gen_interclass_conv_libfunc but verify that we are producing
- fp->int conversion with no decimal floating point involved. */
-
-void
-gen_fp_to_int_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
- return;
- if (GET_MODE_CLASS (tmode) != MODE_INT)
- return;
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
- The string formation rules are
- similar to the ones for init_libfunc, above. */
-
-void
-gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
- enum machine_mode tmode, enum machine_mode fmode)
-{
- size_t opname_len = strlen (opname);
- size_t mname_len = 0;
-
- const char *fname, *tname;
- const char *q;
- int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
- char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
- char *libfunc_name, *suffix;
- char *p;
-
- /* If this is a decimal conversion, add the current BID vs. DPD prefix that
- depends on which underlying decimal floating point format is used. */
- const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
-
- mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
-
- nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
- nondec_name[0] = '_';
- nondec_name[1] = '_';
- if (targetm.libfunc_gnu_prefix)
- {
- nondec_name[2] = 'g';
- nondec_name[3] = 'n';
- nondec_name[4] = 'u';
- nondec_name[5] = '_';
- }
- memcpy (&nondec_name[prefix_len], opname, opname_len);
- nondec_suffix = nondec_name + opname_len + prefix_len;
-
- dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
- dec_name[0] = '_';
- dec_name[1] = '_';
- memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
- memcpy (&dec_name[2 + dec_len], opname, opname_len);
- dec_suffix = dec_name + dec_len + opname_len + 2;
-
- fname = GET_MODE_NAME (fmode);
- tname = GET_MODE_NAME (tmode);
-
- if (DECIMAL_FLOAT_MODE_P (fmode) || DECIMAL_FLOAT_MODE_P (tmode))
- {
- libfunc_name = dec_name;
- suffix = dec_suffix;
- }
- else
- {
- libfunc_name = nondec_name;
- suffix = nondec_suffix;
- }
-
- p = suffix;
- for (q = fname; *q; p++, q++)
- *p = TOLOWER (*q);
- for (q = tname; *q; p++, q++)
- *p = TOLOWER (*q);
-
- *p++ = '2';
- *p = '\0';
-
- set_conv_libfunc (tab, tmode, fmode,
- ggc_alloc_string (libfunc_name, p - libfunc_name));
-}
-
-/* Pick proper libcall for trunc_optab. We need to chose if we do
- truncation or extension and interclass or intraclass. */
-
-void
-gen_trunc_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
- return;
- if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
- return;
- if (tmode == fmode)
- return;
-
- if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
- || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-
- if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
- return;
-
- if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
- && GET_MODE_CLASS (fmode) == MODE_FLOAT)
- || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
- gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* Pick proper libcall for extend_optab. We need to chose if we do
- truncation or extension and interclass or intraclass. */
-
-void
-gen_extend_conv_libfunc (convert_optab tab,
- const char *opname ATTRIBUTE_UNUSED,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
- return;
- if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
- return;
- if (tmode == fmode)
- return;
-
- if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
- || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-
- if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
- return;
-
- if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
- && GET_MODE_CLASS (fmode) == MODE_FLOAT)
- || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
- gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* Pick proper libcall for fract_optab. We need to chose if we do
- interclass or intraclass. */
-
-void
-gen_fract_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (tmode == fmode)
- return;
- if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
- return;
-
- if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
- gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
- else
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* Pick proper libcall for fractuns_optab. */
-
-void
-gen_fractuns_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (tmode == fmode)
- return;
- /* One mode must be a fixed-point mode, and the other must be an integer
- mode. */
- if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
- || (ALL_FIXED_POINT_MODE_P (fmode)
- && GET_MODE_CLASS (tmode) == MODE_INT)))
- return;
-
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* Pick proper libcall for satfract_optab. We need to chose if we do
- interclass or intraclass. */
-
-void
-gen_satfract_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (tmode == fmode)
- return;
- /* TMODE must be a fixed-point mode. */
- if (!ALL_FIXED_POINT_MODE_P (tmode))
- return;
-
- if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
- gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
- else
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* Pick proper libcall for satfractuns_optab. */
-
-void
-gen_satfractuns_conv_libfunc (convert_optab tab,
- const char *opname,
- enum machine_mode tmode,
- enum machine_mode fmode)
-{
- if (tmode == fmode)
- return;
- /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
- if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
- return;
-
- gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
-}
-
-/* A table of previously-created libfuncs, hashed by name. */
-static GTY ((param_is (union tree_node))) htab_t libfunc_decls;
-
-/* Hashtable callbacks for libfunc_decls. */
-
-static hashval_t
-libfunc_decl_hash (const void *entry)
-{
- return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree) entry));
-}
-
-static int
-libfunc_decl_eq (const void *entry1, const void *entry2)
-{
- return DECL_NAME ((const_tree) entry1) == (const_tree) entry2;
-}
-
-/* Build a decl for a libfunc named NAME. */
-
-tree
-build_libfunc_function (const char *name)
-{
- tree decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
- get_identifier (name),
- build_function_type (integer_type_node, NULL_TREE));
- /* ??? We don't have any type information except for this is
- a function. Pretend this is "int foo()". */
- DECL_ARTIFICIAL (decl) = 1;
- DECL_EXTERNAL (decl) = 1;
- TREE_PUBLIC (decl) = 1;
- gcc_assert (DECL_ASSEMBLER_NAME (decl));
-
- /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
- are the flags assigned by targetm.encode_section_info. */
- SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
-
- return decl;
-}
-
-rtx
-init_one_libfunc (const char *name)
-{
- tree id, decl;
- void **slot;
- hashval_t hash;
-
- if (libfunc_decls == NULL)
- libfunc_decls = htab_create_ggc (37, libfunc_decl_hash,
- libfunc_decl_eq, NULL);
-
- /* See if we have already created a libfunc decl for this function. */
- id = get_identifier (name);
- hash = IDENTIFIER_HASH_VALUE (id);
- slot = htab_find_slot_with_hash (libfunc_decls, id, hash, INSERT);
- decl = (tree) *slot;
- if (decl == NULL)
- {
- /* Create a new decl, so that it can be passed to
- targetm.encode_section_info. */
- decl = build_libfunc_function (name);
- *slot = decl;
- }
- return XEXP (DECL_RTL (decl), 0);
-}
-
-/* Adjust the assembler name of libfunc NAME to ASMSPEC. */
-
-rtx
-set_user_assembler_libfunc (const char *name, const char *asmspec)
-{
- tree id, decl;
- void **slot;
- hashval_t hash;
-
- id = get_identifier (name);
- hash = IDENTIFIER_HASH_VALUE (id);
- slot = htab_find_slot_with_hash (libfunc_decls, id, hash, NO_INSERT);
- gcc_assert (slot);
- decl = (tree) *slot;
- set_user_assembler_name (decl, asmspec);
- return XEXP (DECL_RTL (decl), 0);
-}
-
-/* Call this to reset the function entry for one optab (OPTABLE) in mode
- MODE to NAME, which should be either 0 or a string constant. */
-void
-set_optab_libfunc (optab op, enum machine_mode mode, const char *name)
-{
- rtx val;
- struct libfunc_entry e;
- struct libfunc_entry **slot;
-
- e.op = op;
- e.mode1 = mode;
- e.mode2 = VOIDmode;
-
- if (name)
- val = init_one_libfunc (name);
- else
- val = 0;
- slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
- if (*slot == NULL)
- *slot = ggc_alloc<libfunc_entry> ();
- (*slot)->op = op;
- (*slot)->mode1 = mode;
- (*slot)->mode2 = VOIDmode;
- (*slot)->libfunc = val;
-}
-
-/* Call this to reset the function entry for one conversion optab
- (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
- either 0 or a string constant. */
-void
-set_conv_libfunc (convert_optab optab, enum machine_mode tmode,
- enum machine_mode fmode, const char *name)
-{
- rtx val;
- struct libfunc_entry e;
- struct libfunc_entry **slot;
-
- e.op = optab;
- e.mode1 = tmode;
- e.mode2 = fmode;
-
- if (name)
- val = init_one_libfunc (name);
- else
- val = 0;
- slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
- if (*slot == NULL)
- *slot = ggc_alloc<libfunc_entry> ();
- (*slot)->op = optab;
- (*slot)->mode1 = tmode;
- (*slot)->mode2 = fmode;
- (*slot)->libfunc = val;
-}
-
-/* Call this to initialize the contents of the optabs
- appropriately for the current target machine. */
-
-void
-init_optabs (void)
-{
- if (libfunc_hash)
- htab_empty (libfunc_hash);
- else
- libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
-
- /* Fill in the optabs with the insns we support. */
- init_all_optabs (this_fn_optabs);
-
- /* The ffs function operates on `int'. Fall back on it if we do not
- have a libgcc2 function for that width. */
- if (INT_TYPE_SIZE < BITS_PER_WORD)
- set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
- "ffs");
-
- /* Explicitly initialize the bswap libfuncs since we need them to be
- valid for things other than word_mode. */
- if (targetm.libfunc_gnu_prefix)
- {
- set_optab_libfunc (bswap_optab, SImode, "__gnu_bswapsi2");
- set_optab_libfunc (bswap_optab, DImode, "__gnu_bswapdi2");
- }
- else
- {
- set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
- set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
- }
-
- /* Use cabs for double complex abs, since systems generally have cabs.
- Don't define any libcall for float complex, so that cabs will be used. */
- if (complex_double_type_node)
- set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node),
- "cabs");
-
- abort_libfunc = init_one_libfunc ("abort");
- memcpy_libfunc = init_one_libfunc ("memcpy");
- memmove_libfunc = init_one_libfunc ("memmove");
- memcmp_libfunc = init_one_libfunc ("memcmp");
- memset_libfunc = init_one_libfunc ("memset");
- setbits_libfunc = init_one_libfunc ("__setbits");
-
-#ifndef DONT_USE_BUILTIN_SETJMP
- setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
- longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
-#else
- setjmp_libfunc = init_one_libfunc ("setjmp");
- longjmp_libfunc = init_one_libfunc ("longjmp");
-#endif
- unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
- unwind_sjlj_unregister_libfunc
- = init_one_libfunc ("_Unwind_SjLj_Unregister");
-
- /* For function entry/exit instrumentation. */
- profile_function_entry_libfunc
- = init_one_libfunc ("__cyg_profile_func_enter");
- profile_function_exit_libfunc
- = init_one_libfunc ("__cyg_profile_func_exit");
-
- gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
-
- /* Allow the target to add more libcalls or rename some, etc. */
- targetm.init_libfuncs ();
-}
-
-/* Use the current target and options to initialize
- TREE_OPTIMIZATION_OPTABS (OPTNODE). */
-
-void
-init_tree_optimization_optabs (tree optnode)
-{
- /* Quick exit if we have already computed optabs for this target. */
- if (TREE_OPTIMIZATION_BASE_OPTABS (optnode) == this_target_optabs)
- return;
-
- /* Forget any previous information and set up for the current target. */
- TREE_OPTIMIZATION_BASE_OPTABS (optnode) = this_target_optabs;
- struct target_optabs *tmp_optabs = (struct target_optabs *)
- TREE_OPTIMIZATION_OPTABS (optnode);
- if (tmp_optabs)
- memset (tmp_optabs, 0, sizeof (struct target_optabs));
- else
- tmp_optabs = ggc_alloc<target_optabs> ();
-
- /* Generate a new set of optabs into tmp_optabs. */
- init_all_optabs (tmp_optabs);
-
- /* If the optabs changed, record it. */
- if (memcmp (tmp_optabs, this_target_optabs, sizeof (struct target_optabs)))
- TREE_OPTIMIZATION_OPTABS (optnode) = tmp_optabs;
- else
- {
- TREE_OPTIMIZATION_OPTABS (optnode) = NULL;
- ggc_free (tmp_optabs);
- }
-}
-
-/* A helper function for init_sync_libfuncs. Using the basename BASE,
- install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
-
-static void
-init_sync_libfuncs_1 (optab tab, const char *base, int max)
-{
- enum machine_mode mode;
- char buf[64];
- size_t len = strlen (base);
- int i;
+ fmode = GET_MODE_WIDER_MODE (fmode))
+ for (imode = GET_MODE (to); imode != VOIDmode;
+ imode = GET_MODE_WIDER_MODE (imode))
+ {
+ icode = convert_optab_handler (tab, imode, fmode);
+ if (icode != CODE_FOR_nothing)
+ {
+ rtx_insn *last = get_last_insn ();
+ if (fmode != GET_MODE (from))
+ from = convert_to_mode (fmode, from, 0);
- gcc_assert (max <= 8);
- gcc_assert (len + 3 < sizeof (buf));
+ if (imode != GET_MODE (to))
+ target = gen_reg_rtx (imode);
- memcpy (buf, base, len);
- buf[len] = '_';
- buf[len + 1] = '0';
- buf[len + 2] = '\0';
+ if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
+ {
+ delete_insns_since (last);
+ continue;
+ }
+ if (target != to)
+ convert_move (to, target, 0);
+ return true;
+ }
+ }
- mode = QImode;
- for (i = 1; i <= max; i *= 2)
- {
- buf[len + 1] = '0' + i;
- set_optab_libfunc (tab, mode, buf);
- mode = GET_MODE_2XWIDER_MODE (mode);
- }
+ return false;
}
-
-void
-init_sync_libfuncs (int max)
+\f
+/* Report whether we have an instruction to perform the operation
+ specified by CODE on operands of mode MODE. */
+int
+have_insn_for (enum rtx_code code, machine_mode mode)
{
- if (!flag_sync_libcalls)
- return;
-
- init_sync_libfuncs_1 (sync_compare_and_swap_optab,
- "__sync_val_compare_and_swap", max);
- init_sync_libfuncs_1 (sync_lock_test_and_set_optab,
- "__sync_lock_test_and_set", max);
-
- init_sync_libfuncs_1 (sync_old_add_optab, "__sync_fetch_and_add", max);
- init_sync_libfuncs_1 (sync_old_sub_optab, "__sync_fetch_and_sub", max);
- init_sync_libfuncs_1 (sync_old_ior_optab, "__sync_fetch_and_or", max);
- init_sync_libfuncs_1 (sync_old_and_optab, "__sync_fetch_and_and", max);
- init_sync_libfuncs_1 (sync_old_xor_optab, "__sync_fetch_and_xor", max);
- init_sync_libfuncs_1 (sync_old_nand_optab, "__sync_fetch_and_nand", max);
-
- init_sync_libfuncs_1 (sync_new_add_optab, "__sync_add_and_fetch", max);
- init_sync_libfuncs_1 (sync_new_sub_optab, "__sync_sub_and_fetch", max);
- init_sync_libfuncs_1 (sync_new_ior_optab, "__sync_or_and_fetch", max);
- init_sync_libfuncs_1 (sync_new_and_optab, "__sync_and_and_fetch", max);
- init_sync_libfuncs_1 (sync_new_xor_optab, "__sync_xor_and_fetch", max);
- init_sync_libfuncs_1 (sync_new_nand_optab, "__sync_nand_and_fetch", max);
+ return (code_to_optab (code)
+ && (optab_handler (code_to_optab (code), mode)
+ != CODE_FOR_nothing));
}
/* Print information about the current contents of the optabs on
for (i = FIRST_NORM_OPTAB; i <= LAST_NORMLIB_OPTAB; ++i)
for (j = 0; j < NUM_MACHINE_MODES; ++j)
{
- rtx l = optab_libfunc ((optab) i, (enum machine_mode) j);
+ rtx l = optab_libfunc ((optab) i, (machine_mode) j);
if (l)
{
gcc_assert (GET_CODE (l) == SYMBOL_REF);
for (j = 0; j < NUM_MACHINE_MODES; ++j)
for (k = 0; k < NUM_MACHINE_MODES; ++k)
{
- rtx l = convert_optab_libfunc ((optab) i, (enum machine_mode) j,
- (enum machine_mode) k);
+ rtx l = convert_optab_libfunc ((optab) i, (machine_mode) j,
+ (machine_mode) k);
if (l)
{
gcc_assert (GET_CODE (l) == SYMBOL_REF);
}
}
-\f
/* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
CODE. Return 0 on failure. */
-rtx
+rtx_insn *
gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
{
- enum machine_mode mode = GET_MODE (op1);
+ machine_mode mode = GET_MODE (op1);
enum insn_code icode;
- rtx insn;
+ rtx_insn *insn;
rtx trap_rtx;
if (mode == VOIDmode)
prepare_cmp_insn (op1, op2, code, NULL_RTX, false, OPTAB_DIRECT,
&trap_rtx, &mode);
if (!trap_rtx)
- insn = NULL_RTX;
+ insn = NULL;
else
insn = GEN_FCN (icode) (trap_rtx, XEXP (trap_rtx, 0), XEXP (trap_rtx, 1),
tcode);
/* Return rtx code for TCODE. Use UNSIGNEDP to select signed
or unsigned operation code. */
-static enum rtx_code
+enum rtx_code
get_rtx_code (enum tree_code tcode, bool unsignedp)
{
enum rtx_code code;
code = LTGT;
break;
+ case BIT_AND_EXPR:
+ code = AND;
+ break;
+
+ case BIT_IOR_EXPR:
+ code = IOR;
+ break;
+
default:
gcc_unreachable ();
}
}
/* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
- unsigned operators. Do not generate compare instruction. */
+ unsigned operators. OPNO holds an index of the first comparison
+ operand in insn with code ICODE. Do not generate compare instruction. */
static rtx
vector_compare_rtx (enum tree_code tcode, tree t_op0, tree t_op1,
- bool unsignedp, enum insn_code icode)
+ bool unsignedp, enum insn_code icode,
+ unsigned int opno)
{
struct expand_operand ops[2];
rtx rtx_op0, rtx_op1;
+ machine_mode m0, m1;
enum rtx_code rcode = get_rtx_code (tcode, unsignedp);
gcc_assert (TREE_CODE_CLASS (tcode) == tcc_comparison);
- /* Expand operands. */
+ /* Expand operands. For vector types with scalar modes, e.g. where int64x1_t
+ has mode DImode, this can produce a constant RTX of mode VOIDmode; in such
+ cases, use the original mode. */
rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
EXPAND_STACK_PARM);
+ m0 = GET_MODE (rtx_op0);
+ if (m0 == VOIDmode)
+ m0 = TYPE_MODE (TREE_TYPE (t_op0));
+
rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
EXPAND_STACK_PARM);
+ m1 = GET_MODE (rtx_op1);
+ if (m1 == VOIDmode)
+ m1 = TYPE_MODE (TREE_TYPE (t_op1));
- create_input_operand (&ops[0], rtx_op0, GET_MODE (rtx_op0));
- create_input_operand (&ops[1], rtx_op1, GET_MODE (rtx_op1));
- if (!maybe_legitimize_operands (icode, 4, 2, ops))
+ create_input_operand (&ops[0], rtx_op0, m0);
+ create_input_operand (&ops[1], rtx_op1, m1);
+ if (!maybe_legitimize_operands (icode, opno, 2, ops))
gcc_unreachable ();
return gen_rtx_fmt_ee (rcode, VOIDmode, ops[0].value, ops[1].value);
}
-/* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
- of the CPU. SEL may be NULL, which stands for an unknown constant. */
-
-bool
-can_vec_perm_p (enum machine_mode mode, bool variable,
- const unsigned char *sel)
+/* Checks if vec_perm mask SEL is a constant equivalent to a shift of the first
+ vec_perm operand, assuming the second operand is a constant vector of zeroes.
+ Return the shift distance in bits if so, or NULL_RTX if the vec_perm is not a
+ shift. */
+static rtx
+shift_amt_for_vec_perm_mask (rtx sel)
{
- enum machine_mode qimode;
-
- /* If the target doesn't implement a vector mode for the vector type,
- then no operations are supported. */
- if (!VECTOR_MODE_P (mode))
- return false;
-
- if (!variable)
- {
- if (direct_optab_handler (vec_perm_const_optab, mode) != CODE_FOR_nothing
- && (sel == NULL
- || targetm.vectorize.vec_perm_const_ok == NULL
- || targetm.vectorize.vec_perm_const_ok (mode, sel)))
- return true;
- }
-
- if (direct_optab_handler (vec_perm_optab, mode) != CODE_FOR_nothing)
- return true;
-
- /* We allow fallback to a QI vector mode, and adjust the mask. */
- if (GET_MODE_INNER (mode) == QImode)
- return false;
- qimode = mode_for_vector (QImode, GET_MODE_SIZE (mode));
- if (!VECTOR_MODE_P (qimode))
- return false;
+ unsigned int i, first, nelt = GET_MODE_NUNITS (GET_MODE (sel));
+ unsigned int bitsize = GET_MODE_UNIT_BITSIZE (GET_MODE (sel));
- /* ??? For completeness, we ought to check the QImode version of
- vec_perm_const_optab. But all users of this implicit lowering
- feature implement the variable vec_perm_optab. */
- if (direct_optab_handler (vec_perm_optab, qimode) == CODE_FOR_nothing)
- return false;
+ if (GET_CODE (sel) != CONST_VECTOR)
+ return NULL_RTX;
- /* In order to support the lowering of variable permutations,
- we need to support shifts and adds. */
- if (variable)
+ first = INTVAL (CONST_VECTOR_ELT (sel, 0));
+ if (first >= nelt)
+ return NULL_RTX;
+ for (i = 1; i < nelt; i++)
{
- if (GET_MODE_UNIT_SIZE (mode) > 2
- && optab_handler (ashl_optab, mode) == CODE_FOR_nothing
- && optab_handler (vashl_optab, mode) == CODE_FOR_nothing)
- return false;
- if (optab_handler (add_optab, qimode) == CODE_FOR_nothing)
- return false;
+ int idx = INTVAL (CONST_VECTOR_ELT (sel, i));
+ unsigned int expected = i + first;
+ /* Indices into the second vector are all equivalent. */
+ if (idx < 0 || (MIN (nelt, (unsigned) idx) != MIN (nelt, expected)))
+ return NULL_RTX;
}
- return true;
+ return GEN_INT (first * bitsize);
}
/* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
expand_vec_perm_1 (enum insn_code icode, rtx target,
rtx v0, rtx v1, rtx sel)
{
- enum machine_mode tmode = GET_MODE (target);
- enum machine_mode smode = GET_MODE (sel);
+ machine_mode tmode = GET_MODE (target);
+ machine_mode smode = GET_MODE (sel);
struct expand_operand ops[4];
create_output_operand (&ops[0], target, tmode);
and three operands. */
rtx
-expand_vec_perm (enum machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
+expand_vec_perm (machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
{
enum insn_code icode;
- enum machine_mode qimode;
+ machine_mode qimode;
unsigned int i, w, e, u;
rtx tmp, sel_qi = NULL;
rtvec vec;
gcc_assert (GET_MODE_CLASS (GET_MODE (sel)) == MODE_VECTOR_INT);
if (GET_CODE (sel) == CONST_VECTOR)
{
+ /* See if this can be handled with a vec_shr. We only do this if the
+ second vector is all zeroes. */
+ enum insn_code shift_code = optab_handler (vec_shr_optab, mode);
+ enum insn_code shift_code_qi = ((qimode != VOIDmode && qimode != mode)
+ ? optab_handler (vec_shr_optab, qimode)
+ : CODE_FOR_nothing);
+ rtx shift_amt = NULL_RTX;
+ if (v1 == CONST0_RTX (GET_MODE (v1))
+ && (shift_code != CODE_FOR_nothing
+ || shift_code_qi != CODE_FOR_nothing))
+ {
+ shift_amt = shift_amt_for_vec_perm_mask (sel);
+ if (shift_amt)
+ {
+ struct expand_operand ops[3];
+ if (shift_code != CODE_FOR_nothing)
+ {
+ create_output_operand (&ops[0], target, mode);
+ create_input_operand (&ops[1], v0, mode);
+ create_convert_operand_from_type (&ops[2], shift_amt,
+ sizetype);
+ if (maybe_expand_insn (shift_code, 3, ops))
+ return ops[0].value;
+ }
+ if (shift_code_qi != CODE_FOR_nothing)
+ {
+ tmp = gen_reg_rtx (qimode);
+ create_output_operand (&ops[0], tmp, qimode);
+ create_input_operand (&ops[1], gen_lowpart (qimode, v0),
+ qimode);
+ create_convert_operand_from_type (&ops[2], shift_amt,
+ sizetype);
+ if (maybe_expand_insn (shift_code_qi, 3, ops))
+ return gen_lowpart (mode, ops[0].value);
+ }
+ }
+ }
+
icode = direct_optab_handler (vec_perm_const_optab, mode);
if (icode != CODE_FOR_nothing)
{
if (sel_qi == NULL)
{
/* Multiply each element by its byte size. */
- enum machine_mode selmode = GET_MODE (sel);
+ machine_mode selmode = GET_MODE (sel);
if (u == 2)
sel = expand_simple_binop (selmode, PLUS, sel, sel,
- sel, 0, OPTAB_DIRECT);
+ NULL, 0, OPTAB_DIRECT);
else
sel = expand_simple_binop (selmode, ASHIFT, sel,
GEN_INT (exact_log2 (u)),
- sel, 0, OPTAB_DIRECT);
+ NULL, 0, OPTAB_DIRECT);
gcc_assert (sel != NULL);
/* Broadcast the low byte each element into each of its bytes. */
return tmp;
}
-/* Return insn code for a conditional operator with a comparison in
- mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
+/* Generate insns for a VEC_COND_EXPR with mask, given its TYPE and its
+ three operands. */
-static inline enum insn_code
-get_vcond_icode (enum machine_mode vmode, enum machine_mode cmode, bool uns)
+rtx
+expand_vec_cond_mask_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
+ rtx target)
{
- enum insn_code icode = CODE_FOR_nothing;
- if (uns)
- icode = convert_optab_handler (vcondu_optab, vmode, cmode);
- else
- icode = convert_optab_handler (vcond_optab, vmode, cmode);
- return icode;
-}
+ struct expand_operand ops[4];
+ machine_mode mode = TYPE_MODE (vec_cond_type);
+ machine_mode mask_mode = TYPE_MODE (TREE_TYPE (op0));
+ enum insn_code icode = get_vcond_mask_icode (mode, mask_mode);
+ rtx mask, rtx_op1, rtx_op2;
-/* Return TRUE iff, appropriate vector insns are available
- for vector cond expr with vector type VALUE_TYPE and a comparison
- with operand vector types in CMP_OP_TYPE. */
+ if (icode == CODE_FOR_nothing)
+ return 0;
-bool
-expand_vec_cond_expr_p (tree value_type, tree cmp_op_type)
-{
- enum machine_mode value_mode = TYPE_MODE (value_type);
- enum machine_mode cmp_op_mode = TYPE_MODE (cmp_op_type);
- if (GET_MODE_SIZE (value_mode) != GET_MODE_SIZE (cmp_op_mode)
- || GET_MODE_NUNITS (value_mode) != GET_MODE_NUNITS (cmp_op_mode)
- || get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type),
- TYPE_UNSIGNED (cmp_op_type)) == CODE_FOR_nothing)
- return false;
- return true;
+ mask = expand_normal (op0);
+ rtx_op1 = expand_normal (op1);
+ rtx_op2 = expand_normal (op2);
+
+ mask = force_reg (mask_mode, mask);
+ rtx_op1 = force_reg (GET_MODE (rtx_op1), rtx_op1);
+
+ create_output_operand (&ops[0], target, mode);
+ create_input_operand (&ops[1], rtx_op1, mode);
+ create_input_operand (&ops[2], rtx_op2, mode);
+ create_input_operand (&ops[3], mask, mask_mode);
+ expand_insn (icode, 4, ops);
+
+ return ops[0].value;
}
/* Generate insns for a VEC_COND_EXPR, given its TYPE and its
struct expand_operand ops[6];
enum insn_code icode;
rtx comparison, rtx_op1, rtx_op2;
- enum machine_mode mode = TYPE_MODE (vec_cond_type);
- enum machine_mode cmp_op_mode;
+ machine_mode mode = TYPE_MODE (vec_cond_type);
+ machine_mode cmp_op_mode;
bool unsignedp;
tree op0a, op0b;
enum tree_code tcode;
}
else
{
+ gcc_assert (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (op0)));
+ if (get_vcond_mask_icode (mode, TYPE_MODE (TREE_TYPE (op0)))
+ != CODE_FOR_nothing)
+ return expand_vec_cond_mask_expr (vec_cond_type, op0, op1,
+ op2, target);
/* Fake op0 < 0. */
- gcc_assert (!TYPE_UNSIGNED (TREE_TYPE (op0)));
- op0a = op0;
- op0b = build_zero_cst (TREE_TYPE (op0));
- tcode = LT_EXPR;
+ else
+ {
+ gcc_assert (GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (op0)))
+ == MODE_VECTOR_INT);
+ op0a = op0;
+ op0b = build_zero_cst (TREE_TYPE (op0));
+ tcode = LT_EXPR;
+ }
}
- unsignedp = TYPE_UNSIGNED (TREE_TYPE (op0a));
cmp_op_mode = TYPE_MODE (TREE_TYPE (op0a));
+ unsignedp = TYPE_UNSIGNED (TREE_TYPE (op0a));
gcc_assert (GET_MODE_SIZE (mode) == GET_MODE_SIZE (cmp_op_mode)
if (icode == CODE_FOR_nothing)
return 0;
- comparison = vector_compare_rtx (tcode, op0a, op0b, unsignedp, icode);
+ comparison = vector_compare_rtx (tcode, op0a, op0b, unsignedp, icode, 4);
rtx_op1 = expand_normal (op1);
rtx_op2 = expand_normal (op2);
return ops[0].value;
}
-/* Return non-zero if a highpart multiply is supported of can be synthisized.
- For the benefit of expand_mult_highpart, the return value is 1 for direct,
- 2 for even/odd widening, and 3 for hi/lo widening. */
+/* Generate insns for a vector comparison into a mask. */
-int
-can_mult_highpart_p (enum machine_mode mode, bool uns_p)
+rtx
+expand_vec_cmp_expr (tree type, tree exp, rtx target)
{
- optab op;
- unsigned char *sel;
- unsigned i, nunits;
-
- op = uns_p ? umul_highpart_optab : smul_highpart_optab;
- if (optab_handler (op, mode) != CODE_FOR_nothing)
- return 1;
-
- /* If the mode is an integral vector, synth from widening operations. */
- if (GET_MODE_CLASS (mode) != MODE_VECTOR_INT)
- return 0;
+ struct expand_operand ops[4];
+ enum insn_code icode;
+ rtx comparison;
+ machine_mode mask_mode = TYPE_MODE (type);
+ machine_mode vmode;
+ bool unsignedp;
+ tree op0a, op0b;
+ enum tree_code tcode;
- nunits = GET_MODE_NUNITS (mode);
- sel = XALLOCAVEC (unsigned char, nunits);
+ op0a = TREE_OPERAND (exp, 0);
+ op0b = TREE_OPERAND (exp, 1);
+ tcode = TREE_CODE (exp);
- op = uns_p ? vec_widen_umult_even_optab : vec_widen_smult_even_optab;
- if (optab_handler (op, mode) != CODE_FOR_nothing)
- {
- op = uns_p ? vec_widen_umult_odd_optab : vec_widen_smult_odd_optab;
- if (optab_handler (op, mode) != CODE_FOR_nothing)
- {
- for (i = 0; i < nunits; ++i)
- sel[i] = !BYTES_BIG_ENDIAN + (i & ~1) + ((i & 1) ? nunits : 0);
- if (can_vec_perm_p (mode, false, sel))
- return 2;
- }
- }
+ unsignedp = TYPE_UNSIGNED (TREE_TYPE (op0a));
+ vmode = TYPE_MODE (TREE_TYPE (op0a));
- op = uns_p ? vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
- if (optab_handler (op, mode) != CODE_FOR_nothing)
- {
- op = uns_p ? vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
- if (optab_handler (op, mode) != CODE_FOR_nothing)
- {
- for (i = 0; i < nunits; ++i)
- sel[i] = 2 * i + (BYTES_BIG_ENDIAN ? 0 : 1);
- if (can_vec_perm_p (mode, false, sel))
- return 3;
- }
- }
+ icode = get_vec_cmp_icode (vmode, mask_mode, unsignedp);
+ if (icode == CODE_FOR_nothing)
+ return 0;
- return 0;
+ comparison = vector_compare_rtx (tcode, op0a, op0b, unsignedp, icode, 2);
+ create_output_operand (&ops[0], target, mask_mode);
+ create_fixed_operand (&ops[1], comparison);
+ create_fixed_operand (&ops[2], XEXP (comparison, 0));
+ create_fixed_operand (&ops[3], XEXP (comparison, 1));
+ expand_insn (icode, 4, ops);
+ return ops[0].value;
}
/* Expand a highpart multiply. */
rtx
-expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1,
+expand_mult_highpart (machine_mode mode, rtx op0, rtx op1,
rtx target, bool uns_p)
{
struct expand_operand eops[3];
enum insn_code icode;
int method, i, nunits;
- enum machine_mode wmode;
+ machine_mode wmode;
rtx m1, m2, perm;
optab tab1, tab2;
rtvec v;
tab1 = uns_p ? vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
tab2 = uns_p ? vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
if (BYTES_BIG_ENDIAN)
- {
- optab t = tab1;
- tab1 = tab2;
- tab2 = t;
- }
+ std::swap (tab1, tab2);
break;
default:
gcc_unreachable ();
return expand_vec_perm (mode, m1, m2, perm, target);
}
-
-/* Return true if target supports vector masked load/store for mode. */
-bool
-can_vec_mask_load_store_p (enum machine_mode mode, bool is_load)
-{
- optab op = is_load ? maskload_optab : maskstore_optab;
- enum machine_mode vmode;
- unsigned int vector_sizes;
-
- /* If mode is vector mode, check it directly. */
- if (VECTOR_MODE_P (mode))
- return optab_handler (op, mode) != CODE_FOR_nothing;
-
- /* Otherwise, return true if there is some vector mode with
- the mask load/store supported. */
-
- /* See if there is any chance the mask load or store might be
- vectorized. If not, punt. */
- vmode = targetm.vectorize.preferred_simd_mode (mode);
- if (!VECTOR_MODE_P (vmode))
- return false;
-
- if (optab_handler (op, vmode) != CODE_FOR_nothing)
- return true;
-
- vector_sizes = targetm.vectorize.autovectorize_vector_sizes ();
- while (vector_sizes != 0)
- {
- unsigned int cur = 1 << floor_log2 (vector_sizes);
- vector_sizes &= ~cur;
- if (cur <= GET_MODE_SIZE (mode))
- continue;
- vmode = mode_for_vector (mode, cur / GET_MODE_SIZE (mode));
- if (VECTOR_MODE_P (vmode)
- && optab_handler (op, vmode) != CODE_FOR_nothing)
- return true;
- }
- return false;
-}
\f
-/* Return true if there is a compare_and_swap pattern. */
-
-bool
-can_compare_and_swap_p (enum machine_mode mode, bool allow_libcall)
-{
- enum insn_code icode;
-
- /* Check for __atomic_compare_and_swap. */
- icode = direct_optab_handler (atomic_compare_and_swap_optab, mode);
- if (icode != CODE_FOR_nothing)
- return true;
-
- /* Check for __sync_compare_and_swap. */
- icode = optab_handler (sync_compare_and_swap_optab, mode);
- if (icode != CODE_FOR_nothing)
- return true;
- if (allow_libcall && optab_libfunc (sync_compare_and_swap_optab, mode))
- return true;
-
- /* No inline compare and swap. */
- return false;
-}
-
-/* Return true if an atomic exchange can be performed. */
-
-bool
-can_atomic_exchange_p (enum machine_mode mode, bool allow_libcall)
-{
- enum insn_code icode;
-
- /* Check for __atomic_exchange. */
- icode = direct_optab_handler (atomic_exchange_optab, mode);
- if (icode != CODE_FOR_nothing)
- return true;
-
- /* Don't check __sync_test_and_set, as on some platforms that
- has reduced functionality. Targets that really do support
- a proper exchange should simply be updated to the __atomics. */
-
- return can_compare_and_swap_p (mode, allow_libcall);
-}
-
-
/* Helper function to find the MODE_CC set in a sync_compare_and_swap
pattern. */
static bool
expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
rtx_code_label *label;
rtx cmp_reg, success, oldval;
success = NULL_RTX;
oldval = cmp_reg;
if (!expand_atomic_compare_and_swap (&success, &oldval, mem, old_reg,
- new_reg, false, MEMMODEL_SEQ_CST,
+ new_reg, false, MEMMODEL_SYNC_SEQ_CST,
MEMMODEL_RELAXED))
return false;
static rtx
maybe_emit_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
enum insn_code icode;
/* If the target supports the exchange directly, great. */
maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
enum memmodel model)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
enum insn_code icode;
rtx_insn *last_insn = get_last_insn ();
exists, and the memory model is stronger than acquire, add a release
barrier before the instruction. */
- if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST
- || (model & MEMMODEL_MASK) == MEMMODEL_RELEASE
- || (model & MEMMODEL_MASK) == MEMMODEL_ACQ_REL)
+ if (is_mm_seq_cst (model) || is_mm_release (model) || is_mm_acq_rel (model))
expand_mem_thread_fence (model);
if (icode != CODE_FOR_nothing)
static rtx
maybe_emit_compare_and_swap_exchange_loop (rtx target, rtx mem, rtx val)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
if (can_compare_and_swap_p (mode, true))
{
using the atomic_test_and_set instruction pattern. A boolean value
is returned from the operation, using TARGET if possible. */
-#ifndef HAVE_atomic_test_and_set
-#define HAVE_atomic_test_and_set 0
-#define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
-#endif
-
static rtx
maybe_emit_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
{
- enum machine_mode pat_bool_mode;
+ machine_mode pat_bool_mode;
struct expand_operand ops[3];
- if (!HAVE_atomic_test_and_set)
+ if (!targetm.have_atomic_test_and_set ())
return NULL_RTX;
/* While we always get QImode from __atomic_test_and_set, we get
other memory modes from __sync_lock_test_and_set. Note that we
use no endian adjustment here. This matches the 4.6 behavior
in the Sparc backend. */
- gcc_checking_assert
- (insn_data[CODE_FOR_atomic_test_and_set].operand[1].mode == QImode);
+ enum insn_code icode = targetm.code_for_atomic_test_and_set;
+ gcc_checking_assert (insn_data[icode].operand[1].mode == QImode);
if (GET_MODE (mem) != QImode)
mem = adjust_address_nv (mem, QImode, 0);
- pat_bool_mode = insn_data[CODE_FOR_atomic_test_and_set].operand[0].mode;
+ pat_bool_mode = insn_data[icode].operand[0].mode;
create_output_operand (&ops[0], target, pat_bool_mode);
create_fixed_operand (&ops[1], mem);
create_integer_operand (&ops[2], model);
- if (maybe_expand_insn (CODE_FOR_atomic_test_and_set, 3, ops))
+ if (maybe_expand_insn (icode, 3, ops))
return ops[0].value;
return NULL_RTX;
}
rtx ret;
/* Try an atomic_exchange first. */
- ret = maybe_emit_atomic_exchange (target, mem, val, MEMMODEL_ACQUIRE);
+ ret = maybe_emit_atomic_exchange (target, mem, val, MEMMODEL_SYNC_ACQUIRE);
if (ret)
return ret;
- ret = maybe_emit_sync_lock_test_and_set (target, mem, val, MEMMODEL_ACQUIRE);
+ ret = maybe_emit_sync_lock_test_and_set (target, mem, val,
+ MEMMODEL_SYNC_ACQUIRE);
if (ret)
return ret;
/* If there are no other options, try atomic_test_and_set if the value
being stored is 1. */
if (val == const1_rtx)
- ret = maybe_emit_atomic_test_and_set (target, mem, MEMMODEL_ACQUIRE);
+ ret = maybe_emit_atomic_test_and_set (target, mem, MEMMODEL_SYNC_ACQUIRE);
return ret;
}
rtx
expand_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
rtx ret, trueval, subtarget;
ret = maybe_emit_atomic_test_and_set (target, mem, model);
*PTARGET_BOOL is an optional place to store the boolean success/failure.
*PTARGET_OVAL is an optional place to store the old value from memory.
- Both target parameters may be NULL to indicate that we do not care about
- that return value. Both target parameters are updated on success to
- the actual location of the corresponding result.
+ Both target parameters may be NULL or const0_rtx to indicate that we do
+ not care about that return value. Both target parameters are updated on
+ success to the actual location of the corresponding result.
MEMMODEL is the memory model variant to use.
bool is_weak, enum memmodel succ_model,
enum memmodel fail_model)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
struct expand_operand ops[8];
enum insn_code icode;
rtx target_oval, target_bool = NULL_RTX;
/* Make sure we always have some place to put the return oldval.
Further, make sure that place is distinct from the input expected,
just in case we need that path down below. */
+ if (ptarget_oval && *ptarget_oval == const0_rtx)
+ ptarget_oval = NULL;
+
if (ptarget_oval == NULL
|| (target_oval = *ptarget_oval) == NULL
|| reg_overlap_mentioned_p (expected, target_oval))
icode = direct_optab_handler (atomic_compare_and_swap_optab, mode);
if (icode != CODE_FOR_nothing)
{
- enum machine_mode bool_mode = insn_data[icode].operand[0].mode;
+ machine_mode bool_mode = insn_data[icode].operand[0].mode;
+
+ if (ptarget_bool && *ptarget_bool == const0_rtx)
+ ptarget_bool = NULL;
/* Make sure we always have a place for the bool operand. */
if (ptarget_bool == NULL
if (libfunc != NULL)
{
rtx addr = convert_memory_address (ptr_mode, XEXP (mem, 0));
- target_oval = emit_library_call_value (libfunc, NULL_RTX, LCT_NORMAL,
- mode, 3, addr, ptr_mode,
- expected, mode, desired, mode);
+ rtx target = emit_library_call_value (libfunc, NULL_RTX, LCT_NORMAL,
+ mode, 3, addr, ptr_mode,
+ expected, mode, desired, mode);
+ emit_move_insn (target_oval, target);
/* Compute the boolean return value only if requested. */
if (ptarget_bool)
/* This routine will either emit the mem_thread_fence pattern or issue a
sync_synchronize to generate a fence for memory model MEMMODEL. */
-#ifndef HAVE_mem_thread_fence
-# define HAVE_mem_thread_fence 0
-# define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
-#endif
-#ifndef HAVE_memory_barrier
-# define HAVE_memory_barrier 0
-# define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
-#endif
-
void
expand_mem_thread_fence (enum memmodel model)
{
- if (HAVE_mem_thread_fence)
- emit_insn (gen_mem_thread_fence (GEN_INT (model)));
- else if ((model & MEMMODEL_MASK) != MEMMODEL_RELAXED)
+ if (targetm.have_mem_thread_fence ())
+ emit_insn (targetm.gen_mem_thread_fence (GEN_INT (model)));
+ else if (!is_mm_relaxed (model))
{
- if (HAVE_memory_barrier)
- emit_insn (gen_memory_barrier ());
+ if (targetm.have_memory_barrier ())
+ emit_insn (targetm.gen_memory_barrier ());
else if (synchronize_libfunc != NULL_RTX)
emit_library_call (synchronize_libfunc, LCT_NORMAL, VOIDmode, 0);
else
/* This routine will either emit the mem_signal_fence pattern or issue a
sync_synchronize to generate a fence for memory model MEMMODEL. */
-#ifndef HAVE_mem_signal_fence
-# define HAVE_mem_signal_fence 0
-# define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
-#endif
-
void
expand_mem_signal_fence (enum memmodel model)
{
- if (HAVE_mem_signal_fence)
- emit_insn (gen_mem_signal_fence (GEN_INT (model)));
- else if ((model & MEMMODEL_MASK) != MEMMODEL_RELAXED)
+ if (targetm.have_mem_signal_fence ())
+ emit_insn (targetm.gen_mem_signal_fence (GEN_INT (model)));
+ else if (!is_mm_relaxed (model))
{
/* By default targets are coherent between a thread and the signal
handler running on the same thread. Thus this really becomes a
rtx
expand_atomic_load (rtx target, rtx mem, enum memmodel model)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
enum insn_code icode;
/* If the target supports the load directly, great. */
target = gen_reg_rtx (mode);
/* For SEQ_CST, emit a barrier before the load. */
- if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
+ if (is_mm_seq_cst (model))
expand_mem_thread_fence (model);
emit_move_insn (target, mem);
rtx
expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
enum insn_code icode;
struct expand_operand ops[3];
if (maybe_expand_insn (icode, 2, ops))
{
/* lock_release is only a release barrier. */
- if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
+ if (is_mm_seq_cst (model))
expand_mem_thread_fence (model);
return const0_rtx;
}
emit_move_insn (mem, val);
/* For SEQ_CST, also emit a barrier after the store. */
- if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
+ if (is_mm_seq_cst (model))
expand_mem_thread_fence (model);
return const0_rtx;
maybe_emit_op (const struct atomic_op_functions *optab, rtx target, rtx mem,
rtx val, bool use_memmodel, enum memmodel model, bool after)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
struct expand_operand ops[4];
enum insn_code icode;
int op_counter = 0;
enum rtx_code code, enum memmodel model,
bool after)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
struct atomic_op_functions optab;
rtx result;
bool unused_result = (target == const0_rtx);
expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
enum memmodel model, bool after)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
rtx result;
bool unused_result = (target == const0_rtx);
bool
valid_multiword_target_p (rtx target)
{
- enum machine_mode mode;
+ machine_mode mode;
int i;
mode = GET_MODE (target);
&& !side_effects_p (addr))
{
rtx_insn *last;
- enum machine_mode mode;
+ machine_mode mode;
last = get_last_insn ();
mode = get_address_mode (mem);
maybe_legitimize_operand (enum insn_code icode, unsigned int opno,
struct expand_operand *op)
{
- enum machine_mode mode, imode;
+ machine_mode mode, imode;
bool old_volatile_ok, result;
mode = op->mode;
and emit any necessary set-up code. Return null and emit no
code on failure. */
-rtx
+rtx_insn *
maybe_gen_insn (enum insn_code icode, unsigned int nops,
struct expand_operand *ops)
{
gcc_assert (nops == (unsigned int) insn_data[(int) icode].n_generator_args);
if (!maybe_legitimize_operands (icode, 0, nops, ops))
- return NULL_RTX;
+ return NULL;
switch (nops)
{
maybe_expand_insn (enum insn_code icode, unsigned int nops,
struct expand_operand *ops)
{
- rtx pat = maybe_gen_insn (icode, nops, ops);
+ rtx_insn *pat = maybe_gen_insn (icode, nops, ops);
if (pat)
{
emit_insn (pat);
maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
struct expand_operand *ops)
{
- rtx pat = maybe_gen_insn (icode, nops, ops);
+ rtx_insn *pat = maybe_gen_insn (icode, nops, ops);
if (pat)
{
emit_jump_insn (pat);
if (!maybe_expand_jump_insn (icode, nops, ops))
gcc_unreachable ();
}
-
-/* Reduce conditional compilation elsewhere. */
-#ifndef HAVE_insv
-#define HAVE_insv 0
-#define CODE_FOR_insv CODE_FOR_nothing
-#endif
-#ifndef HAVE_extv
-#define HAVE_extv 0
-#define CODE_FOR_extv CODE_FOR_nothing
-#endif
-#ifndef HAVE_extzv
-#define HAVE_extzv 0
-#define CODE_FOR_extzv CODE_FOR_nothing
-#endif
-
-/* Enumerates the possible types of structure operand to an
- extraction_insn. */
-enum extraction_type { ET_unaligned_mem, ET_reg };
-
-/* Check whether insv, extv or extzv pattern ICODE can be used for an
- insertion or extraction of type TYPE on a structure of mode MODE.
- Return true if so and fill in *INSN accordingly. STRUCT_OP is the
- operand number of the structure (the first sign_extract or zero_extract
- operand) and FIELD_OP is the operand number of the field (the other
- side of the set from the sign_extract or zero_extract). */
-
-static bool
-get_traditional_extraction_insn (extraction_insn *insn,
- enum extraction_type type,
- enum machine_mode mode,
- enum insn_code icode,
- int struct_op, int field_op)
-{
- const struct insn_data_d *data = &insn_data[icode];
-
- enum machine_mode struct_mode = data->operand[struct_op].mode;
- if (struct_mode == VOIDmode)
- struct_mode = word_mode;
- if (mode != struct_mode)
- return false;
-
- enum machine_mode field_mode = data->operand[field_op].mode;
- if (field_mode == VOIDmode)
- field_mode = word_mode;
-
- enum machine_mode pos_mode = data->operand[struct_op + 2].mode;
- if (pos_mode == VOIDmode)
- pos_mode = word_mode;
-
- insn->icode = icode;
- insn->field_mode = field_mode;
- insn->struct_mode = (type == ET_unaligned_mem ? byte_mode : struct_mode);
- insn->pos_mode = pos_mode;
- return true;
-}
-
-/* Return true if an optab exists to perform an insertion or extraction
- of type TYPE in mode MODE. Describe the instruction in *INSN if so.
-
- REG_OPTAB is the optab to use for register structures and
- MISALIGN_OPTAB is the optab to use for misaligned memory structures.
- POS_OP is the operand number of the bit position. */
-
-static bool
-get_optab_extraction_insn (struct extraction_insn *insn,
- enum extraction_type type,
- enum machine_mode mode, direct_optab reg_optab,
- direct_optab misalign_optab, int pos_op)
-{
- direct_optab optab = (type == ET_unaligned_mem ? misalign_optab : reg_optab);
- enum insn_code icode = direct_optab_handler (optab, mode);
- if (icode == CODE_FOR_nothing)
- return false;
-
- const struct insn_data_d *data = &insn_data[icode];
-
- insn->icode = icode;
- insn->field_mode = mode;
- insn->struct_mode = (type == ET_unaligned_mem ? BLKmode : mode);
- insn->pos_mode = data->operand[pos_op].mode;
- if (insn->pos_mode == VOIDmode)
- insn->pos_mode = word_mode;
- return true;
-}
-
-/* Return true if an instruction exists to perform an insertion or
- extraction (PATTERN says which) of type TYPE in mode MODE.
- Describe the instruction in *INSN if so. */
-
-static bool
-get_extraction_insn (extraction_insn *insn,
- enum extraction_pattern pattern,
- enum extraction_type type,
- enum machine_mode mode)
-{
- switch (pattern)
- {
- case EP_insv:
- if (HAVE_insv
- && get_traditional_extraction_insn (insn, type, mode,
- CODE_FOR_insv, 0, 3))
- return true;
- return get_optab_extraction_insn (insn, type, mode, insv_optab,
- insvmisalign_optab, 2);
-
- case EP_extv:
- if (HAVE_extv
- && get_traditional_extraction_insn (insn, type, mode,
- CODE_FOR_extv, 1, 0))
- return true;
- return get_optab_extraction_insn (insn, type, mode, extv_optab,
- extvmisalign_optab, 3);
-
- case EP_extzv:
- if (HAVE_extzv
- && get_traditional_extraction_insn (insn, type, mode,
- CODE_FOR_extzv, 1, 0))
- return true;
- return get_optab_extraction_insn (insn, type, mode, extzv_optab,
- extzvmisalign_optab, 3);
-
- default:
- gcc_unreachable ();
- }
-}
-
-/* Return true if an instruction exists to access a field of mode
- FIELDMODE in a structure that has STRUCT_BITS significant bits.
- Describe the "best" such instruction in *INSN if so. PATTERN and
- TYPE describe the type of insertion or extraction we want to perform.
-
- For an insertion, the number of significant structure bits includes
- all bits of the target. For an extraction, it need only include the
- most significant bit of the field. Larger widths are acceptable
- in both cases. */
-
-static bool
-get_best_extraction_insn (extraction_insn *insn,
- enum extraction_pattern pattern,
- enum extraction_type type,
- unsigned HOST_WIDE_INT struct_bits,
- enum machine_mode field_mode)
-{
- enum machine_mode mode = smallest_mode_for_size (struct_bits, MODE_INT);
- while (mode != VOIDmode)
- {
- if (get_extraction_insn (insn, pattern, type, mode))
- {
- while (mode != VOIDmode
- && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (field_mode)
- && !TRULY_NOOP_TRUNCATION_MODES_P (insn->field_mode,
- field_mode))
- {
- get_extraction_insn (insn, pattern, type, mode);
- mode = GET_MODE_WIDER_MODE (mode);
- }
- return true;
- }
- mode = GET_MODE_WIDER_MODE (mode);
- }
- return false;
-}
-
-/* Return true if an instruction exists to access a field of mode
- FIELDMODE in a register structure that has STRUCT_BITS significant bits.
- Describe the "best" such instruction in *INSN if so. PATTERN describes
- the type of insertion or extraction we want to perform.
-
- For an insertion, the number of significant structure bits includes
- all bits of the target. For an extraction, it need only include the
- most significant bit of the field. Larger widths are acceptable
- in both cases. */
-
-bool
-get_best_reg_extraction_insn (extraction_insn *insn,
- enum extraction_pattern pattern,
- unsigned HOST_WIDE_INT struct_bits,
- enum machine_mode field_mode)
-{
- return get_best_extraction_insn (insn, pattern, ET_reg, struct_bits,
- field_mode);
-}
-
-/* Return true if an instruction exists to access a field of BITSIZE
- bits starting BITNUM bits into a memory structure. Describe the
- "best" such instruction in *INSN if so. PATTERN describes the type
- of insertion or extraction we want to perform and FIELDMODE is the
- natural mode of the extracted field.
-
- The instructions considered here only access bytes that overlap
- the bitfield; they do not touch any surrounding bytes. */
-
-bool
-get_best_mem_extraction_insn (extraction_insn *insn,
- enum extraction_pattern pattern,
- HOST_WIDE_INT bitsize, HOST_WIDE_INT bitnum,
- enum machine_mode field_mode)
-{
- unsigned HOST_WIDE_INT struct_bits = (bitnum % BITS_PER_UNIT
- + bitsize
- + BITS_PER_UNIT - 1);
- struct_bits -= struct_bits % BITS_PER_UNIT;
- return get_best_extraction_insn (insn, pattern, ET_unaligned_mem,
- struct_bits, field_mode);
-}
-
-#include "gt-optabs.h"
projects / gcc.git / blobdiff