/* This file contains the definitions and documentation for the
Register Transfer Expressions (rtx's) that make up the
Register Transfer Language (rtl) used in the Back End of the GNU compiler.
- Copyright (C) 1987, 1988, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2004,
- 2005, 2006, 2007
- Free Software Foundation, Inc.
+ Copyright (C) 1987-2015 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 2, or (at your option) any later
+Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to the Free
-Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
-02110-1301, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
/* Expression definitions and descriptions for all targets are in this file.
3. The print format, and type of each rtx->u.fld[] (field) in this rtx.
These formats are stored in rtx_format[].
The meaning of the formats is documented in front of this array in rtl.c
-
+
4. The class of the rtx. These are stored in rtx_class and are accessed
via the GET_RTX_CLASS macro. They are defined as follows:
RTX_BITFIELD_OPS
an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
RTX_INSN
- an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
+ an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN) or
+ data that will be output as assembly pseudo-ops (DEBUG_INSN)
RTX_MATCH
an rtx code for something that matches in insns (e.g, MATCH_DUP)
RTX_AUTOINC
value zero. */
DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
+/* Used in the cselib routines to describe a value. Objects of this
+ kind are only allocated in cselib.c, in an alloc pool instead of in
+ GC memory. The only operand of a VALUE is a cselib_val.
+ var-tracking requires this to have a distinct integral value from
+ DECL codes in trees. */
+DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
+
+/* The RTL generated for a DEBUG_EXPR_DECL. It links back to the
+ DEBUG_EXPR_DECL in the first operand. */
+DEF_RTL_EXPR(DEBUG_EXPR, "debug_expr", "0", RTX_OBJ)
+
/* ---------------------------------------------------------------------
Expressions used in constructing lists.
--------------------------------------------------------------------- */
-/* a linked list of expressions */
+/* A linked list of expressions. */
DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA)
-/* a linked list of instructions.
+/* A linked list of instructions.
The insns are represented in print by their uids. */
DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
-/* SEQUENCE appears in the result of a `gen_...' function
- for a DEFINE_EXPAND that wants to make several insns.
- Its elements are the bodies of the insns that should be made.
- `emit_insn' takes the SEQUENCE apart and makes separate insns. */
+/* A linked list of integers. */
+DEF_RTL_EXPR(INT_LIST, "int_list", "ie", RTX_EXTRA)
+
+/* SEQUENCE is used in late passes of the compiler to group insns for
+ one reason or another.
+
+ For example, after delay slot filling, branch instructions with filled
+ delay slots are represented as a SEQUENCE of length 1 + n_delay_slots,
+ with the branch instruction in XEXPVEC(seq, 0, 0) and the instructions
+ occupying the delay slots in the remaining XEXPVEC slots.
+
+ Another place where a SEQUENCE may appear, is in REG_FRAME_RELATED_EXPR
+ notes, to express complex operations that are not obvious from the insn
+ to which the REG_FRAME_RELATED_EXPR note is attached. In this usage of
+ SEQUENCE, the sequence vector slots do not hold real instructions but
+ only pseudo-instructions that can be translated to DWARF CFA expressions.
+
+ Some back ends also use SEQUENCE to group insns in bundles.
+
+ Much of the compiler infrastructure is not prepared to handle SEQUENCE
+ objects. Only passes after pass_free_cfg are expected to handle them. */
DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA)
-/* Refers to the address of its argument. This is only used in alias.c. */
-DEF_RTL_EXPR(ADDRESS, "address", "e", RTX_MATCH)
+/* Represents a non-global base address. This is only used in alias.c. */
+DEF_RTL_EXPR(ADDRESS, "address", "i", RTX_EXTRA)
/* ----------------------------------------------------------------------
Expression types used for things in the instruction chain.
---------------------------------------------------------------------- */
+/* An annotation for variable assignment tracking. */
+DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN)
+
/* An instruction that cannot jump. */
-DEF_RTL_EXPR(INSN, "insn", "iuuBieiee", RTX_INSN)
+DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN)
/* An instruction that can possibly jump.
Fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
-DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieiee0", RTX_INSN)
+DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN)
/* An instruction that can possibly call a subroutine
but which will not change which instruction comes next
in the current function.
- Field ( rtx->u.fld[9] ) is CALL_INSN_FUNCTION_USAGE.
+ Field ( rtx->u.fld[8] ) is CALL_INSN_FUNCTION_USAGE.
All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
-DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieieee", RTX_INSN)
+DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN)
+
+/* Placeholder for tablejump JUMP_INSNs. The pattern of this kind
+ of rtx is always either an ADDR_VEC or an ADDR_DIFF_VEC. These
+ placeholders do not appear as real instructions inside a basic
+ block, but are considered active_insn_p instructions for historical
+ reasons, when jump table data was represented with JUMP_INSNs. */
+DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN)
/* A marker that indicates that control will not flow through. */
-DEF_RTL_EXPR(BARRIER, "barrier", "iuu000000", RTX_EXTRA)
+DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA)
/* Holds a label that is followed by instructions.
Operand:
- 4: is used in jump.c for the use-count of the label.
- 5: is used in flow.c to point to the chain of label_ref's to this label.
- 6: is a number that is unique in the entire compilation.
- 7: is the user-given name of the label, if any. */
-DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", RTX_EXTRA)
+ 3: is used in jump.c for the use-count of the label.
+ 4: is used in the sh backend.
+ 5: is a number that is unique in the entire compilation.
+ 6: is the user-given name of the label, if any. */
+DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA)
-#ifdef USE_MAPPED_LOCATION
-/* Say where in the code a source line starts, for symbol table's sake.
- Operand:
- 4: unused if line number > 0, note-specific data otherwise.
- 5: line number if > 0, enum note_insn otherwise.
- 6: CODE_LABEL_NUMBER if line number == NOTE_INSN_DELETED_LABEL. */
-#else
/* Say where in the code a source line starts, for symbol table's sake.
Operand:
- 4: filename, if line number > 0, note-specific data otherwise.
- 5: line number if > 0, enum note_insn otherwise.
- 6: unique number if line number == note_insn_deleted_label. */
-#endif
-DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA)
+ 3: note-specific data
+ 4: enum insn_note
+ 5: unique number if insn_note == note_insn_deleted_label. */
+DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA)
/* ----------------------------------------------------------------------
Top level constituents of INSN, JUMP_INSN and CALL_INSN.
---------------------------------------------------------------------- */
-
+
/* Conditionally execute code.
Operand 0 is the condition that if true, the code is executed.
- Operand 1 is the code to be executed (typically a SET).
+ Operand 1 is the code to be executed (typically a SET).
Semantics are that there are no side effects if the condition
is false. This pattern is created automatically by the if_convert
These occur in an insn all by themselves as the PATTERN.
They also appear inside an ASM_OPERANDS
as a convenient way to hold a string. */
-DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", RTX_EXTRA)
+DEF_RTL_EXPR(ASM_INPUT, "asm_input", "si", RTX_EXTRA)
-#ifdef USE_MAPPED_LOCATION
-/* An assembler instruction with operands.
- 1st operand is the instruction template.
- 2nd operand is the constraint for the output.
- 3rd operand is the number of the output this expression refers to.
- When an insn stores more than one value, a separate ASM_OPERANDS
- is made for each output; this integer distinguishes them.
- 4th is a vector of values of input operands.
- 5th is a vector of modes and constraints for the input operands.
- Each element is an ASM_INPUT containing a constraint string
- and whose mode indicates the mode of the input operand.
- 6th is the source line number. */
-DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEi", RTX_EXTRA)
-#else
/* An assembler instruction with operands.
1st operand is the instruction template.
2nd operand is the constraint for the output.
5th is a vector of modes and constraints for the input operands.
Each element is an ASM_INPUT containing a constraint string
and whose mode indicates the mode of the input operand.
- 6th is the name of the containing source file.
+ 6th is a vector of labels that may be branched to by the asm.
7th is the source line number. */
-DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", RTX_EXTRA)
-#endif
+DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEEi", RTX_EXTRA)
/* A machine-specific operation.
1st operand is a vector of operands being used by the operation so that
operations is to be performed.
(Note that the vector must be the first operand because of the way that
genrecog.c record positions within an insn.)
- This can occur all by itself in a PATTERN, as a component of a PARALLEL,
- or inside an expression. */
+
+ UNSPEC can occur all by itself in a PATTERN, as a component of a PARALLEL,
+ or inside an expression.
+ UNSPEC by itself or as a component of a PARALLEL
+ is currently considered not deletable.
+
+ FIXME: Replace all uses of UNSPEC that appears by itself or as a component
+ of a PARALLEL with USE.
+ */
DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA)
/* Similar, but a volatile operation and one which may trap. */
DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA)
-/* Vector of addresses, stored as full words. */
-/* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */
+/* ----------------------------------------------------------------------
+ Table jump addresses.
+ ---------------------------------------------------------------------- */
+
+/* Vector of addresses, stored as full words.
+ Each element is a LABEL_REF to a CODE_LABEL whose address we want. */
DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA)
/* Vector of address differences X0 - BASE, X1 - BASE, ...
The third, fourth and fifth operands are only valid when
CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
- compilations. */
-
+ compilation. */
DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
/* Memory prefetch, with attributes supported on some targets.
/* Indicate something is used in a way that we don't want to explain.
For example, subroutine calls will use the register
- in which the static chain is passed. */
+ in which the static chain is passed.
+
+ USE can not appear as an operand of other rtx except for PARALLEL.
+ USE is not deletable, as it indicates that the operand
+ is used in some unknown way. */
DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA)
/* Indicate something is clobbered in a way that we don't want to explain.
For example, subroutine calls will clobber some physical registers
- (the ones that are by convention not saved). */
+ (the ones that are by convention not saved).
+
+ CLOBBER can not appear as an operand of other rtx except for PARALLEL.
+ CLOBBER of a hard register appearing by itself (not within PARALLEL)
+ is considered undeletable before reload. */
DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA)
/* Call a subroutine.
DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
+/* Like RETURN, but truly represents only a function return, while
+ RETURN may represent an insn that also performs other functions
+ of the function epilogue. Like RETURN, this may also occur in
+ conditional jumps. */
+DEF_RTL_EXPR(SIMPLE_RETURN, "simple_return", "", RTX_EXTRA)
+
+/* Special for EH return from subroutine. */
+
+DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA)
+
/* Conditional trap.
Operand 1 is the condition.
Operand 2 is the trap code.
For an unconditional trap, make the condition (const_int 1). */
DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA)
-/* Placeholder for _Unwind_Resume before we know if a function call
- or a branch is needed. Operand 1 is the exception region from
- which control is flowing. */
-DEF_RTL_EXPR(RESX, "resx", "i", RTX_EXTRA)
-
/* ----------------------------------------------------------------------
Primitive values for use in expressions.
---------------------------------------------------------------------- */
/* numeric integer constant */
DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
-/* numeric floating point constant.
- Operands hold the value. They are all 'w' and there may be from 2 to 6;
- see real.h. */
+/* numeric integer constant */
+DEF_RTL_EXPR(CONST_WIDE_INT, "const_wide_int", "", RTX_CONST_OBJ)
+
+/* fixed-point constant */
+DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ)
+
+/* numeric floating point or integer constant. If the mode is
+ VOIDmode it is an int otherwise it has a floating point mode and a
+ floating point value. Operands hold the value. They are all 'w'
+ and there may be from 2 to 6; see real.h. */
DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
/* Describes a vector constant. */
by a SET whose first operand is (PC). */
DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
-/* Used in the cselib routines to describe a value. Objects of this
- kind are only allocated in cselib.c, in an alloc pool instead of
- in GC memory. The only operand of a VALUE is a cselib_val_struct. */
-DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
-
/* A register. The "operand" is the register number, accessed with
the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
than a hardware register is being referred to. The second operand
- holds the original register number - this will be different for a
- pseudo register that got turned into a hard register. The third
- operand points to a reg_attrs structure.
+ points to a reg_attrs structure.
This rtx needs to have as many (or more) fields as a MEM, since we
can change REG rtx's into MEMs during reload. */
-DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
+DEF_RTL_EXPR(REG, "reg", "r", RTX_OBJ)
/* A scratch register. This represents a register used only within a
- single insn. It will be turned into a REG during register allocation
+ single insn. It will be replaced by a REG during register allocation
or reload unless the constraint indicates that the register won't be
- needed, in which case it can remain a SCRATCH. This code is
- marked as having one operand so it can be turned into a REG. */
-DEF_RTL_EXPR(SCRATCH, "scratch", "0", RTX_OBJ)
-
-/* One word of a multi-word value.
- The first operand is the complete value; the second says which word.
- The WORDS_BIG_ENDIAN flag controls whether word number 0
- (as numbered in a SUBREG) is the most or least significant word.
-
- This is also used to refer to a value in a different machine mode.
- For example, it can be used to refer to a SImode value as if it were
- Qimode, or vice versa. Then the word number is always 0. */
+ needed, in which case it can remain a SCRATCH. */
+DEF_RTL_EXPR(SCRATCH, "scratch", "", RTX_OBJ)
+
+/* A reference to a part of another value. The first operand is the
+ complete value and the second is the byte offset of the selected part. */
DEF_RTL_EXPR(SUBREG, "subreg", "ei", RTX_EXTRA)
/* This one-argument rtx is used for move instructions
The operand is a CODE_LABEL found in the insn chain. */
DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ)
-/* Reference to a named label:
+/* Reference to a named label:
Operand 0: label name
- Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
- Operand 2: tree from which this symbol is derived, or null.
+ Operand 1: tree from which this symbol is derived, or null.
This is either a DECL node, or some kind of constant. */
-DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ)
+DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s0", RTX_CONST_OBJ)
/* The condition code register is represented, in our imagination,
as a register holding a value that can be compared to zero.
DEF_RTL_EXPR(MULT, "mult", "ee", RTX_COMM_ARITH)
+/* Multiplication with signed saturation */
+DEF_RTL_EXPR(SS_MULT, "ss_mult", "ee", RTX_COMM_ARITH)
+/* Multiplication with unsigned saturation */
+DEF_RTL_EXPR(US_MULT, "us_mult", "ee", RTX_COMM_ARITH)
+
/* Operand 0 divided by operand 1. */
DEF_RTL_EXPR(DIV, "div", "ee", RTX_BIN_ARITH)
+/* Division with signed saturation */
+DEF_RTL_EXPR(SS_DIV, "ss_div", "ee", RTX_BIN_ARITH)
+/* Division with unsigned saturation */
+DEF_RTL_EXPR(US_DIV, "us_div", "ee", RTX_BIN_ARITH)
+
/* Remainder of operand 0 divided by operand 1. */
DEF_RTL_EXPR(MOD, "mod", "ee", RTX_BIN_ARITH)
because they can be understood from the machine-mode of the
containing MEM. These operations exist in only two cases:
1. pushes onto the stack.
- 2. created automatically by the life_analysis pass in flow.c. */
+ 2. created automatically by the auto-inc-dec pass. */
DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC)
DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC)
DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC)
Value is defined only when the operand's value is an integer. */
DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", RTX_UNARY)
+/* Conversions involving fractional fixed-point types without saturation,
+ including:
+ fractional to fractional (of different precision),
+ signed integer to fractional,
+ fractional to signed integer,
+ floating point to fractional,
+ fractional to floating point.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(FRACT_CONVERT, "fract_convert", "e", RTX_UNARY)
+
+/* Conversions involving fractional fixed-point types and unsigned integer
+ without saturation, including:
+ unsigned integer to fractional,
+ fractional to unsigned integer.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(UNSIGNED_FRACT_CONVERT, "unsigned_fract_convert", "e", RTX_UNARY)
+
+/* Conversions involving fractional fixed-point types with saturation,
+ including:
+ fractional to fractional (of different precision),
+ signed integer to fractional,
+ floating point to fractional.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(SAT_FRACT, "sat_fract", "e", RTX_UNARY)
+
+/* Conversions involving fractional fixed-point types and unsigned integer
+ with saturation, including:
+ unsigned integer to fractional.
+ NOTE: fractional can be either signed or unsigned for conversions. */
+DEF_RTL_EXPR(UNSIGNED_SAT_FRACT, "unsigned_sat_fract", "e", RTX_UNARY)
+
/* Absolute value */
DEF_RTL_EXPR(ABS, "abs", "e", RTX_UNARY)
or 0 if arg is 0. */
DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY)
+/* Count number of leading redundant sign bits (number of leading
+ sign bits minus one). */
+DEF_RTL_EXPR(CLRSB, "clrsb", "e", RTX_UNARY)
+
/* Count leading zeros. */
DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY)
submodes as the input vector mode, and the number of output parts must be
an integer multiple of the number of input parts. */
DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY)
-
+
/* Addition with signed saturation */
DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH)
/* Negation with signed saturation. */
DEF_RTL_EXPR(SS_NEG, "ss_neg", "e", RTX_UNARY)
+/* Negation with unsigned saturation. */
+DEF_RTL_EXPR(US_NEG, "us_neg", "e", RTX_UNARY)
+
+/* Absolute value with signed saturation. */
+DEF_RTL_EXPR(SS_ABS, "ss_abs", "e", RTX_UNARY)
/* Shift left with signed saturation. */
DEF_RTL_EXPR(SS_ASHIFT, "ss_ashift", "ee", RTX_BIN_ARITH)
+/* Shift left with unsigned saturation. */
+DEF_RTL_EXPR(US_ASHIFT, "us_ashift", "ee", RTX_BIN_ARITH)
+
/* Operand 0 minus operand 1, with unsigned saturation. */
DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH)
/* Unsigned saturating truncate. */
DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", RTX_UNARY)
+/* Floating point multiply/add combined instruction. */
+DEF_RTL_EXPR(FMA, "fma", "eee", RTX_TERNARY)
+
/* Information about the variable and its location. */
DEF_RTL_EXPR(VAR_LOCATION, "var_location", "te", RTX_EXTRA)
+/* Used in VAR_LOCATION for a pointer to a decl that is no longer
+ addressable. */
+DEF_RTL_EXPR(DEBUG_IMPLICIT_PTR, "debug_implicit_ptr", "t", RTX_OBJ)
+
+/* Represents value that argument had on function entry. The
+ single argument is the DECL_INCOMING_RTL of the corresponding
+ parameter. */
+DEF_RTL_EXPR(ENTRY_VALUE, "entry_value", "0", RTX_OBJ)
+
+/* Used in VAR_LOCATION for a reference to a parameter that has
+ been optimized away completely. */
+DEF_RTL_EXPR(DEBUG_PARAMETER_REF, "debug_parameter_ref", "t", RTX_OBJ)
+
/* All expressions from this point forward appear only in machine
descriptions. */
#ifdef GENERATOR_FILE
-/* Include a secondary machine-description file at this point. */
-DEF_RTL_EXPR(INCLUDE, "include", "s", RTX_EXTRA)
-
/* Pattern-matching operators: */
/* Use the function named by the second arg (the string)
to the PARALLEL and the initial expressions in the PARALLEL are matched.
Operand 0 is the operand-number, as in match_operand.
Operand 1 is a predicate to apply to the PARALLEL.
- Operand 2 is a vector of expressions, each of which must match the
+ Operand 2 is a vector of expressions, each of which must match the
corresponding element in the PARALLEL. */
DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH)
the result of the one before it. */
DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH)
-/* Appears only in define_predicate/define_special_predicate
- expressions. The argument is a C expression to be injected at this
- point in the predicate formula. */
+/* Used to inject a C conditional expression into an .md file. It can
+ appear in a predicate definition or an attribute expression. */
DEF_RTL_EXPR(MATCH_TEST, "match_test", "s", RTX_MATCH)
/* Insn (and related) definitions. */
C code to run to decide on a template to use. Otherwise, it is the
template to use.
4: C expression that must be true for split. This may start with "&&"
- in which case the split condition is the logical and of the insn
+ in which case the split condition is the logical and of the insn
condition and what follows the "&&" of this operand.
5: vector of insn patterns to place into a SEQUENCE
6: optionally, some C code to execute before generating the
insns. This might, for example, create some RTX's and store them in
elements of `recog_data.operand' for use by the vector of
insn-patterns.
- (`operands' is an alias here for `recog_data.operand').
+ (`operands' is an alias here for `recog_data.operand').
7: optionally, a vector of attributes for this insn. */
DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA)
This might, for example, create some RTX's and store them in
elements of `recog_data.operand' for use by the vector of
insn-patterns.
- (`operands' is an alias here for `recog_data.operand'). */
-DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
-
+ (`operands' is an alias here for `recog_data.operand').
+ 5th: optionally, a vector of attributes for this expand. */
+DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEssV", RTX_EXTRA)
+
/* Define a requirement for delay slots.
1st operand: Condition involving insn attributes that, if true,
indicates that the insn requires the number of delay slots
The first must be true for an insn to occupy that delay slot
location. The second is true for all insns that can be
annulled if the branch is true and the third is true for all
- insns that can be annulled if the branch is false.
+ insns that can be annulled if the branch is false.
Multiple DEFINE_DELAYs may be present. They indicate differing
requirements for delay slots. */
relational operator. Operands should have only one alternative.
1: A C expression giving an additional condition for recognizing
the generated pattern.
- 2: A template or C code to produce assembler output. */
-DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA)
+ 2: A template or C code to produce assembler output.
+ 3: A vector of attributes to append to the resulting cond_exec insn. */
+DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "EssV", RTX_EXTRA)
/* Definition of an operand predicate. The difference between
DEFINE_PREDICATE and DEFINE_SPECIAL_PREDICATE is that genrecog will
(reg X) where X is a base register. It is suitable for constraints that
describe a subset of all address references.
- When in doubt, use plain DEFINE_CONSTRAINT.
+ When in doubt, use plain DEFINE_CONSTRAINT.
Operand:
0: The name of the constraint (often, but not always, a single letter).
DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA)
DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA)
DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA)
-
+
/* Constructions for CPU pipeline description described by NDFAs. */
an asymmetric relation. CPU units or unit patterns in the strings
are separated by commas. Pattern is one unit name or unit names
separated by white-spaces.
-
+
For example, it is useful for description that slot1 is reserved
after slot0 reservation for a VLIW processor. We could describe it
by the following construction
state reservation, checking for `final_presence_set' is done on the
result reservation. This construction is useful to describe a
reservation which is actually two subsequent reservations. For
- example, if we use
+ example, if we use
(presence_set "slot1" "slot0")
guard for the bypass. The function will get the two insns as
parameters. If the function returns zero the bypass will be
ignored for this case. Additional guard is necessary to recognize
- complicated bypasses, e.g. when consumer is load address. */
+ complicated bypasses, e.g. when consumer is load address. If there
+ are more one bypass with the same output and input insns, the
+ chosen bypass is the first bypass with a guard in description whose
+ guard function returns nonzero. If there is no such bypass, then
+ bypass without the guard function is chosen. */
DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA)
/* (define_automaton string) describes names of automata generated and
o "time" which means printing additional time statistics about
generation of automata.
-
+
o "v" which means generation of file describing the result
automata. The file has suffix `.dfa' and can be used for the
description verification and debugging.
allof = allof "+" repeat
| repeat
-
+
repeat = element "*" number
| element
3rd operand: expression for the default value of the attribute. */
DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", RTX_EXTRA)
+/* Definition of an insn attribute that uses an existing enumerated type.
+ 1st operand: name of the attribute
+ 2nd operand: the name of the enumerated type
+ 3rd operand: expression for the default value of the attribute. */
+DEF_RTL_EXPR(DEFINE_ENUM_ATTR, "define_enum_attr", "sse", RTX_EXTRA)
+
/* Marker for the name of an attribute. */
DEF_RTL_EXPR(ATTR, "attr", "s", RTX_EXTRA)
true for the insn being scheduled in reorg.
genattr.c defines the following flags which can be tested by
- (attr_flag "foo") expressions in eligible_for_delay.
-
- forward, backward, very_likely, likely, very_unlikely, and unlikely. */
+ (attr_flag "foo") expressions in eligible_for_delay: forward, backward. */
DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA)
true, the second operand will be used as the value of the conditional. */
DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA)
+/* Definition of a pattern substitution meta operation on a DEFINE_EXPAND
+ or a DEFINE_INSN. Automatically generates new instances of DEFINE_INSNs
+ that match the substitution pattern.
+
+ Operand:
+ 0: The name of the substitition template.
+ 1: Input template to match to see if a substitution is applicable.
+ 2: A C expression giving an additional condition for the generated
+ new define_expand or define_insn.
+ 3: Output tempalate to generate via substitution.
+
+ Within a DEFINE_SUBST template, the meaning of some RTL expressions is
+ different from their usual interpretation: a MATCH_OPERAND matches any
+ expression tree with matching machine mode or with VOIDmode. Likewise,
+ MATCH_OP_DUP and MATCH_DUP match more liberally in a DEFINE_SUBST than
+ in other RTL expressions. MATCH_OPERATOR matches all common operators
+ but also UNSPEC, UNSPEC_VOLATILE, and MATCH_OPERATORS from the input
+ DEFINE_EXPAND or DEFINE_INSN. */
+DEF_RTL_EXPR(DEFINE_SUBST, "define_subst", "sEsE", RTX_EXTRA)
+
+/* Substitution attribute to apply a DEFINE_SUBST to a pattern.
+
+ Operand:
+ 0: The name of the subst-attribute.
+ 1: The name of the DEFINE_SUBST to be applied for this attribute.
+ 2: String to substitute for the subst-attribute name in the pattern
+ name, for the case that the DEFINE_SUBST is not applied (i.e. the
+ unmodified version of the pattern).
+ 3: String to substitute for the subst-attribute name in the pattern
+ name, for the case that the DEFINE_SUBST is applied to the patten.
+
+ The use of DEFINE_SUBST and DEFINE_SUBST_ATTR is explained in the
+ GCC internals manual, under "RTL Templates Transformations". */
+DEF_RTL_EXPR(DEFINE_SUBST_ATTR, "define_subst_attr", "ssss", RTX_EXTRA)
+
#endif /* GENERATOR_FILE */
/*
projects / gcc.git / blobdiff