#include "tm_p.h"
#include "hard-reg-set.h"
#include "regs.h"
+#include "hashtab.h"
+#include "hash-set.h"
+#include "vec.h"
+#include "machmode.h"
+#include "input.h"
#include "function.h"
+#include "predict.h"
+#include "dominance.h"
+#include "cfg.h"
+#include "cfgrtl.h"
+#include "cfganal.h"
+#include "cfgbuild.h"
+#include "basic-block.h"
#include "flags.h"
#include "insn-config.h"
#include "insn-attr.h"
#include "sched-int.h"
#include "ggc.h"
#include "tree.h"
-#include "vec.h"
#include "langhooks.h"
#include "rtlhooks-def.h"
#include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
_list_add (lp);
bnd = BLIST_BND (*lp);
- SET_BND_TO (bnd) = to;
+ BND_TO (bnd) = to;
BND_PTR (bnd) = ptr;
BND_AV (bnd) = NULL;
BND_AV1 (bnd) = NULL;
/* Add new fence consisting of INSN and STATE to the list pointed to by LP. */
static void
flist_add (flist_t *lp, insn_t insn, state_t state, deps_t dc, void *tc,
- insn_t last_scheduled_insn, vec<rtx, va_gc> *executing_insns,
+ insn_t last_scheduled_insn, vec<rtx_insn *, va_gc> *executing_insns,
int *ready_ticks, int ready_ticks_size, insn_t sched_next,
int cycle, int cycle_issued_insns, int issue_more,
bool starts_cycle_p, bool after_stall_p)
advance_deps_context (deps_t dc, insn_t insn)
{
sched_deps_info = &advance_deps_context_sched_deps_info;
- deps_analyze_insn (dc, as_a <rtx_insn *> (insn));
+ deps_analyze_insn (dc, insn);
}
\f
state_create (),
create_deps_context () /* dc */,
create_target_context (true) /* tc */,
- NULL_RTX /* last_scheduled_insn */,
+ NULL /* last_scheduled_insn */,
NULL, /* executing_insns */
XCNEWVEC (int, ready_ticks_size), /* ready_ticks */
ready_ticks_size,
- NULL_RTX /* sched_next */,
+ NULL /* sched_next */,
1 /* cycle */, 0 /* cycle_issued_insns */,
issue_rate, /* issue_more */
1 /* starts_cycle_p */, 0 /* after_stall_p */);
static void
merge_fences (fence_t f, insn_t insn,
state_t state, deps_t dc, void *tc,
- rtx last_scheduled_insn, vec<rtx, va_gc> *executing_insns,
+ rtx_insn *last_scheduled_insn,
+ vec<rtx_insn *, va_gc> *executing_insns,
int *ready_ticks, int ready_ticks_size,
rtx sched_next, int cycle, int issue_more, bool after_stall_p)
{
other parameters. */
static void
add_to_fences (flist_tail_t new_fences, insn_t insn,
- state_t state, deps_t dc, void *tc, rtx last_scheduled_insn,
- vec<rtx, va_gc> *executing_insns, int *ready_ticks,
- int ready_ticks_size, rtx sched_next, int cycle,
+ state_t state, deps_t dc, void *tc,
+ rtx_insn *last_scheduled_insn,
+ vec<rtx_insn *, va_gc> *executing_insns, int *ready_ticks,
+ int ready_ticks_size, rtx_insn *sched_next, int cycle,
int cycle_issued_insns, int issue_rate,
bool starts_cycle_p, bool after_stall_p)
{
add_to_fences (new_fences,
succ, state_create (), create_deps_context (),
create_target_context (true),
- NULL_RTX, NULL,
+ NULL, NULL,
XCNEWVEC (int, ready_ticks_size), ready_ticks_size,
- NULL_RTX, FENCE_CYCLE (fence) + 1,
+ NULL, FENCE_CYCLE (fence) + 1,
0, issue_rate, 1, FENCE_AFTER_STALL_P (fence));
}
insn_t
get_nop_from_pool (insn_t insn)
{
+ rtx nop_pat;
insn_t nop;
bool old_p = nop_pool.n != 0;
int flags;
if (old_p)
- nop = nop_pool.v[--nop_pool.n];
+ nop_pat = nop_pool.v[--nop_pool.n];
else
- nop = nop_pattern;
+ nop_pat = nop_pattern;
- nop = emit_insn_before (nop, insn);
+ nop = emit_insn_before (nop_pat, insn);
if (old_p)
flags = INSN_INIT_TODO_SSID;
sel_remove_insn (nop, false, full_tidying);
/* We'll recycle this nop. */
- INSN_DELETED_P (nop) = 0;
+ nop->set_undeleted ();
if (nop_pool.n == nop_pool.s)
- nop_pool.v = XRESIZEVEC (rtx, nop_pool.v,
+ nop_pool.v = XRESIZEVEC (rtx_insn *, nop_pool.v,
(nop_pool.s = 2 * nop_pool.s + 1));
nop_pool.v[nop_pool.n++] = nop;
}
to support ia64 speculation. When changes are needed, new rtx X and new mode
NMODE are written, and the callback returns true. */
static int
-hash_with_unspec_callback (const_rtx x, enum machine_mode mode ATTRIBUTE_UNUSED,
- rtx *nx, enum machine_mode* nmode)
+hash_with_unspec_callback (const_rtx x, machine_mode mode ATTRIBUTE_UNUSED,
+ rtx *nx, machine_mode* nmode)
{
if (GET_CODE (x) == UNSPEC
&& targetm.sched.skip_rtx_p
hash_rtx_callback_function hrcf;
int insn_class;
- SET_VINSN_INSN_RTX (vi) = insn;
+ VINSN_INSN_RTX (vi) = insn;
VINSN_COUNT (vi) = 0;
vi->cost = -1;
/* Return latency of INSN. */
static int
-sel_insn_rtx_cost (rtx insn)
+sel_insn_rtx_cost (rtx_insn *insn)
{
int cost;
/* The insn may come from the transformation cache, which may hold already
deleted insns, so mark it as not deleted. */
- INSN_DELETED_P (insn) = 0;
+ insn->set_undeleted ();
add_insn_after (insn, after, BLOCK_FOR_INSN (insn));
/* Update links from insn to bb and vice versa. */
df_insn_change_bb (insn, bb);
if (BB_END (bb) == after)
- SET_BB_END (bb) = insn;
+ BB_END (bb) = insn;
prepare_insn_expr (insn, seqno);
return insn;
sched_deps_info = &deps_init_id_sched_deps_info;
- deps_analyze_insn (dc, as_a <rtx_insn *> (insn));
+ deps_analyze_insn (dc, insn);
free_deps (dc);
/* This hook makes scheduler frontend to initialize its internal data
structures for the passed insn. */
- void (*init_insn) (rtx);
+ void (*init_insn) (insn_t);
};
/* A driver function to add a set of basic blocks (BBS) to the
if (ssi->init_insn)
FOR_EACH_VEC_ELT (bbs, i, bb)
{
- rtx insn;
+ rtx_insn *insn;
FOR_BB_INSNS (bb, insn)
ssi->init_insn (insn);
if (NOTE_INSN_BASIC_BLOCK_P (insn))
{
- init_global_data.prev_insn = NULL_RTX;
+ init_global_data.prev_insn = NULL;
return;
}
init_global_data.prev_insn = insn;
}
else
- init_global_data.prev_insn = NULL_RTX;
+ init_global_data.prev_insn = NULL;
if (GET_CODE (PATTERN (insn)) == ASM_INPUT
|| asm_noperands (PATTERN (insn)) >= 0)
/* Extracts machine mode MODE and destination location DST_LOC
for given INSN. */
void
-get_dest_and_mode (rtx insn, rtx *dst_loc, enum machine_mode *mode)
+get_dest_and_mode (rtx insn, rtx *dst_loc, machine_mode *mode)
{
rtx pat = PATTERN (insn);
/* Find the proper seqno for inserting at INSN by successors.
Return -1 if no successors with positive seqno exist. */
static int
-get_seqno_by_succs (rtx insn)
+get_seqno_by_succs (rtx_insn *insn)
{
basic_block bb = BLOCK_FOR_INSN (insn);
- rtx tmp = insn, end = BB_END (bb);
+ rtx_insn *tmp = insn, *end = BB_END (bb);
int seqno;
insn_t succ = NULL;
succ_iterator si;
/* Find the proper seqno for inserting at INSN. Returns -1 if no predecessors
with positive seqno exist. */
int
-get_seqno_by_preds (rtx insn)
+get_seqno_by_preds (rtx_insn *insn)
{
basic_block bb = BLOCK_FOR_INSN (insn);
- rtx tmp = insn, head = BB_HEAD (bb);
+ rtx_insn *tmp = insn, *head = BB_HEAD (bb);
insn_t *preds;
int n, i, seqno;
/* Return the block which is a fallthru bb of a conditional jump JUMP. */
basic_block
-fallthru_bb_of_jump (rtx jump)
+fallthru_bb_of_jump (const rtx_insn *jump)
{
if (!JUMP_P (jump))
return NULL;
void
clear_outdated_rtx_info (basic_block bb)
{
- rtx insn;
+ rtx_insn *insn;
FOR_BB_INSNS (bb, insn)
if (INSN_P (insn))
new_bb = orig_cfg_hooks.create_basic_block (headp, endp, after);
else
{
- new_bb = create_basic_block_structure ((rtx) headp, (rtx) endp,
+ new_bb = create_basic_block_structure ((rtx_insn *) headp,
+ (rtx_insn *) endp,
new_bb_note, after);
new_bb->aux = NULL;
}
/* Create a new vinsn for INSN_RTX. FORCE_UNIQUE_P is true when the vinsn
must not be clonable. */
vinsn_t
-create_vinsn_from_insn_rtx (rtx insn_rtx, bool force_unique_p)
+create_vinsn_from_insn_rtx (rtx_insn *insn_rtx, bool force_unique_p)
{
gcc_assert (INSN_P (insn_rtx) && !INSN_IN_STREAM_P (insn_rtx));
FOR_EACH_BB_FN (bb, cfun)
{
- if (bb->loop_father && !bb->loop_father->num == 0
+ if (bb->loop_father && bb->loop_father->num != 0
&& !(bb->flags & BB_IRREDUCIBLE_LOOP))
loop_hdr[bb->index] = bb->loop_father->num;
}
preheader_blocks);
}
-rtx_insn *VINSN_INSN_RTX (vinsn_t vi)
-{
- return safe_as_a <rtx_insn *> (vi->insn_rtx);
-}
-
-rtx& SET_VINSN_INSN_RTX (vinsn_t vi)
-{
- return vi->insn_rtx;
-}
-
-rtx_insn *BND_TO (bnd_t bnd)
-{
- return safe_as_a <rtx_insn *> (bnd->to);
-}
-
-insn_t& SET_BND_TO (bnd_t bnd)
-{
- return bnd->to;
-}
-
#endif