[ARM/AArch64][2/2] Crypto intrinsics tuning for Cortex-A53 - pipeline description

[gcc.git] / gcc / simplify-rtx.c

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 791f90dca2b4af38aa12a112a8ef5af8b8cff629..04af01e6ea2420bc0a93326f2c7870176e523f7e 100644 (file)
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -1,5 +1,5 @@
 /* RTL simplification functions for GNU compiler.
-   Copyright (C) 1987-2013 Free Software Foundation, Inc.
+   Copyright (C) 1987-2014 Free Software Foundation, Inc.
 
 This file is part of GCC.
 
@@ -640,11 +640,16 @@ simplify_truncation (enum machine_mode mode, rtx op,
                                   XEXP (op, 0), origmode);
     }
 
-  /* Simplify (truncate:SI (op:DI (x:DI) (y:DI)))
-     to (op:SI (truncate:SI (x:DI)) (truncate:SI (x:DI))).  */
-  if (GET_CODE (op) == PLUS
-      || GET_CODE (op) == MINUS
-      || GET_CODE (op) == MULT)
+  /* If the machine can perform operations in the truncated mode, distribute
+     the truncation, i.e. simplify (truncate:QI (op:SI (x:SI) (y:SI))) into
+     (op:QI (truncate:QI (x:SI)) (truncate:QI (y:SI))).  */
+  if (1
+#ifdef WORD_REGISTER_OPERATIONS
+      && precision >= BITS_PER_WORD
+#endif
+      && (GET_CODE (op) == PLUS
+         || GET_CODE (op) == MINUS
+         || GET_CODE (op) == MULT))
     {
       rtx op0 = simplify_gen_unary (TRUNCATE, mode, XEXP (op, 0), op_mode);
       if (op0)
@@ -1642,7 +1647,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
          break;
 
        case NEG:
-         val = - arg0;
+         val = - (unsigned HOST_WIDE_INT) arg0;
          break;
 
        case ABS:
@@ -1931,17 +1936,13 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
           && SCALAR_FLOAT_MODE_P (mode)
           && SCALAR_FLOAT_MODE_P (GET_MODE (op)))
     {
-      REAL_VALUE_TYPE d, t;
+      REAL_VALUE_TYPE d;
       REAL_VALUE_FROM_CONST_DOUBLE (d, op);
 
       switch (code)
        {
        case SQRT:
-         if (HONOR_SNANS (mode) && real_isnan (&d))
-           return 0;
-         real_sqrt (&t, mode, &d);
-         d = t;
-         break;
+         return 0;
        case ABS:
          d = real_value_abs (&d);
          break;
@@ -4116,15 +4117,15 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
       switch (code)
        {
        case PLUS:
-         val = arg0s + arg1s;
+         val = (unsigned HOST_WIDE_INT) arg0s + arg1s;
          break;
 
        case MINUS:
-         val = arg0s - arg1s;
+         val = (unsigned HOST_WIDE_INT) arg0s - arg1s;
          break;
 
        case MULT:
-         val = arg0s * arg1s;
+         val = (unsigned HOST_WIDE_INT) arg0s * arg1s;
          break;
 
        case DIV: