/* Target hook definitions.
- Copyright (C) 2001-2017 Free Software Foundation, Inc.
+ Copyright (C) 2001-2018 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
DEFHOOKPOD
(byte_op,
"@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_HI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_PSI_OP\n\
@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_SI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_PDI_OP\n\
@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_DI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_PTI_OP\n\
@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_TI_OP\n\
@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_HI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_PSI_OP\n\
@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_SI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_PDI_OP\n\
@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_DI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_PTI_OP\n\
@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_TI_OP\n\
These hooks specify assembly directives for creating certain kinds\n\
of integer object. The @code{TARGET_ASM_BYTE_OP} directive creates a\n\
DEFHOOKPOD (aligned_op, "*", struct asm_int_op, TARGET_ASM_ALIGNED_INT_OP)
DEFHOOKPOD (unaligned_op, "*", struct asm_int_op, TARGET_ASM_UNALIGNED_INT_OP)
-/* The maximum number of bytes to skip when applying
- LABEL_ALIGN_AFTER_BARRIER. */
-DEFHOOK
-(label_align_after_barrier_max_skip,
- "The maximum number of bytes to skip before @var{label} when applying\n\
-@code{LABEL_ALIGN_AFTER_BARRIER}. This works only if\n\
-@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.",
- int, (rtx_insn *label),
- default_label_align_after_barrier_max_skip)
-
-/* The maximum number of bytes to skip when applying
- LOOP_ALIGN. */
-DEFHOOK
-(loop_align_max_skip,
- "The maximum number of bytes to skip when applying @code{LOOP_ALIGN} to\n\
-@var{label}. This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN} is\n\
-defined.",
- int, (rtx_insn *label),
- default_loop_align_max_skip)
-
-/* The maximum number of bytes to skip when applying
- LABEL_ALIGN. */
-DEFHOOK
-(label_align_max_skip,
- "The maximum number of bytes to skip when applying @code{LABEL_ALIGN}\n\
-to @var{label}. This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN}\n\
-is defined.",
- int, (rtx_insn *label),
- default_label_align_max_skip)
-
-/* The maximum number of bytes to skip when applying
- JUMP_ALIGN. */
-DEFHOOK
-(jump_align_max_skip,
- "The maximum number of bytes to skip before @var{label} when applying\n\
-@code{JUMP_ALIGN}. This works only if\n\
-@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.",
- int, (rtx_insn *label),
- default_jump_align_max_skip)
-
/* Try to output the assembler code for an integer object whose
value is given by X. SIZE is the size of the object in bytes and
ALIGNED_P indicates whether it is aligned. Return true if
int, (void),
default_reloc_rw_mask)
+ /* Return a flag for either generating ADDR_DIF_VEC table
+ or ADDR_VEC table for jumps in case of -fPIC/-fPIE. */
+DEFHOOK
+(generate_pic_addr_diff_vec,
+"Return true to generate ADDR_DIF_VEC table\n\
+or false to generate ADDR_VEC table for jumps in case of -fPIC.\n\
+\n\
+The default version of this function returns true if flag_pic\n\
+equals true and false otherwise",
+ bool, (void),
+ default_generate_pic_addr_diff_vec)
+
/* Return a section for EXP. It may be a DECL or a constant. RELOC
is nonzero if runtime relocations must be applied; bit 1 will be
set if the runtime relocations require non-local name resolution.
DEFHOOK
(output_source_filename,
- "Output COFF information or DWARF debugging information which indicates\
- that filename @var{name} is the current source file to the stdio\
- stream @var{file}.\n\
+ "Output DWARF debugging information which indicates that filename\
+ @var{name} is the current source file to the stdio stream @var{file}.\n\
\n\
This target hook need not be defined if the standard form of output\
for the file format in use is appropriate.",
HOOK_VECTOR_END (sched)
-/* Functions relating to OpenMP and Cilk Plus SIMD clones. */
+/* Functions relating to OpenMP SIMD and __attribute__((simd)) clones. */
#undef HOOK_PREFIX
#define HOOK_PREFIX "TARGET_SIMD_CLONE_"
HOOK_VECTOR (TARGET_SIMD_CLONE, simd_clone)
int, (enum vect_cost_for_stmt type_of_cost, tree vectype, int misalign),
default_builtin_vectorization_cost)
+DEFHOOK
+(preferred_vector_alignment,
+ "This hook returns the preferred alignment in bits for accesses to\n\
+vectors of type @var{type} in vectorized code. This might be less than\n\
+or greater than the ABI-defined value returned by\n\
+@code{TARGET_VECTOR_ALIGNMENT}. It can be equal to the alignment of\n\
+a single element, in which case the vectorizer will not try to optimize\n\
+for alignment.\n\
+\n\
+The default hook returns @code{TYPE_ALIGN (@var{type})}, which is\n\
+correct for most targets.",
+ poly_uint64, (const_tree type),
+ default_preferred_vector_alignment)
+
/* Return true if vector alignment is reachable (by peeling N
iterations) for the given scalar type. */
DEFHOOK
bool, (const_tree type, bool is_packed),
default_builtin_vector_alignment_reachable)
-/* Return true if a vector created for vec_perm_const is valid.
- A NULL indicates that all constants are valid permutations. */
DEFHOOK
-(vec_perm_const_ok,
- "Return true if a vector created for @code{vec_perm_const} is valid.",
- bool, (machine_mode, const unsigned char *sel),
+(vec_perm_const,
+ "This hook is used to test whether the target can permute up to two\n\
+vectors of mode @var{mode} using the permutation vector @code{sel}, and\n\
+also to emit such a permutation. In the former case @var{in0}, @var{in1}\n\
+and @var{out} are all null. In the latter case @var{in0} and @var{in1} are\n\
+the source vectors and @var{out} is the destination vector; all three are\n\
+registers of mode @var{mode}. @var{in1} is the same as @var{in0} if\n\
+@var{sel} describes a permutation on one vector instead of two.\n\
+\n\
+Return true if the operation is possible, emitting instructions for it\n\
+if rtxes are provided.\n\
+\n\
+@cindex @code{vec_perm@var{m}} instruction pattern\n\
+If the hook returns false for a mode with multibyte elements, GCC will\n\
+try the equivalent byte operation. If that also fails, it will try forcing\n\
+the selector into a register and using the @var{vec_perm@var{mode}}\n\
+instruction pattern. There is no need for the hook to handle these two\n\
+implementation approaches itself.",
+ bool, (machine_mode mode, rtx output, rtx in0, rtx in1,
+ const vec_perm_indices &sel),
NULL)
/* Return true if the target supports misaligned store/load of a
equal to @code{word_mode}, because the vectorizer can do some\n\
transformations even in absence of specialized @acronym{SIMD} hardware.",
machine_mode,
- (machine_mode mode),
+ (scalar_mode mode),
default_preferred_simd_mode)
+/* Returns the preferred mode for splitting SIMD reductions to. */
+DEFHOOK
+(split_reduction,
+ "This hook should return the preferred mode to split the final reduction\n\
+step on @var{mode} to. The reduction is then carried out reducing upper\n\
+against lower halves of vectors recursively until the specified mode is\n\
+reached. The default is @var{mode} which means no splitting.",
+ machine_mode,
+ (machine_mode),
+ default_split_reduction)
+
/* Returns a mask of vector sizes to iterate over when auto-vectorizing
after processing the preferred one derived from preferred_simd_mode. */
DEFHOOK
(autovectorize_vector_sizes,
- "This hook should return a mask of sizes that should be iterated over\n\
-after trying to autovectorize using the vector size derived from the\n\
-mode returned by @code{TARGET_VECTORIZE_PREFERRED_SIMD_MODE}.\n\
-The default is zero which means to not iterate over other vector sizes.",
- unsigned int,
- (void),
+ "If the mode returned by @code{TARGET_VECTORIZE_PREFERRED_SIMD_MODE} is not\n\
+the only one that is worth considering, this hook should add all suitable\n\
+vector sizes to @var{sizes}, in order of decreasing preference. The first\n\
+one should be the size of @code{TARGET_VECTORIZE_PREFERRED_SIMD_MODE}.\n\
+\n\
+The hook does not need to do anything if the vector returned by\n\
+@code{TARGET_VECTORIZE_PREFERRED_SIMD_MODE} is the only one relevant\n\
+for autovectorization. The default implementation does nothing.",
+ void,
+ (vector_sizes *sizes),
default_autovectorize_vector_sizes)
/* Function to get a target mode for a vector mask. */
DEFHOOK
(get_mask_mode,
- "This hook returns mode to be used for a mask to be used for a vector\n\
-of specified @var{length} with @var{nunits} elements. By default an integer\n\
-vector mode of a proper size is returned.",
- machine_mode,
- (unsigned nunits, unsigned length),
+ "A vector mask is a value that holds one boolean result for every element\n\
+in a vector. This hook returns the machine mode that should be used to\n\
+represent such a mask when the vector in question is @var{length} bytes\n\
+long and contains @var{nunits} elements. The hook returns an empty\n\
+@code{opt_machine_mode} if no such mode exists.\n\
+\n\
+The default implementation returns the mode of an integer vector that\n\
+is @var{length} bytes long and that contains @var{nunits} elements,\n\
+if such a mode exists.",
+ opt_machine_mode,
+ (poly_uint64 nunits, poly_uint64 length),
default_get_mask_mode)
+/* Function to say whether a masked operation is expensive when the
+ mask is all zeros. */
+DEFHOOK
+(empty_mask_is_expensive,
+ "This hook returns true if masked internal function @var{ifn} (really of\n\
+type @code{internal_fn}) should be considered expensive when the mask is\n\
+all zeros. GCC can then try to branch around the instruction instead.",
+ bool,
+ (unsigned ifn),
+ default_empty_mask_is_expensive)
+
/* Target builtin that implements vector gather operation. */
DEFHOOK
(builtin_gather,
#undef HOOK_PREFIX
#define HOOK_PREFIX "TARGET_"
+DEFHOOK
+(preferred_else_value,
+ "This hook returns the target's preferred final argument for a call\n\
+to conditional internal function @var{ifn} (really of type\n\
+@code{internal_fn}). @var{type} specifies the return type of the\n\
+function and @var{ops} are the operands to the conditional operation,\n\
+of which there are @var{nops}.\n\
+\n\
+For example, if @var{ifn} is @code{IFN_COND_ADD}, the hook returns\n\
+a value of type @var{type} that should be used when @samp{@var{ops}[0]}\n\
+and @samp{@var{ops}[1]} are conditionally added together.\n\
+\n\
+This hook is only relevant if the target supports conditional patterns\n\
+like @code{cond_add@var{m}}. The default implementation returns a zero\n\
+constant of type @var{type}.",
+ tree,
+ (unsigned ifn, tree type, unsigned nops, tree *ops),
+ default_preferred_else_value)
+
DEFHOOK
(record_offload_symbol,
"Used when offloaded functions are seen in the compilation unit and no named\n\
DEFHOOK_UNDOC
(eh_return_filter_mode,
"Return machine mode for filter value.",
- machine_mode, (void),
+ scalar_int_mode, (void),
default_eh_return_filter_mode)
/* Return machine mode for libgcc expanded cmp instructions. */
of compare instructions expanded to libgcc calls. If not defined\n\
@code{word_mode} is returned which is the right choice for a majority of\n\
targets.",
- machine_mode, (void),
+ scalar_int_mode, (void),
default_libgcc_cmp_return_mode)
/* Return machine mode for libgcc expanded shift instructions. */
of shift instructions expanded to libgcc calls. If not defined\n\
@code{word_mode} is returned which is the right choice for a majority of\n\
targets.",
- machine_mode, (void),
+ scalar_int_mode, (void),
default_libgcc_shift_count_mode)
/* Return machine mode to be used for _Unwind_Word type. */
(unwind_word_mode,
"Return machine mode to be used for @code{_Unwind_Word} type.\n\
The default is to use @code{word_mode}.",
- machine_mode, (void),
+ scalar_int_mode, (void),
default_unwind_word_mode)
/* Given two decls, merge their attributes and return the result. */
(tree exp, rtx target, rtx subtarget, machine_mode mode, int ignore),
default_expand_builtin)
-DEFHOOK
-(builtin_chkp_function,
- "This hook allows target to redefine built-in functions used by\n\
-Pointer Bounds Checker for code instrumentation. Hook should return\n\
-fndecl of function implementing generic builtin whose code is\n\
-passed in @var{fcode}. Currently following built-in functions are\n\
-obtained using this hook:\n\
-@deftypefn {Built-in Function} __bounds_type __chkp_bndmk (const void *@var{lb}, size_t @var{size})\n\
-Function code - BUILT_IN_CHKP_BNDMK. This built-in function is used\n\
-by Pointer Bounds Checker to create bound values. @var{lb} holds low\n\
-bound of the resulting bounds. @var{size} holds size of created bounds.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} void __chkp_bndstx (const void *@var{ptr}, __bounds_type @var{b}, const void **@var{loc})\n\
-Function code - @code{BUILT_IN_CHKP_BNDSTX}. This built-in function is used\n\
-by Pointer Bounds Checker to store bounds @var{b} for pointer @var{ptr}\n\
-when @var{ptr} is stored by address @var{loc}.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} __bounds_type __chkp_bndldx (const void **@var{loc}, const void *@var{ptr})\n\
-Function code - @code{BUILT_IN_CHKP_BNDLDX}. This built-in function is used\n\
-by Pointer Bounds Checker to get bounds of pointer @var{ptr} loaded by\n\
-address @var{loc}.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} void __chkp_bndcl (const void *@var{ptr}, __bounds_type @var{b})\n\
-Function code - @code{BUILT_IN_CHKP_BNDCL}. This built-in function is used\n\
-by Pointer Bounds Checker to perform check for pointer @var{ptr} against\n\
-lower bound of bounds @var{b}.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} void __chkp_bndcu (const void *@var{ptr}, __bounds_type @var{b})\n\
-Function code - @code{BUILT_IN_CHKP_BNDCU}. This built-in function is used\n\
-by Pointer Bounds Checker to perform check for pointer @var{ptr} against\n\
-upper bound of bounds @var{b}.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} __bounds_type __chkp_bndret (void *@var{ptr})\n\
-Function code - @code{BUILT_IN_CHKP_BNDRET}. This built-in function is used\n\
-by Pointer Bounds Checker to obtain bounds returned by a call statement.\n\
-@var{ptr} passed to built-in is @code{SSA_NAME} returned by the call.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} __bounds_type __chkp_intersect (__bounds_type @var{b1}, __bounds_type @var{b2})\n\
-Function code - @code{BUILT_IN_CHKP_INTERSECT}. This built-in function\n\
-returns intersection of bounds @var{b1} and @var{b2}.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} __bounds_type __chkp_narrow (const void *@var{ptr}, __bounds_type @var{b}, size_t @var{s})\n\
-Function code - @code{BUILT_IN_CHKP_NARROW}. This built-in function\n\
-returns intersection of bounds @var{b} and\n\
-[@var{ptr}, @var{ptr} + @var{s} - @code{1}].\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} size_t __chkp_sizeof (const void *@var{ptr})\n\
-Function code - @code{BUILT_IN_CHKP_SIZEOF}. This built-in function\n\
-returns size of object referenced by @var{ptr}. @var{ptr} is always\n\
-@code{ADDR_EXPR} of @code{VAR_DECL}. This built-in is used by\n\
-Pointer Bounds Checker when bounds of object cannot be computed statically\n\
-(e.g. object has incomplete type).\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} const void *__chkp_extract_lower (__bounds_type @var{b})\n\
-Function code - @code{BUILT_IN_CHKP_EXTRACT_LOWER}. This built-in function\n\
-returns lower bound of bounds @var{b}.\n\
-@end deftypefn\n\
-\n\
-@deftypefn {Built-in Function} const void *__chkp_extract_upper (__bounds_type @var{b})\n\
-Function code - @code{BUILT_IN_CHKP_EXTRACT_UPPER}. This built-in function\n\
-returns upper bound of bounds @var{b}.\n\
-@end deftypefn",
- tree, (unsigned fcode),
- default_builtin_chkp_function)
-
-DEFHOOK
-(chkp_bound_type,
- "Return type to be used for bounds",
- tree, (void),
- default_chkp_bound_type)
-
-DEFHOOK
-(chkp_bound_mode,
- "Return mode to be used for bounds.",
- machine_mode, (void),
- default_chkp_bound_mode)
-
-DEFHOOK
-(chkp_make_bounds_constant,
- "Return constant used to statically initialize constant bounds\n\
-with specified lower bound @var{lb} and upper bounds @var{ub}.",
- tree, (HOST_WIDE_INT lb, HOST_WIDE_INT ub),
- default_chkp_make_bounds_constant)
-
-DEFHOOK
-(chkp_initialize_bounds,
- "Generate a list of statements @var{stmts} to initialize pointer\n\
-bounds variable @var{var} with bounds @var{lb} and @var{ub}. Return\n\
-the number of generated statements.",
- int, (tree var, tree lb, tree ub, tree *stmts),
- default_chkp_initialize_bounds)
-
/* Select a replacement for a target-specific builtin. This is done
*before* regular type checking, and so allows the target to
implement a crude form of function overloading. The result is a
"This hook should return true if @var{x} should not be emitted into\n\
debug sections.",
bool, (rtx x),
- hook_bool_rtx_false)
+ default_const_not_ok_for_debug_p)
/* Given an address RTX, say whether it is valid. */
DEFHOOK
unsigned int, (machine_mode mode),
default_min_divisions_for_recip_mul)
+DEFHOOK
+(truly_noop_truncation,
+ "This hook returns true if it is safe to ``convert'' a value of\n\
+@var{inprec} bits to one of @var{outprec} bits (where @var{outprec} is\n\
+smaller than @var{inprec}) by merely operating on it as if it had only\n\
+@var{outprec} bits. The default returns true unconditionally, which\n\
+is correct for most machines.\n\
+\n\
+If @code{TARGET_MODES_TIEABLE_P} returns false for a pair of modes,\n\
+suboptimal code can result if this hook returns true for the corresponding\n\
+mode sizes. Making this hook return false in such cases may improve things.",
+ bool, (poly_uint64 outprec, poly_uint64 inprec),
+ hook_bool_puint64_puint64_true)
+
/* If the representation of integral MODE is such that values are
always sign-extended to a wider mode MODE_REP then return
SIGN_EXTEND. Return UNKNOWN otherwise. */
Similarly to @code{LOAD_EXTEND_OP} you may return a non-@code{UNKNOWN}\n\
value even if the extension is not performed on certain hard registers\n\
as long as for the @code{REGNO_REG_CLASS} of these hard registers\n\
-@code{CANNOT_CHANGE_MODE_CLASS} returns nonzero.\n\
+@code{TARGET_CAN_CHANGE_MODE_CLASS} returns false.\n\
\n\
Note that @code{TARGET_MODE_REP_EXTENDED} and @code{LOAD_EXTEND_OP}\n\
describe two related properties. If you define\n\
extension.\n\
\n\
In order to enforce the representation of @code{mode},\n\
-@code{TRULY_NOOP_TRUNCATION} should return false when truncating to\n\
+@code{TARGET_TRULY_NOOP_TRUNCATION} should return false when truncating to\n\
@code{mode}.",
- int, (machine_mode mode, machine_mode rep_mode),
+ int, (scalar_int_mode mode, scalar_int_mode rep_mode),
default_mode_rep_extended)
+ DEFHOOK
+(setjmp_preserves_nonvolatile_regs_p,
+ "On some targets, it is assumed that the compiler will spill all pseudos\n\
+ that are live across a call to @code{setjmp}, while other targets treat\n\
+ @code{setjmp} calls as normal function calls.\n\
+ \n\
+ This hook returns false if @code{setjmp} calls do not preserve all\n\
+ non-volatile registers so that gcc that must spill all pseudos that are\n\
+ live across @code{setjmp} calls. Define this to return true if the\n\
+ target does not need to spill all pseudos live across @code{setjmp} calls.\n\
+ The default implementation conservatively assumes all pseudos must be\n\
+ spilled across @code{setjmp} calls.",
+ bool, (void),
+ hook_bool_void_false)
+
/* True if MODE is valid for a pointer in __attribute__((mode("MODE"))). */
DEFHOOK
(valid_pointer_mode,
"Define this to return nonzero if the port can handle pointers\n\
with machine mode @var{mode}. The default version of this\n\
hook returns true for both @code{ptr_mode} and @code{Pmode}.",
- bool, (machine_mode mode),
+ bool, (scalar_int_mode mode),
default_valid_pointer_mode)
/* Disambiguate with errno. */
"Define this to return the machine mode to use for pointers to\n\
@var{address_space} if the target supports named address spaces.\n\
The default version of this hook returns @code{ptr_mode}.",
- machine_mode, (addr_space_t address_space),
+ scalar_int_mode, (addr_space_t address_space),
default_addr_space_pointer_mode)
/* MODE to use for an address in another address space. */
"Define this to return the machine mode to use for addresses in\n\
@var{address_space} if the target supports named address spaces.\n\
The default version of this hook returns @code{Pmode}.",
- machine_mode, (addr_space_t address_space),
+ scalar_int_mode, (addr_space_t address_space),
default_addr_space_address_mode)
/* True if MODE is valid for a pointer in __attribute__((mode("MODE")))
version of this hook returns true for the modes returned by either the\n\
@code{TARGET_ADDR_SPACE_POINTER_MODE} or @code{TARGET_ADDR_SPACE_ADDRESS_MODE}\n\
target hooks for the given address space.",
- bool, (machine_mode mode, addr_space_t as),
+ bool, (scalar_int_mode mode, addr_space_t as),
default_addr_space_valid_pointer_mode)
/* True if an address is a valid memory address to a given named address
#undef HOOK_PREFIX
#define HOOK_PREFIX "TARGET_"
+DEFHOOK
+(static_rtx_alignment,
+ "This hook returns the preferred alignment in bits for a\n\
+statically-allocated rtx, such as a constant pool entry. @var{mode}\n\
+is the mode of the rtx. The default implementation returns\n\
+@samp{GET_MODE_ALIGNMENT (@var{mode})}.",
+ HOST_WIDE_INT, (machine_mode mode),
+ default_static_rtx_alignment)
+
+DEFHOOK
+(constant_alignment,
+ "This hook returns the alignment in bits of a constant that is being\n\
+placed in memory. @var{constant} is the constant and @var{basic_align}\n\
+is the alignment that the object would ordinarily have.\n\
+\n\
+The default definition just returns @var{basic_align}.\n\
+\n\
+The typical use of this hook is to increase alignment for string\n\
+constants to be word aligned so that @code{strcpy} calls that copy\n\
+constants can be done inline. The function\n\
+@code{constant_alignment_word_strings} provides such a definition.",
+ HOST_WIDE_INT, (const_tree constant, HOST_WIDE_INT basic_align),
+ default_constant_alignment)
+
+DEFHOOK
+(translate_mode_attribute,
+ "Define this hook if during mode attribute processing, the port should\n\
+translate machine_mode @var{mode} to another mode. For example, rs6000's\n\
+@code{KFmode}, when it is the same as @code{TFmode}.\n\
+\n\
+The default version of the hook returns that mode that was passed in.",
+ machine_mode, (machine_mode mode),
+ default_translate_mode_attribute)
+
/* True if MODE is valid for the target. By "valid", we mean able to
be manipulated in non-trivial ways. In particular, this means all
the arithmetic is supported. */
required to handle the basic C types (as defined by the port).\n\
Included here are the double-word arithmetic supported by the\n\
code in @file{optabs.c}.",
- bool, (machine_mode mode),
+ bool, (scalar_mode mode),
default_scalar_mode_supported_p)
/* Similarly for vector modes. "Supported" here is less strict. At
HOST_WIDE_INT, (const_tree type),
default_vector_alignment)
+DEFHOOK
+(array_mode,
+ "Return the mode that GCC should use for an array that has\n\
+@var{nelems} elements, with each element having mode @var{mode}.\n\
+Return no mode if the target has no special requirements. In the\n\
+latter case, GCC looks for an integer mode of the appropriate size\n\
+if available and uses BLKmode otherwise. Usually the search for the\n\
+integer mode is limited to @code{MAX_FIXED_MODE_SIZE}, but the\n\
+@code{TARGET_ARRAY_MODE_SUPPORTED_P} hook allows a larger mode to be\n\
+used in specific cases.\n\
+\n\
+The main use of this hook is to specify that an array of vectors should\n\
+also have a vector mode. The default implementation returns no mode.",
+ opt_machine_mode, (machine_mode mode, unsigned HOST_WIDE_INT nelems),
+ hook_optmode_mode_uhwi_none)
+
/* True if we should try to use a scalar mode to represent an array,
overriding the usual MAX_FIXED_MODE limit. */
DEFHOOK
@code{TARGET_SCALAR_MODE_SUPPORTED_P}. The default version of this \n\
hook returns true for all of @code{SFmode}, @code{DFmode}, \n\
@code{XFmode} and @code{TFmode}, if such modes exist.",
- bool, (machine_mode mode),
+ bool, (scalar_float_mode mode),
default_libgcc_floating_mode_supported_p)
DEFHOOK
opt_scalar_float_mode, (int n, bool extended),
default_floatn_mode)
+DEFHOOK
+(floatn_builtin_p,
+ "Define this to return true if the @code{_Float@var{n}} and\n\
+@code{_Float@var{n}x} built-in functions should implicitly enable the\n\
+built-in function without the @code{__builtin_} prefix in addition to the\n\
+normal built-in function with the @code{__builtin_} prefix. The default is\n\
+to only enable built-in functions without the @code{__builtin_} prefix for\n\
+the GNU C langauge. In strict ANSI/ISO mode, the built-in function without\n\
+the @code{__builtin_} prefix is not enabled. The argument @code{FUNC} is the\n\
+@code{enum built_in_function} id of the function to be enabled.",
+ bool, (int func),
+ default_floatn_builtin_p)
+
/* Compute cost of moving data from a register of class FROM to one of
TO, using MODE. */
DEFHOOK
int, (machine_mode mode),
default_compare_by_pieces_branch_ratio)
+DEFHOOK
+(slow_unaligned_access,
+ "This hook returns true if memory accesses described by the\n\
+@var{mode} and @var{alignment} parameters have a cost many times greater\n\
+than aligned accesses, for example if they are emulated in a trap handler.\n\
+This hook is invoked only for unaligned accesses, i.e.@: when\n\
+@code{@var{alignment} < GET_MODE_ALIGNMENT (@var{mode})}.\n\
+\n\
+When this hook returns true, the compiler will act as if\n\
+@code{STRICT_ALIGNMENT} were true when generating code for block\n\
+moves. This can cause significantly more instructions to be produced.\n\
+Therefore, do not make this hook return true if unaligned accesses only\n\
+add a cycle or two to the time for a memory access.\n\
+\n\
+The hook must return true whenever @code{STRICT_ALIGNMENT} is true.\n\
+The default implementation returns @code{STRICT_ALIGNMENT}.",
+ bool, (machine_mode mode, unsigned int align),
+ default_slow_unaligned_access)
+
DEFHOOK
(optab_supported_p,
"Return true if the optimizers should use optab @var{op} with\n\
int, (rtx address, machine_mode mode, addr_space_t as, bool speed),
default_address_cost)
+/* Compute a cost for INSN. */
+DEFHOOK
+(insn_cost,
+ "This target hook describes the relative costs of RTL instructions.\n\
+\n\
+In implementing this hook, you can use the construct\n\
+@code{COSTS_N_INSNS (@var{n})} to specify a cost equal to @var{n} fast\n\
+instructions.\n\
+\n\
+When optimizing for code size, i.e.@: when @code{speed} is\n\
+false, this target hook should be used to estimate the relative\n\
+size cost of an expression, again relative to @code{COSTS_N_INSNS}.",
+ int, (rtx_insn *insn, bool speed), NULL)
+
/* Give a cost, in RTX Costs units, for an edge. Like BRANCH_COST, but with
well defined units. */
DEFHOOK
bool, (rtx_insn *seq, struct noce_if_info *if_info),
default_noce_conversion_profitable_p)
+DEFHOOK
+(estimated_poly_value,
+ "Return an estimate of the runtime value of @var{val}, for use in\n\
+things like cost calculations or profiling frequencies. The default\n\
+implementation returns the lowest possible value of @var{val}.",
+ HOST_WIDE_INT, (poly_int64 val),
+ default_estimated_poly_value)
+
/* Permit speculative instructions in delay slots during delayed-branch
scheduling. */
DEFHOOK
the insn and @var{index} is @code{UNSPEC_INDEX} or @code{UNSPECV_INDEX}.",
void, (const char *label, rtx pattern, int index), NULL)
+DEFHOOK
+(dwarf_poly_indeterminate_value,
+ "Express the value of @code{poly_int} indeterminate @var{i} as a DWARF\n\
+expression, with @var{i} counting from 1. Return the number of a DWARF\n\
+register @var{R} and set @samp{*@var{factor}} and @samp{*@var{offset}} such\n\
+that the value of the indeterminate is:\n\
+@smallexample\n\
+value_of(@var{R}) / @var{factor} - @var{offset}\n\
+@end smallexample\n\
+\n\
+A target only needs to define this hook if it sets\n\
+@samp{NUM_POLY_INT_COEFFS} to a value greater than 1.",
+ unsigned int, (unsigned int i, unsigned int *factor, int *offset),
+ default_dwarf_poly_indeterminate_value)
+
/* ??? Documenting this hook requires a GFDL license grant. */
DEFHOOK_UNDOC
(stdarg_optimize_hook,
bool, (void),
hook_bool_void_true)
+DEFHOOK
+(have_speculation_safe_value,
+"This hook is used to determine the level of target support for\n\
+ @code{__builtin_speculation_safe_value}. If called with an argument\n\
+ of false, it returns true if the target has been modified to support\n\
+ this builtin. If called with an argument of true, it returns true\n\
+ if the target requires active mitigation execution might be speculative.\n\
+ \n\
+ The default implementation returns false if the target does not define\n\
+ a pattern named @code{speculation_barrier}. Else it returns true\n\
+ for the first case and whether the pattern is enabled for the current\n\
+ compilation for the second case.\n\
+ \n\
+ For targets that have no processors that can execute instructions\n\
+ speculatively an alternative implemenation of this hook is available:\n\
+ simply redefine this hook to @code{speculation_safe_value_not_needed}\n\
+ along with your other target hooks.",
+bool, (bool active), default_have_speculation_safe_value)
+
+DEFHOOK
+(speculation_safe_value,
+"This target hook can be used to generate a target-specific code\n\
+ sequence that implements the @code{__builtin_speculation_safe_value}\n\
+ built-in function. The function must always return @var{val} in\n\
+ @var{result} in mode @var{mode} when the cpu is not executing\n\
+ speculatively, but must never return that when speculating until it\n\
+ is known that the speculation will not be unwound. The hook supports\n\
+ two primary mechanisms for implementing the requirements. The first\n\
+ is to emit a speculation barrier which forces the processor to wait\n\
+ until all prior speculative operations have been resolved; the second\n\
+ is to use a target-specific mechanism that can track the speculation\n\
+ state and to return @var{failval} if it can determine that\n\
+ speculation must be unwound at a later time.\n\
+ \n\
+ The default implementation simply copies @var{val} to @var{result} and\n\
+ emits a @code{speculation_barrier} instruction if that is defined.",
+rtx, (machine_mode mode, rtx result, rtx val, rtx failval),
+ default_speculation_safe_value)
+
+
DEFHOOK
(can_use_doloop_p,
"Return true if it is possible to use low-overhead loops (@code{doloop_end}\n\
(cumulative_args_t ca, machine_mode mode, const_tree type, bool named),
default_function_arg_advance)
+DEFHOOK
+(function_arg_offset,
+ "This hook returns the number of bytes to add to the offset of an\n\
+argument of type @var{type} and mode @var{mode} when passed in memory.\n\
+This is needed for the SPU, which passes @code{char} and @code{short}\n\
+arguments in the preferred slot that is in the middle of the quad word\n\
+instead of starting at the top. The default implementation returns 0.",
+ HOST_WIDE_INT, (machine_mode mode, const_tree type),
+ default_function_arg_offset)
+
+DEFHOOK
+(function_arg_padding,
+ "This hook determines whether, and in which direction, to pad out\n\
+an argument of mode @var{mode} and type @var{type}. It returns\n\
+@code{PAD_UPWARD} to insert padding above the argument, @code{PAD_DOWNWARD}\n\
+to insert padding below the argument, or @code{PAD_NONE} to inhibit padding.\n\
+\n\
+The @emph{amount} of padding is not controlled by this hook, but by\n\
+@code{TARGET_FUNCTION_ARG_ROUND_BOUNDARY}. It is always just enough\n\
+to reach the next multiple of that boundary.\n\
+\n\
+This hook has a default definition that is right for most systems.\n\
+For little-endian machines, the default is to pad upward. For\n\
+big-endian machines, the default is to pad downward for an argument of\n\
+constant size shorter than an @code{int}, and upward otherwise.",
+ pad_direction, (machine_mode mode, const_tree type),
+ default_function_arg_padding)
+
/* Return zero if the argument described by the state of CA should
be placed on a stack, or a hard register in which to store the
argument. The values MODE, TYPE, and NAMED describe that
rtx, (const_tree ret_type, const_tree fn_decl_or_type, bool outgoing),
default_function_value)
-/* Return the rtx for bounds of returned pointer. */
-DEFHOOK
-(chkp_function_value_bounds,
- "Define this to return an RTX representing the place where a function\n\
-returns bounds for returned pointers. Arguments meaning is similar to\n\
-@code{TARGET_FUNCTION_VALUE}.",
- rtx, (const_tree ret_type, const_tree fn_decl_or_type, bool outgoing),
- default_chkp_function_value_bounds)
-
/* Return the rtx for the result of a libcall of mode MODE,
calling the function FN_NAME. */
DEFHOOK
DEFHOOKPOD
(custom_function_descriptors,
- "This hook should be defined to a power of 2 if the target will benefit\n\
-from the use of custom descriptors for nested functions instead of the\n\
-standard trampolines. Such descriptors are created at run time on the\n\
-stack and made up of data only, but they are non-standard so the generated\n\
-code must be prepared to deal with them. This hook should be defined to 0\n\
-if the target uses function descriptors for its standard calling sequence,\n\
-like for example HP-PA or IA-64. Using descriptors for nested functions\n\
+ "If the target can use GCC's generic descriptor mechanism for nested\n\
+functions, define this hook to a power of 2 representing an unused bit\n\
+in function pointers which can be used to differentiate descriptors at\n\
+run time. This value gives the number of bytes by which descriptor\n\
+pointers are misaligned compared to function pointers. For example, on\n\
+targets that require functions to be aligned to a 4-byte boundary, a\n\
+value of either 1 or 2 is appropriate unless the architecture already\n\
+reserves the bit for another purpose, such as on ARM.\n\
+\n\
+Define this hook to 0 if the target implements ABI support for\n\
+function descriptors in its standard calling sequence, like for example\n\
+HPPA or IA-64.\n\
+\n\
+Using descriptors for nested functions\n\
eliminates the need for trampolines that reside on the stack and require\n\
-it to be made executable.\n\
-\n\
-The value of the macro is used to parameterize the run-time identification\n\
-scheme implemented to distinguish descriptors from function addresses: it\n\
-gives the number of bytes by which their address is misaligned compared\n\
-with function addresses. The value of 1 will generally work, unless it is\n\
-already reserved by the target for another purpose, like for example on ARM.",\
+it to be made executable.",\
int, -1)
/* Return the number of bytes of its own arguments that a function
nothing (the caller pops all). When this convention is in use,\n\
@var{funtype} is examined to determine whether a function takes a fixed\n\
number of arguments.",
- int, (tree fundecl, tree funtype, int size),
+ poly_int64, (tree fundecl, tree funtype, poly_int64 size),
default_return_pops_args)
/* Return a mode wide enough to copy any function value that might be
"This target hook returns the mode to be used when accessing raw return\
registers in @code{__builtin_return}. Define this macro if the value\
in @var{reg_raw_mode} is not correct.",
- machine_mode, (int regno),
+ fixed_size_mode, (int regno),
default_get_reg_raw_mode)
/* Return a mode wide enough to copy any argument value that might be
"This target hook returns the mode to be used when accessing raw argument\
registers in @code{__builtin_apply_args}. Define this macro if the value\
in @var{reg_raw_mode} is not correct.",
- machine_mode, (int regno),
+ fixed_size_mode, (int regno),
default_get_reg_raw_mode)
+/* Return true if a type is an empty record. */
+DEFHOOK
+(empty_record_p,
+ "This target hook returns true if the type is an empty record. The default\n\
+is to return @code{false}.",
+ bool, (const_tree type),
+ hook_bool_const_tree_false)
+
+/* Warn about the change in empty class parameter passing ABI. */
+DEFHOOK
+(warn_parameter_passing_abi,
+ "This target hook warns about the change in empty class parameter passing\n\
+ABI.",
+ void, (cumulative_args_t ca, tree type),
+ hook_void_CUMULATIVE_ARGS_tree)
+
HOOK_VECTOR_END (calls)
DEFHOOK
tree, (tree type, tree expr),
hook_tree_tree_tree_null)
+DEFHOOK
+(can_change_mode_class,
+ "This hook returns true if it is possible to bitcast values held in\n\
+registers of class @var{rclass} from mode @var{from} to mode @var{to}\n\
+and if doing so preserves the low-order bits that are common to both modes.\n\
+The result is only meaningful if @var{rclass} has registers that can hold\n\
+both @code{from} and @code{to}. The default implementation returns true.\n\
+\n\
+As an example of when such bitcasting is invalid, loading 32-bit integer or\n\
+floating-point objects into floating-point registers on Alpha extends them\n\
+to 64 bits. Therefore loading a 64-bit object and then storing it as a\n\
+32-bit object does not store the low-order 32 bits, as would be the case\n\
+for a normal register. Therefore, @file{alpha.h} defines\n\
+@code{TARGET_CAN_CHANGE_MODE_CLASS} to return:\n\
+\n\
+@smallexample\n\
+(GET_MODE_SIZE (from) == GET_MODE_SIZE (to)\n\
+ || !reg_classes_intersect_p (FLOAT_REGS, rclass))\n\
+@end smallexample\n\
+\n\
+Even if storing from a register in mode @var{to} would be valid,\n\
+if both @var{from} and @code{raw_reg_mode} for @var{rclass} are wider\n\
+than @code{word_mode}, then we must prevent @var{to} narrowing the\n\
+mode. This happens when the middle-end assumes that it can load\n\
+or store pieces of an @var{N}-word pseudo, and that the pseudo will\n\
+eventually be allocated to @var{N} @code{word_mode} hard registers.\n\
+Failure to prevent this kind of mode change will result in the\n\
+entire @code{raw_reg_mode} being modified instead of the partial\n\
+value that the middle-end intended.",
+ bool, (machine_mode from, machine_mode to, reg_class_t rclass),
+ hook_bool_mode_mode_reg_class_t_true)
+
/* Change pseudo allocno class calculated by IRA. */
DEFHOOK
(ira_change_pseudo_allocno_class,
for the cstore being performed. Not definiting this hook is the same\
as accepting the mode encoded into operand 0 of the cstore expander\
patterns.",
- machine_mode, (enum insn_code icode),
+ scalar_int_mode, (enum insn_code icode),
default_cstore_mode)
/* This target hook allows the backend to compute the register pressure
\n\
Scratch operands in memory (constraint @code{\"=m\"} / @code{\"=&m\"}) are\n\
currently not supported. For the time being, you will have to continue\n\
-to use @code{SECONDARY_MEMORY_NEEDED} for that purpose.\n\
+to use @code{TARGET_SECONDARY_MEMORY_NEEDED} for that purpose.\n\
\n\
@code{copy_cost} also uses this target hook to find out how values are\n\
copied. If you want it to include some extra cost for the need to allocate\n\
secondary_reload_info *sri),
default_secondary_reload)
+DEFHOOK
+(secondary_memory_needed,
+ "Certain machines have the property that some registers cannot be copied\n\
+to some other registers without using memory. Define this hook on\n\
+those machines to return true if objects of mode @var{m} in registers\n\
+of @var{class1} can only be copied to registers of class @var{class2} by\n\
+ storing a register of @var{class1} into memory and loading that memory\n\
+location into a register of @var{class2}. The default definition returns\n\
+false for all inputs.",
+ bool, (machine_mode mode, reg_class_t class1, reg_class_t class2),
+ hook_bool_mode_reg_class_t_reg_class_t_false)
+
+DEFHOOK
+(secondary_memory_needed_mode,
+ "If @code{TARGET_SECONDARY_MEMORY_NEEDED} tells the compiler to use memory\n\
+when moving between two particular registers of mode @var{mode},\n\
+this hook specifies the mode that the memory should have.\n\
+\n\
+The default depends on @code{TARGET_LRA_P}. Without LRA, the default\n\
+is to use a word-sized mode for integral modes that are smaller than a\n\
+a word. This is right thing to do on most machines because it ensures\n\
+that all bits of the register are copied and prevents accesses to the\n\
+registers in a narrower mode, which some machines prohibit for\n\
+floating-point registers.\n\
+\n\
+However, this default behavior is not correct on some machines, such as\n\
+the DEC Alpha, that store short integers in floating-point registers\n\
+differently than in integer registers. On those machines, the default\n\
+widening will not work correctly and you must define this hook to\n\
+suppress that widening in some cases. See the file @file{alpha.c} for\n\
+details.\n\
+\n\
+With LRA, the default is to use @var{mode} unmodified.",
+ machine_mode, (machine_mode mode),
+ default_secondary_memory_needed_mode)
+
/* Given an rtx X being reloaded into a reg required to be in class CLASS,
return the class of reg to actually use. */
DEFHOOK
(rtx x, reg_class_t rclass),
default_preferred_output_reload_class)
+DEFHOOK
+(select_early_remat_modes,
+ "On some targets, certain modes cannot be held in registers around a\n\
+standard ABI call and are relatively expensive to spill to the stack.\n\
+The early rematerialization pass can help in such cases by aggressively\n\
+recomputing values after calls, so that they don't need to be spilled.\n\
+\n\
+This hook returns the set of such modes by setting the associated bits\n\
+in @var{modes}. The default implementation selects no modes, which has\n\
+the effect of disabling the early rematerialization pass.",
+ void, (sbitmap modes),
+ default_select_early_remat_modes)
+
DEFHOOK
(class_likely_spilled_p,
"A target hook which returns @code{true} if pseudos that have been assigned\n\
"A target hook returns the maximum number of consecutive registers\n\
of class @var{rclass} needed to hold a value of mode @var{mode}.\n\
\n\
-This is closely related to the macro @code{HARD_REGNO_NREGS}. In fact,\n\
-the value returned by @code{TARGET_CLASS_MAX_NREGS (@var{rclass},\n\
+This is closely related to the macro @code{TARGET_HARD_REGNO_NREGS}.\n\
+In fact, the value returned by @code{TARGET_CLASS_MAX_NREGS (@var{rclass},\n\
@var{mode})} target hook should be the maximum value of\n\
-@code{HARD_REGNO_NREGS (@var{regno}, @var{mode})} for all @var{regno}\n\
+@code{TARGET_HARD_REGNO_NREGS (@var{regno}, @var{mode})} for all @var{regno}\n\
values in the class @var{rclass}.\n\
\n\
This target hook helps control the handling of multiple-word values\n\
displacement addressing. */
DEFHOOK
(legitimize_address_displacement,
- "A target hook which returns @code{true} if *@var{disp} is\n\
-legitimezed to valid address displacement with subtracting *@var{offset}\n\
-at memory mode @var{mode}.\n\
-The default version of this target hook returns @code{false}.\n\
-This hook will benefit machines with limited base plus displacement\n\
-addressing.",
- bool, (rtx *disp, rtx *offset, machine_mode mode),
+ "This hook tries to split address offset @var{orig_offset} into\n\
+two parts: one that should be added to the base address to create\n\
+a local anchor point, and an additional offset that can be applied\n\
+to the anchor to address a value of mode @var{mode}. The idea is that\n\
+the local anchor could be shared by other accesses to nearby locations.\n\
+\n\
+The hook returns true if it succeeds, storing the offset of the\n\
+anchor from the base in @var{offset1} and the offset of the final address\n\
+from the anchor in @var{offset2}. The default implementation returns false.",
+ bool, (rtx *offset1, rtx *offset2, poly_int64 orig_offset, machine_mode mode),
default_legitimize_address_displacement)
/* This target hook allows the backend to perform additional
void, (void),
hook_void_void)
+DEFHOOK
+(hard_regno_nregs,
+ "This hook returns the number of consecutive hard registers, starting\n\
+at register number @var{regno}, required to hold a value of mode\n\
+@var{mode}. This hook must never return zero, even if a register\n\
+cannot hold the requested mode - indicate that with\n\
+@code{TARGET_HARD_REGNO_MODE_OK} and/or\n\
+@code{TARGET_CAN_CHANGE_MODE_CLASS} instead.\n\
+\n\
+The default definition returns the number of words in @var{mode}.",
+ unsigned int, (unsigned int regno, machine_mode mode),
+ default_hard_regno_nregs)
+
+DEFHOOK
+(hard_regno_mode_ok,
+ "This hook returns true if it is permissible to store a value\n\
+of mode @var{mode} in hard register number @var{regno} (or in several\n\
+registers starting with that one). The default definition returns true\n\
+unconditionally.\n\
+\n\
+You need not include code to check for the numbers of fixed registers,\n\
+because the allocation mechanism considers them to be always occupied.\n\
+\n\
+@cindex register pairs\n\
+On some machines, double-precision values must be kept in even/odd\n\
+register pairs. You can implement that by defining this hook to reject\n\
+odd register numbers for such modes.\n\
+\n\
+The minimum requirement for a mode to be OK in a register is that the\n\
+@samp{mov@var{mode}} instruction pattern support moves between the\n\
+register and other hard register in the same class and that moving a\n\
+value into the register and back out not alter it.\n\
+\n\
+Since the same instruction used to move @code{word_mode} will work for\n\
+all narrower integer modes, it is not necessary on any machine for\n\
+this hook to distinguish between these modes, provided you define\n\
+patterns @samp{movhi}, etc., to take advantage of this. This is\n\
+useful because of the interaction between @code{TARGET_HARD_REGNO_MODE_OK}\n\
+and @code{TARGET_MODES_TIEABLE_P}; it is very desirable for all integer\n\
+modes to be tieable.\n\
+\n\
+Many machines have special registers for floating point arithmetic.\n\
+Often people assume that floating point machine modes are allowed only\n\
+in floating point registers. This is not true. Any registers that\n\
+can hold integers can safely @emph{hold} a floating point machine\n\
+mode, whether or not floating arithmetic can be done on it in those\n\
+registers. Integer move instructions can be used to move the values.\n\
+\n\
+On some machines, though, the converse is true: fixed-point machine\n\
+modes may not go in floating registers. This is true if the floating\n\
+registers normalize any value stored in them, because storing a\n\
+non-floating value there would garble it. In this case,\n\
+@code{TARGET_HARD_REGNO_MODE_OK} should reject fixed-point machine modes in\n\
+floating registers. But if the floating registers do not automatically\n\
+normalize, if you can store any bit pattern in one and retrieve it\n\
+unchanged without a trap, then any machine mode may go in a floating\n\
+register, so you can define this hook to say so.\n\
+\n\
+The primary significance of special floating registers is rather that\n\
+they are the registers acceptable in floating point arithmetic\n\
+instructions. However, this is of no concern to\n\
+@code{TARGET_HARD_REGNO_MODE_OK}. You handle it by writing the proper\n\
+constraints for those instructions.\n\
+\n\
+On some machines, the floating registers are especially slow to access,\n\
+so that it is better to store a value in a stack frame than in such a\n\
+register if floating point arithmetic is not being done. As long as the\n\
+floating registers are not in class @code{GENERAL_REGS}, they will not\n\
+be used unless some pattern's constraint asks for one.",
+ bool, (unsigned int regno, machine_mode mode),
+ hook_bool_uint_mode_true)
+
+DEFHOOK
+(modes_tieable_p,
+ "This hook returns true if a value of mode @var{mode1} is accessible\n\
+in mode @var{mode2} without copying.\n\
+\n\
+If @code{TARGET_HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and\n\
+@code{TARGET_HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always\n\
+the same for any @var{r}, then\n\
+@code{TARGET_MODES_TIEABLE_P (@var{mode1}, @var{mode2})}\n\
+should be true. If they differ for any @var{r}, you should define\n\
+this hook to return false unless some other mechanism ensures the\n\
+accessibility of the value in a narrower mode.\n\
+\n\
+You should define this hook to return true in as many cases as\n\
+possible since doing so will allow GCC to perform better register\n\
+allocation. The default definition returns true unconditionally.",
+ bool, (machine_mode mode1, machine_mode mode2),
+ hook_bool_mode_mode_true)
+
/* Return true if is OK to use a hard register REGNO as scratch register
in peephole2. */
DEFHOOK
bool, (unsigned int regno),
default_hard_regno_scratch_ok)
+DEFHOOK
+(hard_regno_call_part_clobbered,
+ "This hook should return true if @var{regno} is partly call-saved and\n\
+partly call-clobbered, and if a value of mode @var{mode} would be partly\n\
+clobbered by a call. For example, if the low 32 bits of @var{regno} are\n\
+preserved across a call but higher bits are clobbered, this hook should\n\
+return true for a 64-bit mode but false for a 32-bit mode.\n\
+\n\
+The default implementation returns false, which is correct\n\
+for targets that don't have partly call-clobbered registers.",
+ bool, (unsigned int regno, machine_mode mode),
+ hook_bool_uint_mode_false)
+
/* Return the smallest number of different values for which it is best to
use a jump-table instead of a tree of conditional branches. */
DEFHOOK
unsigned int, (void),
default_case_values_threshold)
+DEFHOOK
+(starting_frame_offset,
+ "This hook returns the offset from the frame pointer to the first local\n\
+variable slot to be allocated. If @code{FRAME_GROWS_DOWNWARD}, it is the\n\
+offset to @emph{end} of the first slot allocated, otherwise it is the\n\
+offset to @emph{beginning} of the first slot allocated. The default\n\
+implementation returns 0.",
+ HOST_WIDE_INT, (void),
+ hook_hwi_void_0)
+
/* Optional callback to advise the target to compute the frame layout. */
DEFHOOK
(compute_frame_layout,
void, (void),
hook_void_void)
+DEFHOOK
+(stack_clash_protection_alloca_probe_range,
+ "Some targets have an ABI defined interval for which no probing needs to be done.\n\
+When a probe does need to be done this same interval is used as the probe distance \
+up when doing stack clash protection for alloca.\n\
+On such targets this value can be set to override the default probing up interval.\n\
+Define this variable to return nonzero if such a probe range is required or zero otherwise. \
+Defining this hook also requires your functions which make use of alloca to have at least 8 byes\
+of outgoing arguments. If this is not the case the stack will be corrupted.\n\
+You need not define this macro if it would always have the value zero.",
+ HOST_WIDE_INT, (void),
+ default_stack_clash_protection_alloca_probe_range)
+
+
/* Functions specific to the C family of frontends. */
#undef HOOK_PREFIX
#define HOOK_PREFIX "TARGET_C_"
"Set to true if each call that binds to a local definition explicitly\n\
clobbers or sets all non-fixed registers modified by performing the call.\n\
That is, by the call pattern itself, or by code that might be inserted by the\n\
-linker (e.g. stubs, veneers, branch islands), but not including those\n\
+linker (e.g.@: stubs, veneers, branch islands), but not including those\n\
modifiable by the callee. The affected registers may be mentioned explicitly\n\
in the call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE.\n\
The default version of this hook is set to false. The purpose of this hook\n\
enum unwind_info_type, (void),
default_debug_unwind_info)
+DEFHOOK
+(reset_location_view, "\
+This hook, if defined, enables -ginternal-reset-location-views, and\n\
+uses its result to override cases in which the estimated min insn\n\
+length might be nonzero even when a PC advance (i.e., a view reset)\n\
+cannot be taken for granted.\n\
+\n\
+If the hook is defined, it must return a positive value to indicate\n\
+the insn definitely advances the PC, and so the view number can be\n\
+safely assumed to be reset; a negative value to mean the insn\n\
+definitely does not advance the PC, and os the view number must not\n\
+be reset; or zero to decide based on the estimated insn length.\n\
+\n\
+If insn length is to be regarded as reliable, set the hook to\n\
+@code{hook_int_rtx_insn_0}.",
+ int, (rtx_insn *), NULL)
+
/* The code parameter should be of type enum rtx_code but this is not
defined at this time. */
DEFHOOK
DEFHOOKPOD
(atomic_test_and_set_trueval,
"This value should be set if the result written by\
- @code{atomic_test_and_set} is not exactly 1, i.e. the\
+ @code{atomic_test_and_set} is not exactly 1, i.e.@: the\
@code{bool} @code{true}.",
unsigned char, 1)
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