[AArch64][doc] Clarify -msve-vector-bits=128 behaviour

[gcc.git] / gcc / target.def

diff --git a/gcc/target.def b/gcc/target.def
index 4b166d150ca5d9b5efdc31c5be342555a7f9215c..96f37e0462bc7d8c63769abfded19da5f67a136e 100644 (file)
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -45,12 +45,18 @@ DEFHOOKPODX (close_paren, const char *, ")")
 DEFHOOKPOD
 (byte_op,
  "@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_HI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_PSI_OP\n\
 @deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_SI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_PDI_OP\n\
 @deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_DI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_PTI_OP\n\
 @deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_TI_OP\n\
 @deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_HI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_PSI_OP\n\
 @deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_SI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_PDI_OP\n\
 @deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_DI_OP\n\
+@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_PTI_OP\n\
 @deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_TI_OP\n\
 These hooks specify assembly directives for creating certain kinds\n\
 of integer object.  The @code{TARGET_ASM_BYTE_OP} directive creates a\n\
@@ -1802,7 +1808,7 @@ for alignment.\n\
 \n\
 The default hook returns @code{TYPE_ALIGN (@var{type})}, which is\n\
 correct for most targets.",
- HOST_WIDE_INT, (const_tree type),
+ poly_uint64, (const_tree type),
  default_preferred_vector_alignment)
 
 /* Return true if vector alignment is reachable (by peeling N