/* Target hook definitions.
- Copyright (C) 2001-2014 Free Software Foundation, Inc.
+ Copyright (C) 2001-2015 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
"The maximum number of bytes to skip before @var{label} when applying\n\
@code{LABEL_ALIGN_AFTER_BARRIER}. This works only if\n\
@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.",
- int, (rtx label),
+ int, (rtx_insn *label),
default_label_align_after_barrier_max_skip)
/* The maximum number of bytes to skip when applying
"The maximum number of bytes to skip when applying @code{LOOP_ALIGN} to\n\
@var{label}. This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN} is\n\
defined.",
- int, (rtx label),
+ int, (rtx_insn *label),
default_loop_align_max_skip)
/* The maximum number of bytes to skip when applying
"The maximum number of bytes to skip when applying @code{LABEL_ALIGN}\n\
to @var{label}. This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN}\n\
is defined.",
- int, (rtx label),
+ int, (rtx_insn *label),
default_label_align_max_skip)
/* The maximum number of bytes to skip when applying
"The maximum number of bytes to skip before @var{label} when applying\n\
@code{JUMP_ALIGN}. This works only if\n\
@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined.",
- int, (rtx label),
+ int, (rtx_insn *label),
default_jump_align_max_skip)
/* Try to output the assembler code for an integer object whose
bool, (rtx x, unsigned int size, int aligned_p),
default_assemble_integer)
+/* Notify the backend that we have completed emitting the data for a
+ decl. */
+DEFHOOK
+(decl_end,
+ "Define this hook if the target assembler requires a special marker to\n\
+terminate an initialized variable declaration.",
+ void, (void),
+ hook_void_void)
+
/* Output code that will globalize a label. */
DEFHOOK
(globalize_label,
The default implementation uses the TARGET_ASM_GLOBALIZE_LABEL target hook.",
void, (FILE *stream, tree decl), default_globalize_decl_name)
+/* Output code that will declare an external variable. */
+DEFHOOK
+(assemble_undefined_decl,
+ "This target hook is a function to output to the stdio stream\n\
+@var{stream} some commands that will declare the name associated with\n\
+@var{decl} which is not defined in the current translation unit. Most\n\
+assemblers do not require anything to be output in this case.",
+ void, (FILE *stream, const char *name, const_tree decl),
+ hook_void_FILEptr_constcharptr_const_tree)
+
/* Output code that will emit a label for unwind info, if this
target requires such labels. Second argument is the decl the
unwind info is associated with, third is a boolean: true if
"This target hook emits assembly directives required to unwind the\n\
given instruction. This is only used when @code{TARGET_EXCEPT_UNWIND_INFO}\n\
returns @code{UI_TARGET}.",
- void, (FILE *stream, rtx insn),
+ void, (FILE *stream, rtx_insn *insn),
NULL)
DEFHOOKPOD
The default version of this function takes care of putting symbolic\n\
constants in @code{flag_pic} mode in @code{data_section} and everything\n\
else in @code{readonly_data_section}.",
- section *, (enum machine_mode mode, rtx x, unsigned HOST_WIDE_INT align),
+ section *, (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align),
default_select_rtx_section)
/* Select a unique section name for DECL. RELOC is the same as
The contents of this vector are what was used to convert the insn\n\
template into assembler code, so you can change the assembler mode\n\
by checking the contents of the vector.",
- void, (FILE *file, rtx insn, rtx *opvec, int noperands),
+ void, (FILE *file, rtx_insn *insn, rtx *opvec, int noperands),
NULL)
/* Emit the trampoline template. This hook may be NULL. */
DEFHOOK_UNDOC
(print_operand_address,
"",
- void, (FILE *file, rtx addr),
+ void, (FILE *file, machine_mode mode, rtx addr),
default_print_operand_address)
/* Determine whether CODE is a valid punctuation character for the
times of the first and the second insns. If these values are not\n\
acceptable, you could use the hook to modify them too. See also\n\
@pxref{Processor pipeline description}.",
- int, (rtx insn, rtx link, rtx dep_insn, int cost), NULL)
+ int, (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost), NULL)
/* Adjust the priority of an insn as you see fit. Returns the new priority. */
DEFHOOK
execute @var{insn} earlier, reduce the priority to execute @var{insn}\n\
later. Do not define this hook if you do not need to adjust the\n\
scheduling priorities of insns.",
- int, (rtx insn, int priority), NULL)
+ int, (rtx_insn *insn, int priority), NULL)
/* Function which returns the maximum number of insns that can be
scheduled in the same machine cycle. This must be constant
debug output to. @var{verbose} is the verbose level provided by\n\
@option{-fsched-verbose-@var{n}}. @var{insn} is the instruction that\n\
was scheduled.",
- int, (FILE *file, int verbose, rtx insn, int more), NULL)
+ int, (FILE *file, int verbose, rtx_insn *insn, int more), NULL)
/* Initialize machine-dependent scheduling code. */
DEFHOOK
DEFHOOK
(macro_fusion_pair_p,
- "This hook is used to check whether two insns could be macro fused for\n\
-target microarchitecture. If this hook returns true for the given insn pair\n\
-(@var{condgen} and @var{condjmp}), scheduler will put them into a sched\n\
-group, and they will not be scheduled apart.",
- bool, (rtx condgen, rtx condjmp), NULL)
+ "This hook is used to check whether two insns should be macro fused for\n\
+a target microarchitecture. If this hook returns true for the given insn pair\n\
+(@var{prev} and @var{curr}), the scheduler will put them into a sched\n\
+group, and they will not be scheduled apart. The two insns will be either\n\
+two SET insns or a compare and a conditional jump and this hook should\n\
+validate any dependencies needed to fuse the two insns together.",
+ bool, (rtx_insn *prev, rtx_insn *curr), NULL)
/* The following member value is a pointer to a function called
after evaluation forward dependencies of insns in chain given
"The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used\n\
to changed the state as if the insn were scheduled when the new\n\
simulated processor cycle finishes.",
- rtx, (void), NULL)
+ rtx_insn *, (void), NULL)
/* The values of the following two members are pointers to
functions used to simplify the automaton descriptions.
to allow backends make correct judgements.\n\
\n\
The default is that any ready insns can be chosen to be issued.",
- int, (rtx insn, int ready_index), NULL)
+ int, (rtx_insn *insn, int ready_index), NULL)
/* This hook prepares the target for a new round of multipass
scheduling.
DEFHOOK
(first_cycle_multipass_issue,
"This hook is called when multipass scheduling evaluates instruction INSN.",
- void, (void *data, signed char *ready_try, int n_ready, rtx insn,
+ void, (void *data, signed char *ready_try, int n_ready, rtx_insn *insn,
const void *prev_data), NULL)
/* This hook is called when multipass scheduling backtracks from evaluation of
@var{last_clock} and @var{clock} are, respectively, the\n\
processor cycle on which the previous insn has been issued,\n\
and the current processor cycle.",
- int, (FILE *dump, int verbose, rtx insn, int last_clock,
+ int, (FILE *dump, int verbose, rtx_insn *insn, int last_clock,
int clock, int *sort_p),
NULL)
"Given the current cost, @var{cost}, of an insn, @var{insn}, calculate and\
return a new cost based on its relationship to @var{dep_insn} through the\
dependence of weakness @var{dw}. The default is to make no adjustment.",
- int, (rtx insn, int dep_type1, rtx dep_insn, int cost, unsigned int dw), NULL)
+ int, (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn, int cost,
+ unsigned int dw),
+ NULL)
/* The following member value is a pointer to a function called
by the insn scheduler. This hook is called to notify the backend
or @minus{}1, if it doesn't. @var{request} describes the type of requested\n\
speculation. If the return value equals 1 then @var{new_pat} is assigned\n\
the generated speculative pattern.",
- int, (rtx insn, unsigned int dep_status, rtx *new_pat), NULL)
+ int, (rtx_insn *insn, unsigned int dep_status, rtx *new_pat), NULL)
/* The following member value is a pointer to a function called
by the insn scheduler. It should return true if the check instruction
recovery code (a simple check). If @var{mutate_p} is nonzero, then\n\
a pattern for a branchy check corresponding to a simple check denoted by\n\
@var{insn} should be generated. In this case @var{label} can't be null.",
- rtx, (rtx insn, rtx label, unsigned int ds), NULL)
+ rtx, (rtx_insn *insn, rtx_insn *label, unsigned int ds), NULL)
/* The following member value is a pointer to a function that provides
information about the speculation capabilities of the target.
DEFHOOK_UNDOC
(get_insn_spec_ds,
"Return speculation types of instruction @var{insn}.",
- unsigned int, (rtx insn), NULL)
+ unsigned int, (rtx_insn *insn), NULL)
DEFHOOK_UNDOC
(get_insn_checked_ds,
"Return speculation types that are checked for instruction @var{insn}",
- unsigned int, (rtx insn), NULL)
+ unsigned int, (rtx_insn *insn), NULL)
DEFHOOK_UNDOC
(skip_rtx_p,
(dispatch_do,
"This hook is called by Haifa Scheduler. It performs the operation specified\n\
in its second parameter.",
-void, (rtx insn, int x),
-hook_void_rtx_int)
+void, (rtx_insn *insn, int x),
+hook_void_rtx_insn_int)
/* The following member value is a a function that returns true is
dispatch schedling is supported in hardware and condition passed
(dispatch,
"This hook is called by Haifa Scheduler. It returns true if dispatch scheduling\n\
is supported in hardware and the condition specified in the parameter is true.",
-bool, (rtx insn, int x),
-hook_bool_rtx_int_false)
+bool, (rtx_insn *insn, int x),
+hook_bool_rtx_insn_int_false)
DEFHOOKPOD
(exposed_pipeline,
(reassociation_width,
"This hook is called by tree reassociator to determine a level of\n\
parallelism required in output calculations chain.",
-int, (unsigned int opc, enum machine_mode mode),
+int, (unsigned int opc, machine_mode mode),
hook_int_uint_mode_1)
+/* The following member value is a function that returns priority for
+ fusion of each instruction via pointer parameters. */
+DEFHOOK
+(fusion_priority,
+"This hook is called by scheduling fusion pass. It calculates fusion\n\
+priorities for each instruction passed in by parameter. The priorities\n\
+are returned via pointer parameters.\n\
+\n\
+@var{insn} is the instruction whose priorities need to be calculated.\n\
+@var{max_pri} is the maximum priority can be returned in any cases.\n\
+@var{fusion_pri} is the pointer parameter through which @var{insn}'s\n\
+fusion priority should be calculated and returned.\n\
+@var{pri} is the pointer parameter through which @var{insn}'s priority\n\
+should be calculated and returned.\n\
+\n\
+Same @var{fusion_pri} should be returned for instructions which should\n\
+be scheduled together. Different @var{pri} should be returned for\n\
+instructions with same @var{fusion_pri}. @var{fusion_pri} is the major\n\
+sort key, @var{pri} is the minor sort key. All instructions will be\n\
+scheduled according to the two priorities. All priorities calculated\n\
+should be between 0 (exclusive) and @var{max_pri} (inclusive). To avoid\n\
+false dependencies, @var{fusion_pri} of instructions which need to be\n\
+scheduled together should be smaller than @var{fusion_pri} of irrelevant\n\
+instructions.\n\
+\n\
+Given below example:\n\
+\n\
+@smallexample\n\
+ ldr r10, [r1, 4]\n\
+ add r4, r4, r10\n\
+ ldr r15, [r2, 8]\n\
+ sub r5, r5, r15\n\
+ ldr r11, [r1, 0]\n\
+ add r4, r4, r11\n\
+ ldr r16, [r2, 12]\n\
+ sub r5, r5, r16\n\
+@end smallexample\n\
+\n\
+On targets like ARM/AArch64, the two pairs of consecutive loads should be\n\
+merged. Since peephole2 pass can't help in this case unless consecutive\n\
+loads are actually next to each other in instruction flow. That's where\n\
+this scheduling fusion pass works. This hook calculates priority for each\n\
+instruction based on its fustion type, like:\n\
+\n\
+@smallexample\n\
+ ldr r10, [r1, 4] ; fusion_pri=99, pri=96\n\
+ add r4, r4, r10 ; fusion_pri=100, pri=100\n\
+ ldr r15, [r2, 8] ; fusion_pri=98, pri=92\n\
+ sub r5, r5, r15 ; fusion_pri=100, pri=100\n\
+ ldr r11, [r1, 0] ; fusion_pri=99, pri=100\n\
+ add r4, r4, r11 ; fusion_pri=100, pri=100\n\
+ ldr r16, [r2, 12] ; fusion_pri=98, pri=88\n\
+ sub r5, r5, r16 ; fusion_pri=100, pri=100\n\
+@end smallexample\n\
+\n\
+Scheduling fusion pass then sorts all ready to issue instructions according\n\
+to the priorities. As a result, instructions of same fusion type will be\n\
+pushed together in instruction flow, like:\n\
+\n\
+@smallexample\n\
+ ldr r11, [r1, 0]\n\
+ ldr r10, [r1, 4]\n\
+ ldr r15, [r2, 8]\n\
+ ldr r16, [r2, 12]\n\
+ add r4, r4, r10\n\
+ sub r5, r5, r15\n\
+ add r4, r4, r11\n\
+ sub r5, r5, r16\n\
+@end smallexample\n\
+\n\
+Now peephole2 pass can simply merge the two pairs of loads.\n\
+\n\
+Since scheduling fusion pass relies on peephole2 to do real fusion\n\
+work, it is only enabled by default when peephole2 is in effect.\n\
+\n\
+This is firstly introduced on ARM/AArch64 targets, please refer to\n\
+the hook implementation for how different fusion types are supported.",
+void, (rtx_insn *insn, int max_pri, int *fusion_pri, int *pri), NULL)
+
HOOK_VECTOR_END (sched)
/* Functions relating to OpenMP and Cilk Plus SIMD clones. */
HOOK_VECTOR_END (simd_clone)
+/* Functions relating to openacc. */
+#undef HOOK_PREFIX
+#define HOOK_PREFIX "TARGET_GOACC_"
+HOOK_VECTOR (TARGET_GOACC, goacc)
+
+DEFHOOK
+(validate_dims,
+"This hook should check the launch dimensions provided for an OpenACC\n\
+compute region, or routine. Defaulted values are represented as -1\n\
+and non-constant values as 0. The @var{fn_level} is negative for the\n\
+function corresponding to the compute region. For a routine is is the\n\
+outermost level at which partitioned execution may be spawned. It\n\
+should fill in anything that needs to default to non-unity and verify\n\
+non-defaults. Diagnostics should be issued as appropriate. Return\n\
+true, if changes have been made. You must override this hook to\n\
+provide dimensions larger than 1.",
+bool, (tree decl, int *dims, int fn_level),
+default_goacc_validate_dims)
+
+DEFHOOK
+(dim_limit,
+"This hook should return the maximum size of a particular dimension,\n\
+or zero if unbounded.",
+int, (int axis),
+default_goacc_dim_limit)
+
+DEFHOOK
+(fork_join,
+"This hook can be used to convert IFN_GOACC_FORK and IFN_GOACC_JOIN\n\
+function calls to target-specific gimple, or indicate whether they\n\
+should be retained. It is executed during the oacc_device_lower pass.\n\
+It should return true, if the call should be retained. It should\n\
+return false, if it is to be deleted (either because target-specific\n\
+gimple has been inserted before it, or there is no need for it).\n\
+The default hook returns false, if there are no RTL expanders for them.",
+bool, (gcall *call, const int *dims, bool is_fork),
+default_goacc_fork_join)
+
+DEFHOOK
+(reduction,
+"This hook is used by the oacc_transform pass to expand calls to the\n\
+@var{GOACC_REDUCTION} internal function, into a sequence of gimple\n\
+instructions. @var{call} is gimple statement containing the call to\n\
+the function. This hook removes statement @var{call} after the\n\
+expanded sequence has been inserted. This hook is also responsible\n\
+for allocating any storage for reductions when necessary.",
+void, (gcall *call),
+default_goacc_reduction)
+
+HOOK_VECTOR_END (goacc)
+
/* Functions relating to vectorization. */
#undef HOOK_PREFIX
#define HOOK_PREFIX "TARGET_VECTORIZE_"
log2(@var{VS}) @minus{} 1 bits of @var{addr} will be considered.",
tree, (void), NULL)
-/* Returns a code for builtin that realizes vectorized version of
- function, or NULL_TREE if not available. */
+/* Returns a built-in function that realizes the vectorized version of
+ a target-independent function, or NULL_TREE if not available. */
DEFHOOK
(builtin_vectorized_function,
"This hook should return the decl of a function that implements the\n\
-vectorized variant of the builtin function with builtin function code\n\
+vectorized variant of the function with the @code{combined_fn} code\n\
@var{code} or @code{NULL_TREE} if such a function is not available.\n\
-The value of @var{fndecl} is the builtin function declaration. The\n\
+The return type of the vectorized function shall be of vector type\n\
+@var{vec_type_out} and the argument types should be @var{vec_type_in}.",
+ tree, (unsigned code, tree vec_type_out, tree vec_type_in),
+ default_builtin_vectorized_function)
+
+/* Returns a built-in function that realizes the vectorized version of
+ a target-specific function, or NULL_TREE if not available. */
+DEFHOOK
+(builtin_md_vectorized_function,
+ "This hook should return the decl of a function that implements the\n\
+vectorized variant of target built-in function @code{fndecl}. The\n\
return type of the vectorized function shall be of vector type\n\
@var{vec_type_out} and the argument types should be @var{vec_type_in}.",
tree, (tree fndecl, tree vec_type_out, tree vec_type_in),
- default_builtin_vectorized_function)
+ default_builtin_md_vectorized_function)
/* Returns a function declaration for a builtin that realizes the
vector conversion, or NULL_TREE if not available. */
DEFHOOK
(vec_perm_const_ok,
"Return true if a vector created for @code{vec_perm_const} is valid.",
- bool, (enum machine_mode, const unsigned char *sel),
+ bool, (machine_mode, const unsigned char *sel),
NULL)
/* Return true if the target supports misaligned store/load of a
the elements in the vectors should be of type @var{type}. @var{is_packed}\n\
parameter is true if the memory access is defined in a packed struct.",
bool,
- (enum machine_mode mode, const_tree type, int misalignment, bool is_packed),
+ (machine_mode mode, const_tree type, int misalignment, bool is_packed),
default_builtin_support_vector_misalignment)
/* Return the builtin decl needed to load a vector of TYPE. */
mode @var{mode}. The default is\n\
equal to @code{word_mode}, because the vectorizer can do some\n\
transformations even in absence of specialized @acronym{SIMD} hardware.",
- enum machine_mode,
- (enum machine_mode mode),
+ machine_mode,
+ (machine_mode mode),
default_preferred_simd_mode)
/* Returns a mask of vector sizes to iterate over when auto-vectorizing
(void),
default_autovectorize_vector_sizes)
+/* Function to get a target mode for a vector mask. */
+DEFHOOK
+(get_mask_mode,
+ "This hook returns mode to be used for a mask to be used for a vector\n\
+of specified @var{length} with @var{nunits} elements. By default an integer\n\
+vector mode of a proper size is returned.",
+ machine_mode,
+ (unsigned nunits, unsigned length),
+ default_get_mask_mode)
+
/* Target builtin that implements vector gather operation. */
DEFHOOK
(builtin_gather,
(const_tree mem_vectype, const_tree index_type, int scale),
NULL)
+/* Target builtin that implements vector scatter operation. */
+DEFHOOK
+(builtin_scatter,
+"Target builtin that implements vector scatter operation. @var{vectype}\n\
+is the vector type of the store and @var{index_type} is scalar type of\n\
+the index, scaled by @var{scale}.\n\
+The default is @code{NULL_TREE} which means to not vectorize scatter\n\
+stores.",
+ tree,
+ (const_tree vectype, const_tree index_type, int scale),
+ NULL)
+
/* Target function to initialize the cost model for a loop or block. */
DEFHOOK
(init_cost,
#undef HOOK_PREFIX
#define HOOK_PREFIX "TARGET_"
+DEFHOOK
+(record_offload_symbol,
+ "Used when offloaded functions are seen in the compilation unit and no named\n\
+sections are available. It is called once for each symbol that must be\n\
+recorded in the offload function and variable table.",
+ void, (tree),
+ hook_void_tree)
+
+DEFHOOKPOD
+(absolute_biggest_alignment,
+ "If defined, this target hook specifies the absolute biggest alignment\n\
+that a type or variable can have on this machine, otherwise,\n\
+@code{BIGGEST_ALIGNMENT} is used.",
+ HOST_WIDE_INT, BIGGEST_ALIGNMENT)
+
/* Allow target specific overriding of option settings after options have
been changed by an attribute or pragma or when it is reset at the
end of the code affected by an attribute or pragma. */
void, (void),
hook_void_void)
+DEFHOOK
+(offload_options,
+ "Used when writing out the list of options into an LTO file. It should\n\
+translate any relevant target-specific options (such as the ABI in use)\n\
+into one of the @option{-foffload} options that exist as a common interface\n\
+to express such options. It should return a string containing these options,\n\
+separated by spaces, which the caller will free.\n",
+char *, (void), hook_charptr_void_null)
+
DEFHOOK_UNDOC
(eh_return_filter_mode,
"Return machine mode for filter value.",
- enum machine_mode, (void),
+ machine_mode, (void),
default_eh_return_filter_mode)
/* Return machine mode for libgcc expanded cmp instructions. */
of compare instructions expanded to libgcc calls. If not defined\n\
@code{word_mode} is returned which is the right choice for a majority of\n\
targets.",
- enum machine_mode, (void),
+ machine_mode, (void),
default_libgcc_cmp_return_mode)
/* Return machine mode for libgcc expanded shift instructions. */
of shift instructions expanded to libgcc calls. If not defined\n\
@code{word_mode} is returned which is the right choice for a majority of\n\
targets.",
- enum machine_mode, (void),
+ machine_mode, (void),
default_libgcc_shift_count_mode)
/* Return machine mode to be used for _Unwind_Word type. */
(unwind_word_mode,
"Return machine mode to be used for @code{_Unwind_Word} type.\n\
The default is to use @code{word_mode}.",
- enum machine_mode, (void),
+ machine_mode, (void),
default_unwind_word_mode)
/* Given two decls, merge their attributes and return the result. */
DEFHOOKPOD
(attribute_table,
"If defined, this target hook points to an array of @samp{struct\n\
-attribute_spec} (defined in @file{tree.h}) specifying the machine\n\
+attribute_spec} (defined in @file{tree-core.h}) specifying the machine\n\
specific attributes for this target and some of the restrictions on the\n\
entities to which these attributes are applied and the arguments they\n\
take.",
ignored. This function should return the result of the call to the\n\
built-in function.",
rtx,
- (tree exp, rtx target, rtx subtarget, enum machine_mode mode, int ignore),
+ (tree exp, rtx target, rtx subtarget, machine_mode mode, int ignore),
default_expand_builtin)
+DEFHOOK
+(builtin_chkp_function,
+ "This hook allows target to redefine built-in functions used by\n\
+Pointer Bounds Checker for code instrumentation. Hook should return\n\
+fndecl of function implementing generic builtin whose code is\n\
+passed in @var{fcode}. Currently following built-in functions are\n\
+obtained using this hook:\n\
+@deftypefn {Built-in Function} __bounds_type __chkp_bndmk (const void *@var{lb}, size_t @var{size})\n\
+Function code - BUILT_IN_CHKP_BNDMK. This built-in function is used\n\
+by Pointer Bounds Checker to create bound values. @var{lb} holds low\n\
+bound of the resulting bounds. @var{size} holds size of created bounds.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} void __chkp_bndstx (const void *@var{ptr}, __bounds_type @var{b}, const void **@var{loc})\n\
+Function code - @code{BUILT_IN_CHKP_BNDSTX}. This built-in function is used\n\
+by Pointer Bounds Checker to store bounds @var{b} for pointer @var{ptr}\n\
+when @var{ptr} is stored by address @var{loc}.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} __bounds_type __chkp_bndldx (const void **@var{loc}, const void *@var{ptr})\n\
+Function code - @code{BUILT_IN_CHKP_BNDLDX}. This built-in function is used\n\
+by Pointer Bounds Checker to get bounds of pointer @var{ptr} loaded by\n\
+address @var{loc}.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} void __chkp_bndcl (const void *@var{ptr}, __bounds_type @var{b})\n\
+Function code - @code{BUILT_IN_CHKP_BNDCL}. This built-in function is used\n\
+by Pointer Bounds Checker to perform check for pointer @var{ptr} against\n\
+lower bound of bounds @var{b}.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} void __chkp_bndcu (const void *@var{ptr}, __bounds_type @var{b})\n\
+Function code - @code{BUILT_IN_CHKP_BNDCU}. This built-in function is used\n\
+by Pointer Bounds Checker to perform check for pointer @var{ptr} against\n\
+upper bound of bounds @var{b}.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} __bounds_type __chkp_bndret (void *@var{ptr})\n\
+Function code - @code{BUILT_IN_CHKP_BNDRET}. This built-in function is used\n\
+by Pointer Bounds Checker to obtain bounds returned by a call statement.\n\
+@var{ptr} passed to built-in is @code{SSA_NAME} returned by the call.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} __bounds_type __chkp_intersect (__bounds_type @var{b1}, __bounds_type @var{b2})\n\
+Function code - @code{BUILT_IN_CHKP_INTERSECT}. This built-in function\n\
+returns intersection of bounds @var{b1} and @var{b2}.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} __bounds_type __chkp_narrow (const void *@var{ptr}, __bounds_type @var{b}, size_t @var{s})\n\
+Function code - @code{BUILT_IN_CHKP_NARROW}. This built-in function\n\
+returns intersection of bounds @var{b} and\n\
+[@var{ptr}, @var{ptr} + @var{s} - @code{1}].\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} size_t __chkp_sizeof (const void *@var{ptr})\n\
+Function code - @code{BUILT_IN_CHKP_SIZEOF}. This built-in function\n\
+returns size of object referenced by @var{ptr}. @var{ptr} is always\n\
+@code{ADDR_EXPR} of @code{VAR_DECL}. This built-in is used by\n\
+Pointer Bounds Checker when bounds of object cannot be computed statically\n\
+(e.g. object has incomplete type).\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} const void *__chkp_extract_lower (__bounds_type @var{b})\n\
+Function code - @code{BUILT_IN_CHKP_EXTRACT_LOWER}. This built-in function\n\
+returns lower bound of bounds @var{b}.\n\
+@end deftypefn\n\
+\n\
+@deftypefn {Built-in Function} const void *__chkp_extract_upper (__bounds_type @var{b})\n\
+Function code - @code{BUILT_IN_CHKP_EXTRACT_UPPER}. This built-in function\n\
+returns upper bound of bounds @var{b}.\n\
+@end deftypefn",
+ tree, (unsigned fcode),
+ default_builtin_chkp_function)
+
+DEFHOOK
+(chkp_bound_type,
+ "Return type to be used for bounds",
+ tree, (void),
+ default_chkp_bound_type)
+
+DEFHOOK
+(chkp_bound_mode,
+ "Return mode to be used for bounds.",
+ enum machine_mode, (void),
+ default_chkp_bound_mode)
+
+DEFHOOK
+(chkp_make_bounds_constant,
+ "Return constant used to statically initialize constant bounds\n\
+with specified lower bound @var{lb} and upper bounds @var{ub}.",
+ tree, (HOST_WIDE_INT lb, HOST_WIDE_INT ub),
+ default_chkp_make_bounds_constant)
+
+DEFHOOK
+(chkp_initialize_bounds,
+ "Generate a list of statements @var{stmts} to initialize pointer\n\
+bounds variable @var{var} with bounds @var{lb} and @var{ub}. Return\n\
+the number of generated statements.",
+ int, (tree var, tree lb, tree ub, tree *stmts),
+ default_chkp_initialize_bounds)
+
/* Select a replacement for a target-specific builtin. This is done
*before* regular type checking, and so allows the target to
implement a crude form of function overloading. The result is a
tree, (void *decl), NULL)
/* Returns a code for a target-specific builtin that implements
- reciprocal of the function, or NULL_TREE if not available. */
+ reciprocal of a target-specific function, or NULL_TREE if not available. */
DEFHOOK
(builtin_reciprocal,
- "This hook should return the DECL of a function that implements reciprocal of\n\
-the builtin function with builtin function code @var{fn}, or\n\
-@code{NULL_TREE} if such a function is not available. @var{md_fn} is true\n\
-when @var{fn} is a code of a machine-dependent builtin function. When\n\
-@var{sqrt} is true, additional optimizations that apply only to the reciprocal\n\
-of a square root function are performed, and only reciprocals of @code{sqrt}\n\
-function are valid.",
- tree, (unsigned fn, bool md_fn, bool sqrt),
+ "This hook should return the DECL of a function that implements the\n\
+reciprocal of the machine-specific builtin function @var{fndecl}, or\n\
+@code{NULL_TREE} if such a function is not available.",
+ tree, (tree fndecl),
default_builtin_reciprocal)
/* For a vendor-specific TYPE, return a pointer to a statically-allocated
false, if it can't.\
For example, on some targets, certain kinds of branches can't be made to\
follow through a hot/cold partitioning.",
- bool, (const_rtx follower, const_rtx followee),
- hook_bool_const_rtx_const_rtx_true)
+ bool, (const rtx_insn *follower, const rtx_insn *followee),
+ hook_bool_const_rtx_insn_const_rtx_insn_true)
/* Return a register class for which branch target register
optimizations should be applied. */
bool, (void),
default_have_conditional_execution)
+DEFHOOK
+(gen_ccmp_first,
+ "This function prepares to emit a comparison insn for the first compare in a\n\
+ sequence of conditional comparisions. It returns a appropriate @code{CC}\n\
+ for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. The insns to\n\
+ prepare the compare are saved in @var{prep_seq} and the compare insns are\n\
+ saved in @var{gen_seq}. They will be emitted when all the compares in the\n\
+ the conditional comparision are generated without error. @var{code} is\n\
+ the @code{rtx_code} of the compare for @var{op0} and @var{op1}.",
+ rtx, (rtx *prep_seq, rtx *gen_seq, int code, tree op0, tree op1),
+ NULL)
+
+DEFHOOK
+(gen_ccmp_next,
+ "This function prepare to emit a conditional comparison within a sequence of\n\
+ conditional comparisons. It returns a appropriate @code{CC} for passing to\n\
+ @code{gen_ccmp_next} or @code{cbranch_optab}. The insns to prepare the\n\
+ compare are saved in @var{prep_seq} and the compare insns are saved in\n\
+ @var{gen_seq}. They will be emitted when all the compares in the conditional\n\
+ comparision are generated without error. The @var{prev} expression is the\n\
+ result of a prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It\n\
+ may return @code{NULL} if the combination of @var{prev} and this comparison is\n\
+ not supported, otherwise the result must be appropriate for passing to\n\
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is the\n\
+ @code{rtx_code} of the compare for @var{op0} and @var{op1}. @var{bit_code}\n\
+ is @code{AND} or @code{IOR}, which is the op on the two compares.",
+ rtx, (rtx *prep_seq, rtx *gen_seq, rtx prev, int cmp_code, tree op0, tree op1, int bit_code),
+ NULL)
+
/* Return a new value for loop unroll size. */
DEFHOOK
(loop_unroll_adjust,
@var{x} satisfies @code{CONSTANT_P}, so you need not check this.\n\
\n\
The default definition returns true.",
- bool, (enum machine_mode mode, rtx x),
+ bool, (machine_mode mode, rtx x),
hook_bool_mode_rtx_true)
/* True if the constant X cannot be placed in the constant pool. */
from the constant pool instead of spilling and reloading a register\n\
holding the constant. This restriction is often true of addresses\n\
of TLS symbols for various targets.",
- bool, (enum machine_mode mode, rtx x),
+ bool, (machine_mode mode, rtx x),
hook_bool_mode_rtx_false)
DEFHOOK_UNDOC
(cannot_copy_insn_p,
"True if the insn @var{x} cannot be duplicated.",
- bool, (rtx), NULL)
+ bool, (rtx_insn *), NULL)
/* True if X is considered to be commutative. */
DEFHOOK
is safe to omit this hook or make it return @var{x} if it cannot find\n\
a valid way to legitimize the address. But often a machine-dependent\n\
strategy can generate better code.",
- rtx, (rtx x, rtx oldx, enum machine_mode mode),
+ rtx, (rtx x, rtx oldx, machine_mode mode),
default_legitimize_address)
/* Given an address RTX, undo the effects of LEGITIMIZE_ADDRESS. */
\n\
Using the hook is usually simpler because it limits the number of\n\
files that are recompiled when changes are made.",
- bool, (enum machine_mode mode, rtx x, bool strict),
+ bool, (machine_mode mode, rtx x, bool strict),
default_legitimate_address_p)
/* True if the given constant can be put into an object_block. */
of @var{x}.\n\
\n\
The default version returns false for all constants.",
- bool, (enum machine_mode mode, const_rtx x),
+ bool, (machine_mode mode, const_rtx x),
hook_bool_mode_const_rtx_false)
/* True if the given decl can be put into an object_block. */
@code{SHIFT_COUNT_TRUNCATED} is false, and some shift patterns\n\
nevertheless truncate the shift count, you may get better code\n\
by overriding it.",
- unsigned HOST_WIDE_INT, (enum machine_mode mode),
+ unsigned HOST_WIDE_INT, (machine_mode mode),
default_shift_truncation_mask)
/* Return the number of divisions in the given MODE that should be present,
that should be there for GCC to perform the optimization for a variable\n\
of mode @var{mode}. The default implementation returns 3 if the machine\n\
has an instruction for the division, and 2 if it does not.",
- unsigned int, (enum machine_mode mode),
+ unsigned int, (machine_mode mode),
default_min_divisions_for_recip_mul)
/* If the representation of integral MODE is such that values are
In order to enforce the representation of @code{mode},\n\
@code{TRULY_NOOP_TRUNCATION} should return false when truncating to\n\
@code{mode}.",
- int, (enum machine_mode mode, enum machine_mode rep_mode),
+ int, (machine_mode mode, machine_mode rep_mode),
default_mode_rep_extended)
/* True if MODE is valid for a pointer in __attribute__((mode("MODE"))). */
"Define this to return nonzero if the port can handle pointers\n\
with machine mode @var{mode}. The default version of this\n\
hook returns true for both @code{ptr_mode} and @code{Pmode}.",
- bool, (enum machine_mode mode),
+ bool, (machine_mode mode),
default_valid_pointer_mode)
/* Disambiguate with errno. */
(pointer_mode,
"Define this to return the machine mode to use for pointers to\n\
@var{address_space} if the target supports named address spaces.\n\
-The default version of this hook returns @code{ptr_mode} for the\n\
-generic address space only.",
- enum machine_mode, (addr_space_t address_space),
+The default version of this hook returns @code{ptr_mode}.",
+ machine_mode, (addr_space_t address_space),
default_addr_space_pointer_mode)
/* MODE to use for an address in another address space. */
(address_mode,
"Define this to return the machine mode to use for addresses in\n\
@var{address_space} if the target supports named address spaces.\n\
-The default version of this hook returns @code{Pmode} for the\n\
-generic address space only.",
- enum machine_mode, (addr_space_t address_space),
+The default version of this hook returns @code{Pmode}.",
+ machine_mode, (addr_space_t address_space),
default_addr_space_address_mode)
/* True if MODE is valid for a pointer in __attribute__((mode("MODE")))
version of this hook returns true for the modes returned by either the\n\
@code{TARGET_ADDR_SPACE_POINTER_MODE} or @code{TARGET_ADDR_SPACE_ADDRESS_MODE}\n\
target hooks for the given address space.",
- bool, (enum machine_mode mode, addr_space_t as),
+ bool, (machine_mode mode, addr_space_t as),
default_addr_space_valid_pointer_mode)
/* True if an address is a valid memory address to a given named address
finished. This target hook is the same as the\n\
@code{TARGET_LEGITIMATE_ADDRESS_P} target hook, except that it includes\n\
explicit named address space support.",
- bool, (enum machine_mode mode, rtx exp, bool strict, addr_space_t as),
+ bool, (machine_mode mode, rtx exp, bool strict, addr_space_t as),
default_addr_space_legitimate_address_p)
/* Return an updated address to convert an invalid pointer to a named
with mode @var{mode} in the named address space @var{as}. This target\n\
hook is the same as the @code{TARGET_LEGITIMIZE_ADDRESS} target hook,\n\
except that it includes explicit named address space support.",
- rtx, (rtx x, rtx oldx, enum machine_mode mode, addr_space_t as),
+ rtx, (rtx x, rtx oldx, machine_mode mode, addr_space_t as),
default_addr_space_legitimize_address)
/* True if one named address space is a subset of another named address. */
bool, (addr_space_t subset, addr_space_t superset),
default_addr_space_subset_p)
+/* True if 0 is a valid address in the address space, or false if
+ 0 is a NULL in the address space. */
+DEFHOOK
+(zero_address_valid,
+ "Define this to modify the default handling of address 0 for the\n\
+address space. Return true if 0 should be considered a valid address.",
+ bool, (addr_space_t as),
+ default_addr_space_zero_address_valid)
+
/* Function to convert an rtl expression from one address space to another. */
DEFHOOK
(convert,
rtx, (rtx op, tree from_type, tree to_type),
default_addr_space_convert)
+/* Function to encode an address space into dwarf. */
+DEFHOOK
+(debug,
+ "Define this to define how the address space is encoded in dwarf.\n\
+The result is the value to be used with @code{DW_AT_address_class}.",
+ int, (addr_space_t as),
+ default_addr_space_debug)
+
HOOK_VECTOR_END (addr_space)
#undef HOOK_PREFIX
required to handle the basic C types (as defined by the port).\n\
Included here are the double-word arithmetic supported by the\n\
code in @file{optabs.c}.",
- bool, (enum machine_mode mode),
+ bool, (machine_mode mode),
default_scalar_mode_supported_p)
/* Similarly for vector modes. "Supported" here is less strict. At
"Define this to return nonzero if the port is prepared to handle\n\
insns involving vector mode @var{mode}. At the very least, it\n\
must have move patterns for this mode.",
- bool, (enum machine_mode mode),
+ bool, (machine_mode mode),
hook_bool_mode_false)
DEFHOOK
If this hook allows @code{val} to have a scalar mode, then\n\
@code{int8x8x3_t} can have the same mode. GCC can then store\n\
@code{int8x8x3_t}s in registers rather than forcing them onto the stack.",
- bool, (enum machine_mode mode, unsigned HOST_WIDE_INT nelems),
+ bool, (machine_mode mode, unsigned HOST_WIDE_INT nelems),
hook_bool_mode_uhwi_false)
+DEFHOOK
+(libgcc_floating_mode_supported_p,
+ "Define this to return nonzero if libgcc provides support for the \n\
+floating-point mode @var{mode}, which is known to pass \n\
+@code{TARGET_SCALAR_MODE_SUPPORTED_P}. The default version of this \n\
+hook returns true for all of @code{SFmode}, @code{DFmode}, \n\
+@code{XFmode} and @code{TFmode}, if such modes exist.",
+ bool, (machine_mode mode),
+ default_libgcc_floating_mode_supported_p)
+
/* Compute cost of moving data from a register of class FROM to one of
TO, using MODE. */
DEFHOOK
if the @samp{mov@var{m}} pattern's constraints do not allow such copying.\n\
\n\
The default version of this function returns 2.",
- int, (enum machine_mode mode, reg_class_t from, reg_class_t to),
+ int, (machine_mode mode, reg_class_t from, reg_class_t to),
default_register_move_cost)
/* Compute cost of moving registers to/from memory. */
4 is not correct for your machine, use this target hook to add some other\n\
value to the result of that function. The arguments to that function\n\
are the same as to this target hook.",
- int, (enum machine_mode mode, reg_class_t rclass, bool in),
+ int, (machine_mode mode, reg_class_t rclass, bool in),
default_memory_move_cost)
+DEFHOOK
+(use_by_pieces_infrastructure_p,
+ "GCC will attempt several strategies when asked to copy between\n\
+two areas of memory, or to set, clear or store to memory, for example\n\
+when copying a @code{struct}. The @code{by_pieces} infrastructure\n\
+implements such memory operations as a sequence of load, store or move\n\
+insns. Alternate strategies are to expand the\n\
+@code{movmem} or @code{setmem} optabs, to emit a library call, or to emit\n\
+unit-by-unit, loop-based operations.\n\
+\n\
+This target hook should return true if, for a memory operation with a\n\
+given @var{size} and @var{alignment}, using the @code{by_pieces}\n\
+infrastructure is expected to result in better code generation.\n\
+Both @var{size} and @var{alignment} are measured in terms of storage\n\
+units.\n\
+\n\
+The parameter @var{op} is one of: @code{CLEAR_BY_PIECES},\n\
+@code{MOVE_BY_PIECES}, @code{SET_BY_PIECES}, @code{STORE_BY_PIECES}.\n\
+These describe the type of memory operation under consideration.\n\
+\n\
+The parameter @var{speed_p} is true if the code is currently being\n\
+optimized for speed rather than size.\n\
+\n\
+Returning true for higher values of @var{size} can improve code generation\n\
+for speed if the target does not provide an implementation of the\n\
+@code{movmem} or @code{setmem} standard names, if the @code{movmem} or\n\
+@code{setmem} implementation would be more expensive than a sequence of\n\
+insns, or if the overhead of a library call would dominate that of\n\
+the body of the memory operation.\n\
+\n\
+Returning true for higher values of @code{size} may also cause an increase\n\
+in code size, for example where the number of insns emitted to perform a\n\
+move would be greater than that of a library call.",
+ bool, (unsigned HOST_WIDE_INT size, unsigned int alignment,
+ enum by_pieces_operation op, bool speed_p),
+ default_use_by_pieces_infrastructure_p)
+
+DEFHOOK
+(optab_supported_p,
+ "Return true if the optimizers should use optab @var{op} with\n\
+modes @var{mode1} and @var{mode2} for optimization type @var{opt_type}.\n\
+The optab is known to have an associated @file{.md} instruction\n\
+whose C condition is true. @var{mode2} is only meaningful for conversion\n\
+optabs; for direct optabs it is a copy of @var{mode1}.\n\
+\n\
+For example, when called with @var{op} equal to @code{rint_optab} and\n\
+@var{mode1} equal to @code{DFmode}, the hook should say whether the\n\
+optimizers should use optab @code{rintdf2}.\n\
+\n\
+The default hook returns true for all inputs.",
+ bool, (int op, machine_mode mode1, machine_mode mode2,
+ optimization_type opt_type),
+ default_optab_supported_p)
+
/* True for MODE if the target expects that registers in this mode will
be allocated to registers in a small register class. The compiler is
allowed to use registers explicitly used in the rtl as spill registers
that can be performed in some cases. If you do not define this hook\n\
to return a nonzero value when it is required, the compiler will run out\n\
of spill registers and print a fatal error message.",
- bool, (enum machine_mode mode),
+ bool, (machine_mode mode),
hook_bool_mode_false)
/* Register number for a flags register. Only needs to be defined if the
/* Compute a (partial) cost for rtx X. Return true if the complete
cost has been computed, and false if subexpressions should be
scanned. In either case, *TOTAL contains the cost result. */
-/* Note that CODE and OUTER_CODE ought to be RTX_CODE, but that's
+/* Note that OUTER_CODE ought to be RTX_CODE, but that's
not necessarily defined at this point. */
DEFHOOK
(rtx_costs,
either (a) @samp{XEXP (@var{y}, @var{opno}) == @var{x}} or\n\
(b) @samp{XVEC (@var{y}, @var{opno})} contains @var{x}.\n\
\n\
-@var{code} is @var{x}'s expression code---redundant, since it can be\n\
-obtained with @code{GET_CODE (@var{x})}.\n\
+@var{mode} is @var{x}'s machine mode, or for cases like @code{const_int} that\n\
+do not have a mode, the mode in which @var{x} is used.\n\
\n\
In implementing this hook, you can use the construct\n\
@code{COSTS_N_INSNS (@var{n})} to specify a cost equal to @var{n} fast\n\
\n\
The hook returns true when all subexpressions of @var{x} have been\n\
processed, and false when @code{rtx_cost} should recurse.",
- bool, (rtx x, int code, int outer_code, int opno, int *total, bool speed),
- hook_bool_rtx_int_int_int_intp_bool_false)
+ bool, (rtx x, machine_mode mode, int outer_code, int opno, int *total, bool speed),
+ hook_bool_rtx_mode_int_int_intp_bool_false)
/* Compute the cost of X, used as an address. Never called with
invalid addresses. */
should be considered in the definition of this macro. Equivalent costs\n\
should probably only be given to addresses with different numbers of\n\
registers on machines with lots of registers.",
- int, (rtx address, enum machine_mode mode, addr_space_t as, bool speed),
+ int, (rtx address, machine_mode mode, addr_space_t as, bool speed),
default_address_cost)
+/* Permit speculative instructions in delay slots during delayed-branch
+ scheduling. */
+DEFHOOK
+(no_speculation_in_delay_slots_p,
+ "This predicate controls the use of the eager delay slot filler to disallow\n\
+speculatively executed instructions being placed in delay slots. Targets\n\
+such as certain MIPS architectures possess both branches with and without\n\
+delay slots. As the eager delay slot filler can decrease performance,\n\
+disabling it is beneficial when ordinary branches are available. Use of\n\
+delay slot branches filled using the basic filler is often still desirable\n\
+as the delay slot can hide a pipeline bubble.", bool, (void),
+ hook_bool_void_false)
+
/* Return where to allocate pseudo for a given hard register initial value. */
DEFHOOK
(allocate_initial_value,
rtx, (rtx reg),
hook_rtx_rtx_null)
+/* Given a register return the mode of the corresponding DWARF frame
+ register. */
+DEFHOOK
+(dwarf_frame_reg_mode,
+ "Given a register, this hook should return the mode which the\n\
+corresponding Dwarf frame register should have. This is normally\n\
+used to return a smaller mode than the raw mode to prevent call\n\
+clobbered parts of a register altering the frame register size",
+ machine_mode, (int regno),
+ default_dwarf_frame_reg_mode)
+
/* If expand_builtin_init_dwarf_reg_sizes needs to fill in table
entries not corresponding directly to registers below
FIRST_PSEUDO_REGISTER, this hook should generate the necessary
The default version of this hook checks whether the modes are the\n\
same. If they are, it returns that mode. If they are different, it\n\
returns @code{VOIDmode}.",
- enum machine_mode, (enum machine_mode m1, enum machine_mode m2),
+ machine_mode, (machine_mode m1, machine_mode m2),
default_cc_modes_compatible)
/* Do machine-dependent code transformations. Called just before
rtx, (void),
default_builtin_setjmp_frame_value)
-/* This target hook should add STRING_CST trees for any hard regs
- the port wishes to automatically clobber for an asm. */
-DEFHOOK
-(md_asm_clobbers,
- "This target hook should add to @var{clobbers} @code{STRING_CST} trees for\n\
-any hard regs the port wishes to automatically clobber for an asm.\n\
-It should return the result of the last @code{tree_cons} used to add a\n\
-clobber. The @var{outputs}, @var{inputs} and @var{clobber} lists are the\n\
-corresponding parameters to the asm and may be inspected to avoid\n\
-clobbering a register that is an input or output of the asm. You can use\n\
-@code{tree_overlaps_hard_reg_set}, declared in @file{tree.h}, to test\n\
-for overlap with regards to asm-declared registers.",
- tree, (tree outputs, tree inputs, tree clobbers),
- hook_tree_tree_tree_tree_3rd_identity)
+/* This target hook should manipulate the outputs, inputs, constraints,
+ and clobbers the port wishes for pre-processing the asm. */
+DEFHOOK
+(md_asm_adjust,
+ "This target hook may add @dfn{clobbers} to @var{clobbers} and\n\
+@var{clobbered_regs} for any hard regs the port wishes to automatically\n\
+clobber for an asm. The @var{outputs} and @var{inputs} may be inspected\n\
+to avoid clobbering a register that is already used by the asm.\n\
+\n\
+It may modify the @var{outputs}, @var{inputs}, and @var{constraints}\n\
+as necessary for other pre-processing. In this case the return value is\n\
+a sequence of insns to emit after the asm.",
+ rtx_insn *,
+ (vec<rtx>& outputs, vec<rtx>& inputs, vec<const char *>& constraints,
+ vec<rtx>& clobbers, HARD_REG_SET& clobbered_regs),
+ NULL)
/* This target hook allows the backend to specify a calling convention
in the debug information. This function actually returns an
"Perform architecture specific checking of statements gimplified\
from @code{VA_ARG_EXPR}. @var{stmt} is the statement. Returns true if\
the statement doesn't need to be checked for @code{va_list} references.",
- bool, (struct stdarg_info *ai, const_gimple stmt), NULL)
+ bool, (struct stdarg_info *ai, const gimple *stmt), NULL)
/* This target hook allows the operating system to override the DECL
that represents the external variable that contains the stack
the reason why the doloop could not be applied.\n\
By default, the RTL loop optimizer does not use a present doloop pattern for\n\
loops containing function calls or branch on table instructions.",
- const char *, (const_rtx insn),
+ const char *, (const rtx_insn *insn),
default_invalid_within_doloop)
/* Returns true for a legitimate combined insn. */
"Take an instruction in @var{insn} and return @code{false} if the instruction\
is not appropriate as a combination of two or more instructions. The\
default is to accept all instructions.",
- bool, (rtx insn),
- hook_bool_rtx_true)
+ bool, (rtx_insn *insn),
+ hook_bool_rtx_insn_true)
DEFHOOK
(valid_dllimport_attribute_p,
The default is to not promote arguments and return values. You can\n\
also define the hook to @code{default_promote_function_mode_always_promote}\n\
if you would like to apply the same rules given by @code{PROMOTE_MODE}.",
- enum machine_mode, (const_tree type, enum machine_mode mode, int *punsignedp,
+ machine_mode, (const_tree type, machine_mode mode, int *punsignedp,
const_tree funtype, int for_return),
default_promote_function_mode)
to emit adjusting code, you should do it at this point.",
rtx, (tree fndecl, int incoming),
hook_rtx_tree_int_null)
+
+DEFHOOKPOD
+(omit_struct_return_reg,
+ "Normally, when a function returns a structure by memory, the address\n\
+is passed as an invisible pointer argument, but the compiler also\n\
+arranges to return the address from the function like it would a normal\n\
+pointer return value. Define this to true if that behaviour is\n\
+undesirable on your target.",
+ bool, false)
+
DEFHOOK
(return_in_memory,
"This target hook should return a nonzero value to say to return the\n\
The pointer is passed in whatever way is appropriate for passing a pointer\n\
to that type.",
bool,
- (cumulative_args_t cum, enum machine_mode mode, const_tree type, bool named),
+ (cumulative_args_t cum, machine_mode mode, const_tree type, bool named),
hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false)
DEFHOOK
happens for an inline function, which is not actually compiled until the\n\
end of the source file. The hook @code{TARGET_SETUP_INCOMING_VARARGS} should\n\
not generate any instructions in this case.",
- void, (cumulative_args_t args_so_far, enum machine_mode mode, tree type,
+ void, (cumulative_args_t args_so_far, machine_mode mode, tree type,
int *pretend_args_size, int second_time),
default_setup_incoming_varargs)
+DEFHOOK
+(load_bounds_for_arg,
+ "This hook is used by expand pass to emit insn to load bounds of\n\
+@var{arg} passed in @var{slot}. Expand pass uses this hook in case\n\
+bounds of @var{arg} are not passed in register. If @var{slot} is a\n\
+memory, then bounds are loaded as for regular pointer loaded from\n\
+memory. If @var{slot} is not a memory then @var{slot_no} is an integer\n\
+constant holding number of the target dependent special slot which\n\
+should be used to obtain bounds. Hook returns RTX holding loaded bounds.",
+ rtx, (rtx slot, rtx arg, rtx slot_no),
+ default_load_bounds_for_arg)
+
+DEFHOOK
+(store_bounds_for_arg,
+ "This hook is used by expand pass to emit insns to store @var{bounds} of\n\
+@var{arg} passed in @var{slot}. Expand pass uses this hook in case\n\
+@var{bounds} of @var{arg} are not passed in register. If @var{slot} is a\n\
+memory, then @var{bounds} are stored as for regular pointer stored in\n\
+memory. If @var{slot} is not a memory then @var{slot_no} is an integer\n\
+constant holding number of the target dependent special slot which\n\
+should be used to store @var{bounds}.",
+ void, (rtx arg, rtx slot, rtx bounds, rtx slot_no),
+ default_store_bounds_for_arg)
+
+DEFHOOK
+(load_returned_bounds,
+ "This hook is used by expand pass to emit insn to load bounds\n\
+returned by function call in @var{slot}. Hook returns RTX holding\n\
+loaded bounds.",
+ rtx, (rtx slot),
+ default_load_returned_bounds)
+
+DEFHOOK
+(store_returned_bounds,
+ "This hook is used by expand pass to emit insn to store @var{bounds}\n\
+returned by function call into @var{slot}.",
+ void, (rtx slot, rtx bounds),
+ default_store_returned_bounds)
+
+DEFHOOK
+(setup_incoming_vararg_bounds,
+ "Use it to store bounds for anonymous register arguments stored\n\
+into the stack. Arguments meaning is similar to\n\
+@code{TARGET_SETUP_INCOMING_VARARGS}.",
+ void, (cumulative_args_t args_so_far, enum machine_mode mode, tree type,
+ int *pretend_args_size, int second_time),
+ default_setup_incoming_vararg_bounds)
+
+DEFHOOK
+(call_args,
+ "While generating RTL for a function call, this target hook is invoked once\n\
+for each argument passed to the function, either a register returned by\n\
+@code{TARGET_FUNCTION_ARG} or a memory location. It is called just\n\
+before the point where argument registers are stored. The type of the\n\
+function to be called is also passed as the second argument; it is\n\
+@code{NULL_TREE} for libcalls. The @code{TARGET_END_CALL_ARGS} hook is\n\
+invoked just after the code to copy the return reg has been emitted.\n\
+This functionality can be used to perform special setup of call argument\n\
+registers if a target needs it.\n\
+For functions without arguments, the hook is called once with @code{pc_rtx}\n\
+passed instead of an argument register.\n\
+Most ports do not need to implement anything for this hook.",
+ void, (rtx, tree),
+ hook_void_rtx_tree)
+
+DEFHOOK
+(end_call_args,
+ "This target hook is invoked while generating RTL for a function call,\n\
+just after the point where the return reg is copied into a pseudo. It\n\
+signals that all the call argument and return registers for the just\n\
+emitted call are now no longer in use.\n\
+Most ports do not need to implement anything for this hook.",
+ void, (void),
+ hook_void_void)
+
DEFHOOK
(strict_argument_naming,
"Define this hook to return @code{true} if the location where a function\n\
solely in registers. The file @file{expr.h} defines a\n\
definition that is usually appropriate, refer to @file{expr.h} for additional\n\
documentation.",
- bool, (enum machine_mode mode, const_tree type),
+ bool, (machine_mode mode, const_tree type),
must_pass_in_stack_var_size_or_pad)
/* Return true if type TYPE, mode MODE, which is passed by reference,
\n\
The default version of this hook always returns false.",
bool,
- (cumulative_args_t cum, enum machine_mode mode, const_tree type, bool named),
+ (cumulative_args_t cum, machine_mode mode, const_tree type, bool named),
hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false)
/* Return zero for arguments passed entirely on the stack or entirely
@code{TARGET_FUNCTION_ARG} for these arguments should return the first\n\
register to be used by the caller for this argument; likewise\n\
@code{TARGET_FUNCTION_INCOMING_ARG}, for the called function.",
- int, (cumulative_args_t cum, enum machine_mode mode, tree type, bool named),
+ int, (cumulative_args_t cum, machine_mode mode, tree type, bool named),
hook_int_CUMULATIVE_ARGS_mode_tree_bool_0)
/* Update the state in CA to advance past an argument in the
on the stack. The compiler knows how to track the amount of stack space\n\
used for arguments without any special help.",
void,
- (cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named),
+ (cumulative_args_t ca, machine_mode mode, const_tree type, bool named),
default_function_arg_advance)
/* Return zero if the argument described by the state of CA should
register in which to pass the argument, or zero to pass the argument\n\
on the stack.\n\
\n\
+The return value can be a @code{const_int} which means argument is\n\
+passed in a target specific slot with specified number. Target hooks\n\
+should be used to store or load argument in such case. See\n\
+@code{TARGET_STORE_BOUNDS_FOR_ARG} and @code{TARGET_LOAD_BOUNDS_FOR_ARG}\n\
+for more information.\n\
+\n\
The value of the expression can also be a @code{parallel} RTX@. This is\n\
used when an argument is passed in multiple locations. The mode of the\n\
@code{parallel} should be the mode of the entire argument. The\n\
argument, the compiler will abort. If @code{REG_PARM_STACK_SPACE} is\n\
defined, the argument will be computed in the stack and then loaded into\n\
a register.",
- rtx, (cumulative_args_t ca, enum machine_mode mode, const_tree type,
+ rtx, (cumulative_args_t ca, machine_mode mode, const_tree type,
bool named),
default_function_arg)
\n\
If @code{TARGET_FUNCTION_INCOMING_ARG} is not defined,\n\
@code{TARGET_FUNCTION_ARG} serves both purposes.",
- rtx, (cumulative_args_t ca, enum machine_mode mode, const_tree type,
+ rtx, (cumulative_args_t ca, machine_mode mode, const_tree type,
bool named),
default_function_incoming_arg)
"This hook returns the alignment boundary, in bits, of an argument\n\
with the specified mode and type. The default hook returns\n\
@code{PARM_BOUNDARY} for all arguments.",
- unsigned int, (enum machine_mode mode, const_tree type),
+ unsigned int, (machine_mode mode, const_tree type),
default_function_arg_boundary)
DEFHOOK
which is the default value for this hook. You can define this hook to\n\
return a different value if an argument size must be rounded to a larger\n\
value.",
- unsigned int, (enum machine_mode mode, const_tree type),
+ unsigned int, (machine_mode mode, const_tree type),
default_function_arg_round_boundary)
/* Return the diagnostic message string if function without a prototype
rtx, (const_tree ret_type, const_tree fn_decl_or_type, bool outgoing),
default_function_value)
+/* Return the rtx for bounds of returned pointer. */
+DEFHOOK
+(chkp_function_value_bounds,
+ "Define this to return an RTX representing the place where a function\n\
+returns bounds for returned pointers. Arguments meaning is similar to\n\
+@code{TARGET_FUNCTION_VALUE}.",
+ rtx, (const_tree ret_type, const_tree fn_decl_or_type, bool outgoing),
+ default_chkp_function_value_bounds)
+
/* Return the rtx for the result of a libcall of mode MODE,
calling the function FN_NAME. */
DEFHOOK
representing the place where the library function result will be returned.\n\
\n\
If this hook is not defined, then LIBCALL_VALUE will be used.",
- rtx, (enum machine_mode mode, const_rtx fun),
+ rtx, (machine_mode mode, const_rtx fun),
default_libcall_value)
/* Return true if REGNO is a possible register number for
bool, (void),
hook_bool_void_true)
-/* Return an rtx for the static chain for FNDECL. If INCOMING_P is true,
- then it should be for the callee; otherwise for the caller. */
+/* Return an rtx for the static chain for FNDECL_OR_TYPE. If INCOMING_P
+ is true, then it should be for the callee; otherwise for the caller. */
DEFHOOK
(static_chain,
"This hook replaces the use of @code{STATIC_CHAIN_REGNUM} et al for\n\
The variables @code{stack_pointer_rtx}, @code{frame_pointer_rtx}, and\n\
@code{arg_pointer_rtx} will have been initialized and should be used\n\
to refer to those items.",
- rtx, (const_tree fndecl, bool incoming_p),
+ rtx, (const_tree fndecl_or_type, bool incoming_p),
default_static_chain)
/* Fill in the trampoline at MEM with a call to FNDECL and a
"This target hook returns the mode to be used when accessing raw return\
registers in @code{__builtin_return}. Define this macro if the value\
in @var{reg_raw_mode} is not correct.",
- enum machine_mode, (int regno),
+ machine_mode, (int regno),
default_get_reg_raw_mode)
/* Return a mode wide enough to copy any argument value that might be
"This target hook returns the mode to be used when accessing raw argument\
registers in @code{__builtin_apply_args}. Define this macro if the value\
in @var{reg_raw_mode} is not correct.",
- enum machine_mode, (int regno),
+ machine_mode, (int regno),
default_get_reg_raw_mode)
HOOK_VECTOR_END (calls)
+DEFHOOK
+(use_pseudo_pic_reg,
+ "This hook should return 1 in case pseudo register should be created\n\
+for pic_offset_table_rtx during function expand.",
+ bool, (void),
+ hook_bool_void_false)
+
+DEFHOOK
+(init_pic_reg,
+ "Perform a target dependent initialization of pic_offset_table_rtx.\n\
+This hook is called at the start of register allocation.",
+ void, (void),
+ hook_void_void)
+
/* Return the diagnostic message string if conversion from FROMTYPE
to TOTYPE is not allowed, NULL otherwise. */
DEFHOOK
tree, (tree type, tree expr),
hook_tree_tree_tree_null)
+/* Change pseudo allocno class calculated by IRA. */
+DEFHOOK
+(ira_change_pseudo_allocno_class,
+ "A target hook which can change allocno class for given pseudo from\n\
+ allocno class calculated by IRA.\n\
+ \n\
+ The default version of this target hook always returns given class.",
+ reg_class_t, (int, reg_class_t),
+ default_ira_change_pseudo_allocno_class)
+
/* Return true if we use LRA instead of reload. */
DEFHOOK
(lra_p,
pseudos of the given mode and class, or @code{NO_REGS} if only memory\
should be used. Not defining this hook is equivalent to returning\
@code{NO_REGS} for all inputs.",
- reg_class_t, (reg_class_t, enum machine_mode),
+ reg_class_t, (reg_class_t, machine_mode),
NULL)
DEFHOOK
for the cstore being performed. Not definiting this hook is the same\
as accepting the mode encoded into operand 0 of the cstore expander\
patterns.",
- enum machine_mode, (enum insn_code icode),
+ machine_mode, (enum insn_code icode),
default_cstore_mode)
/* True if a structure, union or array with MODE containing FIELD should
retain the field's mode.\n\
\n\
Normally, this is not needed.",
- bool, (const_tree field, enum machine_mode mode),
+ bool, (const_tree field, machine_mode mode),
default_member_type_forces_blk)
/* Return the class for a secondary reload, and fill in extra information. */
of the individual moves due to expected fortuitous scheduling and/or special\n\
forwarding logic, you can set @code{sri->extra_cost} to a negative amount.",
reg_class_t,
- (bool in_p, rtx x, reg_class_t reload_class, enum machine_mode reload_mode,
+ (bool in_p, rtx x, reg_class_t reload_class, machine_mode reload_mode,
secondary_reload_info *sri),
default_secondary_reload)
\n\
The default version of this target hook returns the size of @var{mode}\n\
in words.",
- unsigned char, (reg_class_t rclass, enum machine_mode mode),
+ unsigned char, (reg_class_t rclass, machine_mode mode),
default_class_max_nregs)
DEFHOOK
reg_class_t, (reg_class_t rclass),
default_preferred_rename_class)
+/* This target hook allows the backend to avoid unsafe substitution
+ during register allocation. */
+DEFHOOK
+(cannot_substitute_mem_equiv_p,
+ "A target hook which returns @code{true} if @var{subst} can't\n\
+substitute safely pseudos with equivalent memory values during\n\
+register allocation.\n\
+The default version of this target hook returns @code{false}.\n\
+On most machines, this default should be used. For generally\n\
+machines with non orthogonal register usage for addressing, such\n\
+as SH, this hook can be used to avoid excessive spilling.",
+ bool, (rtx subst),
+ hook_bool_rtx_false)
+
+/* This target hook allows the backend to legitimize base plus
+ displacement addressing. */
+DEFHOOK
+(legitimize_address_displacement,
+ "A target hook which returns @code{true} if *@var{disp} is\n\
+legitimezed to valid address displacement with subtracting *@var{offset}\n\
+at memory mode @var{mode}.\n\
+The default version of this target hook returns @code{false}.\n\
+This hook will benefit machines with limited base plus displacement\n\
+addressing.",
+ bool, (rtx *disp, rtx *offset, machine_mode mode),
+ default_legitimize_address_displacement)
+
/* This target hook allows the backend to perform additional
processing while initializing for variable expansion. */
DEFHOOK
(mode_for_suffix,
"Return machine mode for non-standard constant literal suffix @var{c},\
or VOIDmode if non-standard suffixes are unsupported.",
- enum machine_mode, (char c),
+ machine_mode, (char c),
default_mode_for_suffix)
HOOK_VECTOR_END (c)
function-specific options to the @code{struct gcc_options} structure.",
void, (struct gcc_options *opts, struct cl_target_option *ptr), NULL)
+/* Function to update target-specific option information after being
+ streamed in. */
+DEFHOOK
+(post_stream_in,
+ "This hook is called to update target-specific information in the\n\
+@code{struct cl_target_option} structure after it is streamed in from\n\
+LTO bytecode.",
+ void, (struct cl_target_option *ptr), NULL)
+
/* Function to print any extra target state from the target options
structure. */
DEFHOOK
bool, (tree caller, tree callee),
default_target_can_inline_p)
+DEFHOOK
+(relayout_function,
+"This target hook fixes function @var{fndecl} after attributes are processed. Default does nothing. On ARM, the default function's alignment is updated with the attribute target.",
+ void, (tree fndecl),
+ hook_void_tree)
+
HOOK_VECTOR_END (target_option)
/* For targets that need to mark extra registers as live on entry to
modifiable by the callee. The affected registers may be mentioned explicitly\n\
in the call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE.\n\
The default version of this hook is set to false. The purpose of this hook\n\
-is to enable the fuse-caller-save optimization.",
+is to enable the fipa-ra optimization.",
bool,
false)
"If defined, this function returns an appropriate alignment in bits for an\
atomic object of machine_mode @var{mode}. If 0 is returned then the\
default alignment for the specified mode is used. ",
- unsigned int, (enum machine_mode mode),
+ unsigned int, (machine_mode mode),
hook_uint_mode_0)
DEFHOOK
this to be done. The default is false.",
bool, false)
-/* True if the target is allowed to reorder memory accesses unless
- synchronization is explicitly requested. */
-DEFHOOKPOD
-(relaxed_ordering,
- "If set to @code{true}, means that the target's memory model does not\n\
-guarantee that loads which do not depend on one another will access\n\
-main memory in the order of the instruction stream; if ordering is\n\
-important, an explicit memory barrier must be used. This is true of\n\
-many recent processors which implement a policy of ``relaxed,''\n\
-``weak,'' or ``release'' memory consistency, such as Alpha, PowerPC,\n\
-and ia64. The default is @code{false}.",
- bool, false)
-
/* Returns true if we should generate exception tables for use with the
ARM EABI. The effects the encoding of function exception specifications. */
DEFHOOKPOD
bool, false)
DEFHOOKPOD
-(delay_sched2, "True if sched2 is not to be run at its normal place. \
+(delay_sched2, "True if sched2 is not to be run at its normal place.\n\
This usually means it will be run as part of machine-specific reorg.",
bool, false)
DEFHOOKPOD
-(delay_vartrack, "True if vartrack is not to be run at its normal place. \
+(delay_vartrack, "True if vartrack is not to be run at its normal place.\n\
This usually means it will be run as part of machine-specific reorg.",
bool, false)
+DEFHOOKPOD
+(no_register_allocation, "True if register allocation and the passes\n\
+following it should not be run. Usually true only for virtual assembler\n\
+targets.",
+bool, false)
+
/* Leave the boolean fields at the end. */
/* Functions related to mode switching. */
DEFHOOK
(needed,
"@var{entity} is an integer specifying a mode-switched entity. If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to return an integer value not larger than the corresponding element in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must be switched into prior to the execution of @var{insn}.",
- int, (int entity, rtx insn), NULL)
+ int, (int entity, rtx_insn *insn), NULL)
DEFHOOK
(after,
"@var{entity} is an integer specifying a mode-switched entity. If this macro is defined, it is evaluated for every @var{insn} during mode switching. It determines the mode that an insn results in (if different from the incoming mode).",
- int, (int entity, int mode, rtx insn), NULL)
+ int, (int entity, int mode, rtx_insn *insn), NULL)
DEFHOOK
(entry,
HOOK_VECTOR_END (mode_switching)
+#undef HOOK_PREFIX
+#define HOOK_PREFIX "TARGET_"
+
+#define DEF_TARGET_INSN(NAME, PROTO) \
+ DEFHOOK_UNDOC (have_##NAME, "", bool, (void), false)
+#include "target-insns.def"
+#undef DEF_TARGET_INSN
+
+#define DEF_TARGET_INSN(NAME, PROTO) \
+ DEFHOOK_UNDOC (gen_##NAME, "", rtx_insn *, PROTO, NULL)
+#include "target-insns.def"
+#undef DEF_TARGET_INSN
+
+#define DEF_TARGET_INSN(NAME, PROTO) \
+ DEFHOOKPOD (code_for_##NAME, "*", enum insn_code, CODE_FOR_nothing)
+#include "target-insns.def"
+#undef DEF_TARGET_INSN
+
/* Close the 'struct gcc_target' definition. */
HOOK_VECTOR_END (C90_EMPTY_HACK)
projects / gcc.git / blobdiff