+2020-10-05 Nathan Sidwell <nathan@acm.org>
+
+ * c-c++-common/spellcheck-reserved.c: Restore diagnostic.
+
+2020-10-04 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/97272
+ * gfortran.dg/pr97272.f90: New test.
+
+2020-10-03 Jan Hubicka <jh@suse.cz>
+
+ * gcc.dg/tree-ssa/modref-3.c: New test.
+
+2020-10-02 Nathan Sidwell <nathan@acm.org>
+
+ * c-c++-common/spellcheck-reserved.c: Adjust diagnostic.
+ * g++.dg/spellcheck-typenames.C: Adjust diagnostic.
+
+2020-10-02 Nathan Sidwell <nathan@acm.org>
+
+ * g++.dg/inherit/pr97268.C: New.
+
+2020-10-02 Martin Jambor <mjambor@suse.cz>
+
+ * gcc.dg/ipa/ipcp-loophint-1.c: New test.
+
+2020-10-02 Joe Ramsay <Joe.Ramsay@arm.com>
+
+ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Add test for mismatched
+ width of scalar argument.
+ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
+
+2020-10-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/arm/armv8_2-fp16-arith-2.c (float16_t): Use _Float16_t
+ rather than __fp16.
+ (float16x4_t, float16x4_t): Likewise.
+ (fp16_abs): Use __builtin_fabsf16.
+
+2020-10-02 Alex Coplan <alex.coplan@arm.com>
+
+ * gcc.target/aarch64/extend-syntax.c: Fix assembler checks for
+ ilp32, disable check-function-bodies on ilp32.
+ * gcc.target/aarch64/subsp.c: Only check second scan-assembler
+ on lp64 since the code on ilp32 is missing the optimization
+ needed for this test to pass.
+
+2020-10-02 Jason Merril <jason@redhat.com>
+
+ * g++.dg/pr94314.C: new/delete no longer omitted.
+
+2020-10-02 Richard Biener <rguenther@suse.de>
+
+ * g++.dg/tree-ssa/pta-delete-1.C: New testcase.
+
+2020-10-01 Richard Sandiford <richard.sandiford@arm.com>
+
+ * lib/target-supports.exp (check_effective_target_vect_cond_mixed): Add
+ arm neon targets.
+ * gcc.target/arm/neon-compare-1.c: New test.
+ * gcc.target/arm/neon-compare-2.c: Likewise.
+ * gcc.target/arm/neon-compare-3.c: Likewise.
+ * gcc.target/arm/neon-compare-4.c: Likewise.
+ * gcc.target/arm/neon-compare-5.c: Likewise.
+ * gcc.target/arm/neon-vcond-gt.c: Expect comparisons with zero.
+ * gcc.target/arm/neon-vcond-ltgt.c: Likewise.
+ * gcc.target/arm/neon-vcond-unordered.c: Likewise.
+
+2020-10-01 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/movtf_1.c: Restrict the asm matching to lp64.
+ * gcc.target/aarch64/movti_1.c: Likewise.
+
+2020-10-01 Andrea Corallo <andrea.corallo@arm.com>
+
+ PR target/96375
+ * gcc.target/arm/lob1.c: Fix missing flag.
+ * gcc.target/arm/lob2.c: Likewise.
+ * gcc.target/arm/lob3.c: Likewise.
+ * gcc.target/arm/lob4.c: Likewise.
+ * gcc.target/arm/lob5.c: Likewise.
+ * gcc.target/arm/lob6.c: Likewise.
+ * lib/target-supports.exp
+ (check_effective_target_arm_v8_1_lob_ok): Return 1 only for
+ cortex-m targets, add '-mthumb' flag.
+
+2020-10-01 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97236
+ * gcc.dg/vect/pr97236.c: New testcase.
+
+2020-10-01 Jan Hubicka <jh@suse.cz>
+
+ PR ipa/97243
+ * gcc.c-torture/compile/pr97243.c: New test.
+
+2020-10-01 Jan Hubicka <jh@suse.cz>
+
+ PR ipa/97244
+ * gcc.dg/ipa/remref-2a.c: Add -fno-ipa-modref
+
+2020-10-01 Tom de Vries <tdevries@suse.de>
+
+ * gcc.dg/pr94600-1.c: Force 32-bit alignment for a0 for !non_strict_align
+ targets. Remove target clauses from scan tests.
+ * gcc.dg/pr94600-3.c: Same.
+
+2020-10-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/96994
+ * g++.dg/cpp2a/consteval18.C: New test.
+
+2020-10-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/97195
+ * g++.dg/cpp2a/constexpr-new14.C: New test.
+
+2020-10-01 Richard Biener <rguenther@suse.de>
+
+ * g++.dg/vect/pr97255.cc: New testcase.
+
+2020-10-01 Florian Weimer <fweimer@redhat.com>
+
+ PR target/97250
+ * gcc.target/i386/x86-64-v2.c: New test.
+ * gcc.target/i386/x86-64-v3.c: New test.
+ * gcc.target/i386/x86-64-v3-haswell.c: New test.
+ * gcc.target/i386/x86-64-v3-skylake.c: New test.
+ * gcc.target/i386/x86-64-v4.c: New test.
+
+2020-10-01 Marek Polacek <polacek@redhat.com>
+
+ PR c++/90210
+ * g++.dg/cpp1z/class-deduction73.C: New test.
+
+2020-09-30 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97189
+ * gcc.dg/attr-access-2.c: Adjust caret location.
+ * gcc.dg/Wvla-parameter-6.c: New test.
+ * gcc.dg/Wvla-parameter-7.c: New test.
+
+2020-09-30 Martin Sebor <msebor@redhat.com>
+
+ PR c/97206
+ * gcc.dg/Warray-parameter-7.c: New test.
+ * gcc.dg/Warray-parameter-8.c: New test.
+ * gcc.dg/Wvla-parameter-5.c: New test.
+
+2020-09-30 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/96827
+ * gcc.target/i386/pr96827.c: New test.
+
+2020-09-30 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/94595
+ * gcc.target/arm/thumb2-cond-cmp-1.c: Skip if arm_cortex_m.
+ * gcc.target/arm/thumb2-cond-cmp-2.c: Skip if arm_cortex_m.
+ * gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
+ * gcc.target/arm/thumb2-cond-cmp-4.c: Skip if arm_cortex_m.
+
+2020-09-30 Richard Biener <rguenther@suse.de>
+
+ * gcc.dg/vect/pr37027.c: Amend.
+ * gcc.dg/vect/pr67790.c: Likewise.
+ * gcc.dg/vect/pr92324-4.c: Likewise.
+ * gcc.dg/vect/pr92558.c: Likewise.
+ * gcc.dg/vect/pr95495.c: Likewise.
+ * gcc.dg/vect/slp-reduc-1.c: Likewise.
+ * gcc.dg/vect/slp-reduc-2.c: Likewise.
+ * gcc.dg/vect/slp-reduc-3.c: Likewise.
+ * gcc.dg/vect/slp-reduc-4.c: Likewise.
+ * gcc.dg/vect/slp-reduc-5.c: Likewise.
+ * gcc.dg/vect/slp-reduc-7.c: Likewise.
+ * gcc.dg/vect/vect-reduc-in-order-4.c: Likewise.
+
+2020-09-30 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ PR target/96795
+ * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: New Test.
+ * gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Likewise.
+
+2020-09-30 Joel Hutton <joel.hutton@arm.com>
+
+ PR target/96837
+ * gcc.dg/vect/bb-slp-49.c: New test.
+
+2020-09-30 Tobias Burnus <tobias@codesourcery.com>
+
+ PR fortran/97242
+ * gfortran.dg/contiguous_11.f90: New test.
+ * gfortran.dg/contiguous_4.f90: Update.
+ * gfortran.dg/contiguous_7.f90: Update.
+
+2020-09-30 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/97045
+ * gfortran.dg/select_type_50.f90 : New test.
+
+2020-09-30 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/97184
+ * gcc.target/i386/movdir64b.c: New test.
+ * gcc.target/i386/movdiri32.c: Likewise.
+ * gcc.target/i386/movdiri64.c: Likewise.
+ * lib/target-supports.exp (check_effective_target_movdir): New.
+
+2020-09-30 Tom de Vries <tdevries@suse.de>
+
+ * gcc.dg/pr94600-1.c: Use effective target
+ (non_strict_align || pcc_bitfield_type_matters).
+ * gcc.dg/pr94600-3.c: Same.
+
+2020-09-30 Jakub Jelinek <jakub@redhat.com>
+
+ * gcc.target/i386/amxint8-dpbssd-2.c: Require effective targets
+ amx_tile and amx_int8.
+ * gcc.target/i386/amxint8-dpbsud-2.c: Likewise.
+ * gcc.target/i386/amxint8-dpbusd-2.c: Likewise.
+ * gcc.target/i386/amxint8-dpbuud-2.c: Likewise.
+ * gcc.target/i386/amxbf16-dpbf16ps-2.c: Require effective targets
+ amx_tile and amx_bf16.
+ * gcc.target/i386/amxtile-2.c: Require effective target amx_tile.
+
+2020-09-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/97150
+ * gcc.target/aarch64/pr97150.c: New test.
+
+2020-09-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/96313
+ * gcc.target/aarch64/pr96313.c: New test.
+ * gcc.target/aarch64/scalar_intrinsics.c (test_vqmovunh_s16):
+ Adjust return type.
+ (test_vqmovuns_s32): Likewise.
+ (test_vqmovund_s64): Likewise.
+
+2020-09-30 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/movtf_1.c: New test.
+ * gcc.target/aarch64/movti_1.c: Likewise.
+
+2020-09-29 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/97188
+ * gcc.dg/Wstringop-overflow-23.c: Adjust text of expected warnings.
+ * gcc.dg/Wnonnull-4.c: New test.
+
+2020-09-29 Marek Polacek <polacek@redhat.com>
+
+ PR c++/94695
+ * g++.dg/warn/Wrange-loop-construct.C: New test.
+
+2020-09-29 David Edelsohn <dje.gcc@gmail.com>
+
+ * g++.dg/debug/dwarf2/align-1.C: Remove AIX XFAIL.
+ * g++.dg/debug/dwarf2/align-2.C: Same.
+ * g++.dg/debug/dwarf2/align-3.C: Same.
+ * g++.dg/debug/dwarf2/align-4.C: Same.
+ * g++.dg/debug/dwarf2/align-5.C: Same.
+ * g++.dg/debug/dwarf2/align-6.C: Same.
+ * g++.dg/debug/dwarf2/defaulted-member-function-1.C: Same.
+ * g++.dg/debug/dwarf2/defaulted-member-function-2.C: Same.
+ * g++.dg/debug/dwarf2/defaulted-member-function-3.C: Same.
+ * g++.dg/debug/dwarf2/inline-var-1.C: Same.
+ * g++.dg/debug/dwarf2/inline-var-2.C: Same.
+ * g++.dg/debug/dwarf2/inline-var-3.C: Same.
+ * g++.dg/debug/dwarf2/noreturn-function.C: Same.
+ * g++.dg/debug/dwarf2/ptrdmem-1.C: Same.
+ * g++.dg/debug/dwarf2/ref-2.C: Same.
+ * g++.dg/debug/dwarf2/ref-3.C: Same.
+ * g++.dg/debug/dwarf2/ref-4.C: Same.
+ * g++.dg/debug/dwarf2/refqual-1.C: Same.
+ * g++.dg/debug/dwarf2/refqual-2.C: Same.
+ * gcc.dg/debug/dwarf2/align-1.c: Same.
+ * gcc.dg/debug/dwarf2/align-2.c: Same.
+ * gcc.dg/debug/dwarf2/align-3.c: Same.
+ * gcc.dg/debug/dwarf2/align-4.c: Same.
+ * gcc.dg/debug/dwarf2/align-5.c: Same.
+ * gcc.dg/debug/dwarf2/align-6.c: Same.
+ * gcc.dg/debug/dwarf2/align-as-1.c: Same.
+ * gcc.dg/debug/dwarf2/dwarf2-macro.c: Same.
+ * gcc.dg/debug/dwarf2/dwarf2-macro2.c: Same.
+ * gcc.dg/debug/dwarf2/lang-c89.c: Same.
+ * gcc.dg/debug/dwarf2/noreturn-function-attribute.c: Same.
+ * gcc.dg/debug/dwarf2/noreturn-function-keyword.c: Same.
+ * gcc.dg/debug/dwarf2/pr71855.c: Same.
+ * gcc.dg/debug/dwarf2/inline5.c: Add XFAIL on AIX.
+
+2020-09-29 David Malcolm <dmalcolm@redhat.com>
+
+ PR analyzer/95188
+ * gcc.dg/analyzer/signal-registration-loc.c: New test.
+
+2020-09-29 David Edelsohn <dje.gcc@gmail.com>
+
+ * g++.dg/spellcheck-inttypes.C: Define _STD_TYPES_T on AIX.
+ * gcc.dg/spellcheck-inttypes.c: Same.
+
+2020-09-29 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97241
+ * gcc.dg/vect/pr97241.c: New testcase.
+
+2020-09-29 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97238
+ * gcc.dg/pr97238.c: New testcase.
+
+2020-09-29 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/arm/armv8_2-fp16-arith-2.c: Expect FP16 vectorization
+ even without -ffast-math.
+
+2020-09-29 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/predef-3.c: Update testcase.
+ * gcc.target/riscv/predef-6.c: Ditto.
+
+2020-09-29 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96979
+ * g++.dg/tree-ssa/pr96979.C: New test.
+
+2020-09-29 Martin Liska <mliska@suse.cz>
+
+ Revert:
+ 2020-09-29 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96979
+ * g++.dg/tree-ssa/pr96979.C: New test.
+
+2020-09-29 David Edelsohn <dje.gcc@gmail.com>
+
+ * gcc.dg/ipa/symver1.c: Skip on AIX.
+
+2020-09-28 David Malcolm <dmalcolm@redhat.com>
+
+ PR analyzer/97233
+ * gcc.dg/analyzer/pr97233.c: New test.
+
+2020-09-28 Paul A. Clarke <pc@us.ibm.com>
+
+ * gcc.target/powerpc/sse4_1-pinsrb.c: New test.
+ * gcc.target/powerpc/sse4_1-pinsrd.c: New test.
+ * gcc.target/powerpc/sse4_1-pinsrq.c: New test.
+
+2020-09-28 liuhongt <hongtao.liu@intel.com>
+
+ * lib/target-supports.exp (check_effective_target_amx_tile,
+ check_effective_target_amx_int8,
+ check_effective_target_amx_bf16): New proc.
+ * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16.
+ * g++.dg/other/i386-3.C: Ditto.
+ * gcc.target/i386/sse-12.c: Ditto.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * gcc.target/i386/sse-14.c: Ditto.
+ * gcc.target/i386/sse-22.c: Ditto.
+ * gcc.target/i386/sse-23.c: Ditto.
+ * gcc.target/i386/funcspec-56.inc: Add new target attribute.
+ * gcc.target/i386/amx-check.h: New header file.
+ * gcc.target/i386/amxbf16-asmatt-1.c: New test.
+ * gcc.target/i386/amxint8-asmatt-1.c: New test.
+ * gcc.target/i386/amxtile-asmatt-1.c: Ditto.
+ * gcc.target/i386/amxbf16-asmintel-1.c: Ditto.
+ * gcc.target/i386/amxint8-asmintel-1.c: Ditto.
+ * gcc.target/i386/amxtile-asmintel-1.c: Ditto.
+ * gcc.target/i386/amxbf16-dpbf16ps-2.c: Ditto.
+ * gcc.target/i386/amxint8-dpbssd-2.c: Ditto.
+ * gcc.target/i386/amxint8-dpbsud-2.c: Ditto.
+ * gcc.target/i386/amxint8-dpbusd-2.c: Ditto.
+ * gcc.target/i386/amxint8-dpbuud-2.c: Ditto.
+ * gcc.target/i386/amxtile-2.c: Ditto.
+
+2020-09-28 Mark Eggleston <markeggleston@gcc.gnu.org>
+
+ Revert:
+ 2020-09-28 Steven G. Kargl <kargl@gcc.gnu.org>
+ Mark Eggleston <markeggleston@gcc.gnu.org>
+
+ PR fortran/95614
+ * gfortran.dg/pr95614_1.f90: New test.
+ * gfortran.dg/pr95614_2.f90: New test.
+
+2020-09-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gnat.dg/addr16.adb: New test.
+ * gnat.dg/addr16_pkg.ads: New helper.
+
+2020-09-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/97073
+ * gcc.c-torture/execute/pr97073.c: New test.
+
+2020-09-27 Steven G. Kargl <kargl@gcc.gnu.org>
+ Mark Eggleston <markeggleston@gcc.gnu.org>
+
+ PR fortran/95614
+ * gfortran.dg/pr95614_1.f90: New test.
+ * gfortran.dg/pr95614_2.f90: New test.
+
2020-09-26 Paul Thomas <pault@gcc.gnu.org>
PR fortran/96495
projects / gcc.git / blobdiff