re PR rtl-optimization/51040 (ICE: RTL check: access of elt 1 of 'not' with last...

[gcc.git] / gcc / testsuite / gcc.dg / atomic-noinline-aux.c

diff --git a/gcc/testsuite/gcc.dg/atomic-noinline-aux.c b/gcc/testsuite/gcc.dg/atomic-noinline-aux.c
index b92fcfcd60fc16ac86c1505032bada3b99b56315..b05460e469b92e36b9c7b940ca281e177bffa41e 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-noinline-aux.c
+++ b/gcc/testsuite/gcc.dg/atomic-noinline-aux.c
@@ -40,11 +40,24 @@ char __atomic_fetch_add_1 (char *p, char v, int i)
   *p = 1;
 }
 
-short __atomic_fetch_add_2 (short *p, short v, short i)
+short __atomic_fetch_add_2 (short *p, short v, int i)
 {
   *p = 1;
 }
 
+/* Really perform a NAND.  PR51040 showed incorrect calculation of a 
+   non-inlined fetch_nand.  */
+unsigned char 
+__atomic_fetch_nand_1 (unsigned char *p, unsigned char v, int i)
+{
+  unsigned char ret;
+
+  ret = *p;
+  *p = ~(*p & v);
+
+  return ret;
+}
+
 int __atomic_is_lock_free (int i, void *p)
 {
   return 10;