# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
-# 2011 Free Software Foundation, Inc.
+# 2011, 2012 Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
return 1
}
- # DEC OSF/1/Digital UNIX/Tru64 UNIX supports it
-
- if { [istarget alpha*-dec-osf*] } {
- return 1
- }
-
# Windows targets Cygwin and MingW32 support it
if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
return 0
}
- # Support for -p on irix relies on libprof1.a which doesn't appear to
- # exist on any irix6 system currently posting testsuite results.
- # Support for -pg on irix relies on gcrt1.o which doesn't exist yet.
- # See: http://gcc.gnu.org/ml/gcc/2002-10/msg00169.html
- if { [istarget mips*-*-irix*]
- && ($test_what == "-p" || $test_what == "-pg") } {
- return 0
- }
-
# We don't yet support profiling for MIPS16.
if { [istarget mips*-*-*]
&& ![check_effective_target_nomips16]
# Add to FLAGS all the target-specific flags needed to use thread-local storage.
proc add_options_for_tls { flags } {
- # Tru64 UNIX uses emutls, which relies on a couple of pthread functions
- # which only live in libpthread, so always pass -pthread for TLS.
- if { [istarget alpha*-dec-osf*] } {
- return "$flags -pthread"
- }
- # On Solaris 8 and 9, __tls_get_addr/___tls_get_addr only lives in
+ # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
# libthread, so always pass -pthread for native TLS.
# Need to duplicate native TLS check from
# check_effective_target_tls_native to avoid recursion.
- if { [istarget *-*-solaris2.\[89\]*] &&
+ if { [istarget *-*-solaris2.9*] &&
[check_no_messages_and_pattern tls_native "!emutls" assembly {
__thread int i;
int f (void) { return i; }
} "-fopenmp"]
}
+# Return 1 if compilation with -fgnu-tm is error-free for trivial
+# code, 0 otherwise.
+
+proc check_effective_target_fgnu_tm {} {
+ return [check_no_compiler_messages fgnu_tm object {
+ void foo (void) { }
+ } "-fgnu-tm"]
+}
+
# Return 1 if the target supports mmap, 0 otherwise.
proc check_effective_target_mmap {} {
} "-mabi=64"]
}
+# Return true if the target is a MIPS target that has access
+# to the LL and SC instructions.
+
+proc check_effective_target_mips_llsc { } {
+ if { ![istarget mips*-*-*] } {
+ return 0
+ }
+ # Assume that these instructions are always implemented for
+ # non-elf* targets, via emulation if necessary.
+ if { ![istarget *-*-elf*] } {
+ return 1
+ }
+ # Otherwise assume LL/SC support for everything but MIPS I.
+ return [check_no_compiler_messages mips_llsc assembly {
+ #if __mips == 1
+ #error FOO
+ #endif
+ }]
+}
+
+# Return true if the target is a MIPS target that uses in-place relocations.
+
+proc check_effective_target_mips_rel { } {
+ if { ![istarget mips*-*-*] } {
+ return 0
+ }
+ return [check_no_compiler_messages mips_rel object {
+ #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
+ || (defined _ABI64 && _MIPS_SIM == _ABI64)
+ #error FOO
+ #endif
+ }]
+}
+
+# Return true if the target is a MIPS target that uses the EABI.
+
+proc check_effective_target_mips_eabi { } {
+ if { ![istarget mips*-*-*] } {
+ return 0
+ }
+ return [check_no_compiler_messages mips_eabi object {
+ #ifndef __mips_eabi
+ #error FOO
+ #endif
+ }]
+}
+
# Return 1 if the current multilib does not generate PIC by default.
proc check_effective_target_nonpic { } {
# Return 1 if an ASCII locale is supported on this host, 0 otherwise.
proc check_ascii_locale_available { } {
- if { ([ishost alpha*-dec-osf*] || [ishost mips-sgi-irix*]) } {
- # Neither Tru64 UNIX nor IRIX support an ASCII locale.
- return 0
- } else {
- return 1
- }
+ return 1
}
# Return true if named sections are supported on this target.
}]
}
+# Return true if the "naked" function attribute is supported on this target.
+
+proc check_effective_target_naked_functions { } {
+ return [check_no_compiler_messages naked_functions assembly {
+ void f() __attribute__((naked));
+ }]
+}
+
# Return 1 if the target supports Fortran real kinds larger than real(8),
# 0 otherwise.
#
}]
}
+
+# Return 1 if the target supports SQRT for the largest floating-point
+# type. (Some targets lack the libm support for this FP type.)
+# On most targets, this check effectively checks either whether sqrtl is
+# available or on __float128 systems whether libquadmath is installed,
+# which provides sqrtq.
+#
+# When the target name changes, replace the cached result.
+
+proc check_effective_target_fortran_largest_fp_has_sqrt { } {
+ return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
+ ! Fortran
+ use iso_fortran_env, only: real_kinds
+ integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
+ real(kind=maxFP), volatile :: x
+ x = 2.0_maxFP
+ x = sqrt (x)
+ end
+ }]
+}
+
+
# Return 1 if the target supports Fortran integer kinds larger than
# integer(8), 0 otherwise.
#
}]
}
+# Return 1 if long and int have different sizes,
+# 0 otherwise.
+
+proc check_effective_target_long_neq_int { } {
+ return [check_no_compiler_messages long_ne_int object {
+ int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
+ }]
+}
+
# Return 1 if the target supports long double larger than double,
# 0 otherwise.
|| ([istarget powerpc*-*-*]
&& ([check_effective_target_powerpc_spe]
|| [check_effective_target_powerpc_altivec]))
+ || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
|| [istarget spu-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
set et_vect_cmdline_needed_saved 0
if { [istarget i?86-*-*]
|| ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || ([istarget arm*-*-*]
+ && [check_effective_target_arm_neon_ok])} {
set et_vect_intfloat_cvt_saved 1
}
}
if { [istarget i?86-*-*]
|| ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || ([istarget arm*-*-*]
+ && [check_effective_target_arm_neon_ok])} {
set et_vect_uintfloat_cvt_saved 1
}
}
if { [istarget i?86-*-*]
|| ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || ([istarget arm*-*-*]
+ && [check_effective_target_arm_neon_ok])} {
set et_vect_floatint_cvt_saved 1
}
}
} else {
set et_vect_floatuint_cvt_saved 0
if { ([istarget powerpc*-*-*]
- && ![istarget powerpc-*-linux*paired*]) } {
+ && ![istarget powerpc-*-linux*paired*])
+ || ([istarget arm*-*-*]
+ && [check_effective_target_arm_neon_ok])} {
set et_vect_floatuint_cvt_saved 1
}
}
# options.
proc check_effective_target_arm_hard_vfp_ok { } {
- if { [check_effective_target_arm32] } {
+ if { [check_effective_target_arm32]
+ && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
return [check_no_compiler_messages arm_hard_vfp_ok executable {
int main() { return 0;}
} "-mfpu=vfp -mfloat-abi=hard"]
return "$flags $et_arm_neon_flags"
}
+# Add the options needed for NEON. We need either -mfloat-abi=softfp
+# or -mfloat-abi=hard, but if one is already specified by the
+# multilib, use it. Similarly, if a -mfpu option already enables
+# NEON, do not add -mfpu=neon.
+
+proc add_options_for_arm_neonv2 { flags } {
+ if { ! [check_effective_target_arm_neonv2_ok] } {
+ return "$flags"
+ }
+ global et_arm_neonv2_flags
+ return "$flags $et_arm_neonv2_flags"
+}
+
# Return 1 if this is an ARM target supporting -mfpu=neon
# -mfloat-abi=softfp or equivalent options. Some multilibs may be
# incompatible with these options. Also set et_arm_neon_flags to the
check_effective_target_arm_neon_ok_nocache]
}
+# Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
+# -mfloat-abi=softfp or equivalent options. Some multilibs may be
+# incompatible with these options. Also set et_arm_neonv2_flags to the
+# best options to add.
+
+proc check_effective_target_arm_neonv2_ok_nocache { } {
+ global et_arm_neonv2_flags
+ set et_arm_neonv2_flags ""
+ if { [check_effective_target_arm32] } {
+ foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
+ if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
+ #include "arm_neon.h"
+ float32x2_t
+ foo (float32x2_t a, float32x2_t b, float32x2_t c)
+ {
+ return vfma_f32 (a, b, c);
+ }
+ } "$flags"] } {
+ set et_arm_neonv2_flags $flags
+ return 1
+ }
+ }
+ }
+
+ return 0
+}
+
+proc check_effective_target_arm_neonv2_ok { } {
+ return [check_cached_effective_target arm_neonv2_ok \
+ check_effective_target_arm_neonv2_ok_nocache]
+}
+
# Add the options needed for NEON. We need either -mfloat-abi=softfp
# or -mfloat-abi=hard, but if one is already specified by the
# multilib, use it.
# (Thumb in particular - but others may be added in the future)
# Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
# /* { dg-add-options arm_arch_v5 } */
-foreach { armfunc armflag armdef } { v5 "-march=armv5 -marm" __ARM_ARCH_5__
+# /* { dg-require-effective-target arm_arch_v5_multilib } */
+foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
+ v4t "-march=armv4t" __ARM_ARCH_4T__
+ v5 "-march=armv5 -marm" __ARM_ARCH_5__
+ v5t "-march=armv5t" __ARM_ARCH_5T__
+ v5te "-march=armv5te" __ARM_ARCH_5TE__
v6 "-march=armv6" __ARM_ARCH_6__
v6k "-march=armv6k" __ARM_ARCH_6K__
- v7a "-march=armv7-a" __ARM_ARCH_7A__ } {
+ v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
+ v6z "-march=armv6z" __ARM_ARCH_6Z__
+ v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
+ v7a "-march=armv7-a" __ARM_ARCH_7A__
+ v7r "-march=armv7-r" __ARM_ARCH_7R__
+ v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
+ v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ } {
eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
proc check_effective_target_arm_arch_FUNC_ok { } {
if { [ string match "*-marm*" "FLAG" ] &&
proc add_options_for_arm_arch_FUNC { flags } {
return "$flags FLAG"
}
+
+ proc check_effective_target_arm_arch_FUNC_multilib { } {
+ return [check_runtime arm_arch_FUNC_multilib {
+ int
+ main (void)
+ {
+ return 0;
+ }
+ } [add_options_for_arm_arch_FUNC ""]]
+ }
}]
}
} [add_options_for_arm_neon ""]]
}
+proc check_effective_target_arm_neonv2_hw { } {
+ return [check_runtime arm_neon_hwv2_available {
+ #include "arm_neon.h"
+ int
+ main (void)
+ {
+ float32x2_t a, b, c;
+ asm ("vfma.f32 %P0, %P1, %P2"
+ : "=w" (a)
+ : "w" (b), "w" (c));
+ return 0;
+ }
+ } [add_options_for_arm_neonv2 ""]]
+}
+
# Return 1 if this is a ARM target with NEON enabled.
proc check_effective_target_arm_neon { } {
}
}
+proc check_effective_target_arm_neonv2 { } {
+ if { [check_effective_target_arm32] } {
+ return [check_no_compiler_messages arm_neon object {
+ #ifndef __ARM_NEON__
+ #error not NEON
+ #else
+ #ifndef __ARM_FEATURE_FMA
+ #error not NEONv2
+ #else
+ int dummy;
+ #endif
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this a Loongson-2E or -2F target using an ABI that supports
# the Loongson vector modes.
}]
}
+# Return 1 if this is an ARM target that adheres to the hard-float variant of
+# the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
+
+proc check_effective_target_arm_hf_eabi { } {
+ return [check_no_compiler_messages arm_hf_eabi object {
+ #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
+ #error not hard-float EABI
+ #else
+ int dummy;
+ #endif
+ }]
+}
+
# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
# Some multilibs may be incompatible with this option.
# instructions. We check this by attempting: "bmask %g0, %g0, %g0"
proc check_effective_target_ultrasparc_vis2_hw { } {
- return [check_runtime ultrasparc_hw {
+ return [check_runtime ultrasparc_vis2_hw {
int main() { __asm__(".word 0x81b00320"); return 0; }
} "-mcpu=ultrasparc3"]
}
# instructions. We check this by attempting: "addxc %g0, %g0, %g0"
proc check_effective_target_ultrasparc_vis3_hw { } {
- return [check_runtime ultrasparc_hw {
+ return [check_runtime ultrasparc_vis3_hw {
int main() { __asm__(".word 0x81b00220"); return 0; }
} "-mcpu=niagara3"]
}
+# Return 1 if this is a SPARC-V9 target.
+
+proc check_effective_target_sparc_v9 { } {
+ if { [istarget sparc*-*-*] } {
+ return [check_no_compiler_messages sparc_v9 object {
+ int main (void) {
+ asm volatile ("return %i7+8");
+ return 0;
+ }
+ }]
+ } else {
+ return 0
+ }
+}
+
+# Return 1 if this is a SPARC target with VIS enabled.
+
+proc check_effective_target_sparc_vis { } {
+ if { [istarget sparc*-*-*] } {
+ return [check_no_compiler_messages sparc_vis object {
+ #ifndef __VIS__
+ #error not VIS
+ #else
+ int dummy;
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if the target supports hardware vector shift operation.
proc check_effective_target_vect_shift { } {
verbose "check_effective_target_vect_perm: using cached result" 2
} else {
set et_vect_perm_saved 0
- if { [istarget powerpc*-*-*]
+ if { [is-effective-target arm_neon_ok]
+ || [istarget powerpc*-*-*]
|| [istarget spu-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || ([istarget mips*-*-*]
+ && [check_effective_target_mpaired_single]) } {
set et_vect_perm_saved 1
}
}
verbose "check_effective_target_vect_perm_byte: using cached result" 2
} else {
set et_vect_perm_byte_saved 0
- if { [istarget powerpc*-*-*]
+ if { [is-effective-target arm_neon_ok]
+ || [istarget powerpc*-*-*]
|| [istarget spu-*-*] } {
set et_vect_perm_byte_saved 1
}
verbose "check_effective_target_vect_perm_short: using cached result" 2
} else {
set et_vect_perm_short_saved 0
- if { [istarget powerpc*-*-*]
+ if { [is-effective-target arm_neon_ok]
+ || [istarget powerpc*-*-*]
|| [istarget spu-*-*] } {
set et_vect_perm_short_saved 1
}
set et_vect_widen_mult_qi_to_hi_saved 0
}
if { [istarget powerpc*-*-*]
- || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
set et_vect_widen_mult_qi_to_hi_saved 1
}
}
|| [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
- || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
set et_vect_widen_mult_hi_to_si_saved 1
}
}
} else {
set et_vect_widen_mult_qi_to_hi_pattern_saved 0
if { [istarget powerpc*-*-*]
- || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
set et_vect_widen_mult_qi_to_hi_pattern_saved 1
}
}
|| [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
- || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
set et_vect_widen_mult_hi_to_si_pattern_saved 1
}
}
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget spu-*-*]
- || ([istarget arm*-*-*] && [check_effective_target_arm_neon]
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
&& [check_effective_target_arm_little_endian]) } {
set et_vect_pack_trunc_saved 1
}
|| [istarget x86_64-*-*]
|| [istarget spu-*-*]
|| [istarget ia64-*-*]
- || ([istarget arm*-*-*] && [check_effective_target_arm_neon]
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
&& [check_effective_target_arm_little_endian]) } {
set et_vect_unpack_saved 1
}
verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
} else {
set et_vect_aligned_arrays_saved 0
- if { (([istarget x86_64-*-*]
- || [istarget i?86-*-*]) && [is-effective-target lp64])
- || [istarget spu-*-*] } {
+ if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+ if { ([is-effective-target lp64]
+ && ( ![check_avx_available]
+ || [check_prefer_avx128])) } {
+ set et_vect_aligned_arrays_saved 1
+ }
+ }
+ if [istarget spu-*-*] {
set et_vect_aligned_arrays_saved 1
}
}
return $et_natural_alignment_64_saved
}
+# Return 1 if all vector types are naturally aligned (aligned to their
+# type-size), 0 otherwise.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_natural_alignment { } {
+ global et_vect_natural_alignment
+
+ if [info exists et_vect_natural_alignment_saved] {
+ verbose "check_effective_target_vect_natural_alignment: using cached result" 2
+ } else {
+ set et_vect_natural_alignment_saved 1
+ if { [check_effective_target_arm_eabi] } {
+ set et_vect_natural_alignment_saved 0
+ }
+ }
+ verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
+ return $et_vect_natural_alignment_saved
+}
+
# Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
#
# This won't change for different subtargets so cache the result.
|| [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget spu-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
set et_vect_cond_saved 1
}
}
} else {
set et_vect_cond_mixed_saved 0
if { [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [istarget powerpc*-*-*] } {
set et_vect_cond_mixed_saved 1
}
}
set et_vect_char_mult_saved 0
if { [istarget ia64-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [check_effective_target_arm32] } {
set et_vect_char_mult_saved 1
}
}
} else {
set et_vect_extract_even_odd_saved 0
if { [istarget powerpc*-*-*]
+ || [is-effective-target arm_neon_ok]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget ia64-*-*]
- || [istarget spu-*-*] } {
- set et_vect_extract_even_odd_saved 1
+ || [istarget spu-*-*]
+ || ([istarget mips*-*-*]
+ && [check_effective_target_mpaired_single]) } {
+ set et_vect_extract_even_odd_saved 1
}
}
} else {
set et_vect_interleave_saved 0
if { [istarget powerpc*-*-*]
+ || [is-effective-target arm_neon_ok]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget ia64-*-*]
- || [istarget spu-*-*] } {
+ || [istarget spu-*-*]
+ || ([istarget mips*-*-*]
+ && [check_effective_target_mpaired_single]) } {
set et_vect_interleave_saved 1
}
}
proc check_effective_target_vect_multiple_sizes { } {
global et_vect_multiple_sizes_saved
- if [info exists et_vect_multiple_sizes_saved] {
- verbose "check_effective_target_vect_multiple_sizes: using cached result" 2
- } else {
- set et_vect_multiple_sizes_saved 0
- if { ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
- set et_vect_multiple_sizes_saved 1
- }
+ set et_vect_multiple_sizes_saved 0
+ if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
+ set et_vect_multiple_sizes_saved 1
+ }
+ if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+ if { ([check_avx_available] && ![check_prefer_avx128]) } {
+ set et_vect_multiple_sizes_saved 1
+ }
}
verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
return $et_vect64_saved
}
+# Return 1 if the target supports vector copysignf calls.
+
+proc check_effective_target_vect_call_copysignf { } {
+ global et_vect_call_copysignf_saved
+
+ if [info exists et_vect_call_copysignf_saved] {
+ verbose "check_effective_target_vect_call_copysignf: using cached result" 2
+ } else {
+ set et_vect_call_copysignf_saved 0
+ if { [istarget i?86-*-*]
+ || [istarget x86_64-*-*]
+ || [istarget powerpc*-*-*] } {
+ set et_vect_call_copysignf_saved 1
+ }
+ }
+
+ verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
+ return $et_vect_call_copysignf_saved
+}
+
+# Return 1 if the target supports vector sqrtf calls.
+
+proc check_effective_target_vect_call_sqrtf { } {
+ global et_vect_call_sqrtf_saved
+
+ if [info exists et_vect_call_sqrtf_saved] {
+ verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
+ } else {
+ set et_vect_call_sqrtf_saved 0
+ if { [istarget i?86-*-*]
+ || [istarget x86_64-*-*]
+ || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
+ set et_vect_call_sqrtf_saved 1
+ }
+ }
+
+ verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
+ return $et_vect_call_sqrtf_saved
+}
+
+# Return 1 if the target supports vector lrint calls.
+
+proc check_effective_target_vect_call_lrint { } {
+ set et_vect_call_lrint 0
+ if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) && [check_effective_target_ilp32] } {
+ set et_vect_call_lrint 1
+ }
+
+ verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
+ return $et_vect_call_lrint
+}
+
# Return 1 if the target supports section-anchors
proc check_effective_target_section_anchors { } {
# Return 1 if the target supports atomic operations on "int_128" values.
proc check_effective_target_sync_int_128 { } {
- global et_sync_int_128_saved
-
- if [info exists et_sync_int_128_saved] {
- verbose "check_effective_target_sync_int_128: using cached result" 2
+ if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
+ && ![is-effective-target ia32] } {
+ return 1
} else {
- set et_sync_int_128_saved 0
- if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
- && ![is-effective-target ia32] } {
- set et_sync_int_128_saved 1
- }
+ return 0
}
+}
- verbose "check_effective_target_sync_int_128: returning $et_sync_int_128_saved" 2
- return $et_sync_int_128_saved
+# Return 1 if the target supports atomic operations on "int_128" values
+# and can execute them.
+
+proc check_effective_target_sync_int_128_runtime { } {
+ if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
+ && ![is-effective-target ia32] } {
+ return [check_cached_effective_target sync_int_128_available {
+ check_runtime_nocache sync_int_128_available {
+ #include "cpuid.h"
+ int main ()
+ {
+ unsigned int eax, ebx, ecx, edx;
+ if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+ return !(ecx & bit_CMPXCHG16B);
+ return 1;
+ }
+ } ""
+ }]
+ } else {
+ return 0
+ }
}
# Return 1 if the target supports atomic operations on "long long".
+#
+# Note: 32bit x86 targets require -march=pentium in dg-options.
proc check_effective_target_sync_long_long { } {
- global et_sync_long_long_saved
-
- if [info exists et_sync_long_long_saved] {
- verbose "check_effective_target_sync_long_long: using cached result" 2
+ if { [istarget x86_64-*-*]
+ || [istarget i?86-*-*])
+ || [istarget arm*-*-*]
+ || [istarget alpha*-*-*]
+ || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
+ return 1
} else {
- set et_sync_long_long_saved 0
- if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
- && ![is-effective-target ia32] } {
- set et_sync_long_long_saved 1
- }
+ return 0
}
+}
+
+# Return 1 if the target supports atomic operations on "long long"
+# and can execute them.
+#
+# Note: 32bit x86 targets require -march=pentium in dg-options.
+
+proc check_effective_target_sync_long_long_runtime { } {
+ if { [istarget x86_64-*-*]
+ || [istarget i?86-*-*] } {
+ return [check_cached_effective_target sync_long_long_available {
+ check_runtime_nocache sync_long_long_available {
+ #include "cpuid.h"
+ int main ()
+ {
+ unsigned int eax, ebx, ecx, edx;
+ if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+ return !(edx & bit_CMPXCHG8B);
+ return 1;
+ }
+ } ""
+ }]
+ } elseif { [istarget arm*-*-linux-*] } {
+ return [check_runtime sync_longlong_runtime {
+ #include <stdlib.h>
+ int main ()
+ {
+ long long l1;
+
+ if (sizeof (long long) != 8)
+ exit (1);
+
+ /* Just check for native; checking for kernel fallback is tricky. */
+ asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
- verbose "check_effective_target_sync_long_long: returning $et_sync_long_long_saved" 2
- return $et_sync_long_long_saved
+ exit (0);
+ }
+ } "" ]
+ } elseif { [istarget alpha*-*-*] } {
+ return 1
+ } elseif { ([istarget sparc*-*-*]
+ && [check_effective_target_lp64]
+ && [check_effective_target_ultrasparc_hw]) } {
+ return 1
+ } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
+ return 1
+ } else {
+ return 0
+ }
}
# Return 1 if the target supports atomic operations on "int" and "long".
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget alpha*-*-*]
- || [istarget arm*-*-linux-gnueabi]
+ || [istarget arm*-*-linux-*]
|| [istarget bfin*-*linux*]
|| [istarget hppa*-*linux*]
|| [istarget s390*-*-*]
|| [istarget powerpc*-*-*]
- || [istarget sparc64-*-*]
- || [istarget sparcv9-*-*]
- || [istarget mips*-*-*] } {
+ || [istarget crisv32-*-*] || [istarget cris-*-*]
+ || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
+ || [check_effective_target_mips_llsc] } {
set et_sync_int_long_saved 1
}
}
return $et_sync_int_long_saved
}
-# Return 1 if the target supports atomic operations on "long long" and can
-# execute them
-# So far only put checks in for ARM, others may want to add their own
-proc check_effective_target_sync_longlong { } {
- return [check_runtime sync_longlong_runtime {
- #include <stdlib.h>
- int main ()
- {
- long long l1;
-
- if (sizeof (long long) != 8)
- exit (1);
-
- #ifdef __arm__
- /* Just check for native; checking for kernel fallback is tricky. */
- asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
- #else
- # error "Add other suitable archs here"
- #endif
-
- exit (0);
- }
- } "" ]
-}
-
# Return 1 if the target supports atomic operations on "char" and "short".
proc check_effective_target_sync_char_short { } {
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget alpha*-*-*]
- || [istarget arm*-*-linux-gnueabi]
+ || [istarget arm*-*-linux-*]
|| [istarget hppa*-*linux*]
|| [istarget s390*-*-*]
|| [istarget powerpc*-*-*]
- || [istarget sparc64-*-*]
- || [istarget sparcv9-*-*]
- || [istarget mips*-*-*] } {
+ || [istarget crisv32-*-*] || [istarget cris-*-*]
+ || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
+ || [check_effective_target_mips_llsc] } {
set et_sync_char_short_saved 1
}
}
if { [istarget *-*-solaris2*] } {
return "$flags -std=c99"
}
- if { [istarget mips-sgi-irix6.5*] } {
- return "$flags -std=c99"
- }
if { [istarget powerpc-*-darwin*] } {
return "$flags -mmacosx-version-min=10.3"
}
return 0;
}
+# Return true if we are compiling for AVX target.
+
+proc check_avx_available { } {
+ if { [check_no_compiler_messages avx_available assembly {
+ #ifndef __AVX__
+ #error unsupported
+ #endif
+ } ""] } {
+ return 1;
+ }
+ return 0;
+}
+
+# Return true if 32- and 16-bytes vectors are available.
+
+proc check_effective_target_vect_sizes_32B_16B { } {
+ return [check_avx_available];
+}
+
+# Return true if 128-bits vectors are preferred even if 256-bits vectors
+# are available.
+
+proc check_prefer_avx128 { } {
+ if ![check_avx_available] {
+ return 0;
+ }
+ return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
+ float a[1024],b[1024],c[1024];
+ void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
+ } "-O2 -ftree-vectorize"]
+}
+
+
# Return 1 if avx instructions can be compiled.
proc check_effective_target_avx { } {
return 0
}
+# Check which language standard is active by checking for the presence of
+# one of the C++11 -std flags. This assumes that the default for the
+# compiler is C++98, and that there will never be multiple -std= arguments
+# on the command line.
+proc check_effective_target_c++11 { } {
+ if ![check_effective_target_c++] {
+ return 0
+ }
+ return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
+}
+
+proc check_effective_target_c++1y { } {
+ if ![check_effective_target_c++] {
+ return 0
+ }
+ return [check-flags { { } { } { -std=c++1y -std=gnu++1y } }]
+}
+
+proc check_effective_target_c++98 { } {
+ if ![check_effective_target_c++] {
+ return 0
+ }
+ return [check-flags { { } { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 -std=c++1y -std=gnu++1y } }]
+}
+
# Return 1 if expensive testcases should be run.
proc check_effective_target_run_expensive_tests { } {
void foo(void) { z = (c *) y; }
} "-Wcast-align"]
}
+
+# Return 1 if the target has <ucontext.h>.
+
+proc check_effective_target_ucontext_h { } {
+ return [check_no_compiler_messages ucontext_h assembly {
+ #include <ucontext.h>
+ }]
+}
projects / gcc.git / blobdiff