/* Target-dependent code for AMD64.
- Copyright (C) 2001-2020 Free Software Foundation, Inc.
+ Copyright (C) 2001-2022 Free Software Foundation, Inc.
Contributed by Jiri Smid, SuSE Labs.
#include "gdbsupport/byte-vector.h"
#include "osabi.h"
#include "x86-tdep.h"
+#include "amd64-ravenscar-thread.h"
/* Note that the AMD64 architecture was previously known as x86-64.
The latter is (forever) engraved into the canonical system name as
static int
amd64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
int ymm0_regnum = tdep->ymm0_regnum;
int regnum = -1;
static const char *
amd64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
if (i386_byte_regnum_p (gdbarch, regnum))
return amd64_byte_names[regnum - tdep->al_regnum];
else if (i386_zmm_regnum_p (gdbarch, regnum))
readable_regcache *regcache,
int regnum)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
value *result_value = allocate_value (register_type (gdbarch, regnum));
VALUE_LVAL (result_value) = lval_register;
VALUE_REGNUM (result_value) = regnum;
- gdb_byte *buf = value_contents_raw (result_value);
+ gdb_byte *buf = value_contents_raw (result_value).data ();
if (i386_byte_regnum_p (gdbarch, regnum))
{
struct regcache *regcache,
int regnum, const gdb_byte *buf)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
if (i386_byte_regnum_p (gdbarch, regnum))
{
amd64_ax_pseudo_register_collect (struct gdbarch *gdbarch,
struct agent_expr *ax, int regnum)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
if (i386_byte_regnum_p (gdbarch, regnum))
{
for (int i = 0; i < type->num_fields (); i++)
{
struct type *subtype = check_typedef (type->field (i).type ());
- int bitpos = TYPE_FIELD_BITPOS (type, i);
- int align = type_align(subtype);
/* Ignore static fields, empty fields (for example nested
empty structures), and bitfields (these are handled by
|| TYPE_FIELD_PACKED (type, i))
continue;
+ int bitpos = type->field (i).loc_bitpos ();
+
if (bitpos % 8 != 0)
return true;
+ int align = type_align (subtype);
+ if (align == 0)
+ error (_("could not determine alignment of type"));
+
int bytepos = bitpos / 8;
if (bytepos % align != 0)
return true;
unsigned int bitoffset)
{
struct type *subtype = check_typedef (type->field (i).type ());
- int bitpos = bitoffset + TYPE_FIELD_BITPOS (type, i);
- int pos = bitpos / 64;
enum amd64_reg_class subclass[2];
int bitsize = TYPE_FIELD_BITSIZE (type, i);
- int endpos;
if (bitsize == 0)
bitsize = TYPE_LENGTH (subtype) * 8;
- endpos = (bitpos + bitsize - 1) / 64;
/* Ignore static fields, or empty fields, for example nested
empty structures.*/
if (field_is_static (&type->field (i)) || bitsize == 0)
return;
+ int bitpos = bitoffset + type->field (i).loc_bitpos ();
+ int pos = bitpos / 64;
+ int endpos = (bitpos + bitsize - 1) / 64;
+
if (subtype->code () == TYPE_CODE_STRUCT
|| subtype->code () == TYPE_CODE_UNION)
{
static void
amd64_classify_aggregate (struct type *type, enum amd64_reg_class theclass[2])
{
- /* 1. If the size of an object is larger than two eightbytes, or it has
- unaligned fields, it has class memory. */
- if (TYPE_LENGTH (type) > 16 || amd64_has_unaligned_fields (type))
+ /* 1. If the size of an object is larger than two times eight bytes, or
+ it is a non-trivial C++ object, or it has unaligned fields, then it
+ has class memory.
+
+ It is important that the trivially_copyable check is before the
+ unaligned fields check, as C++ classes with virtual base classes
+ will have fields (for the virtual base classes) with non-constant
+ loc_bitpos attributes, which will cause an assert to trigger within
+ the unaligned field check. As classes with virtual bases are not
+ trivially copyable, checking that first avoids this problem. */
+ if (TYPE_LENGTH (type) > 16
+ || !language_pass_by_reference (type).trivially_copyable
+ || amd64_has_unaligned_fields (type))
{
theclass[0] = theclass[1] = AMD64_MEMORY;
return;
theclass[0] = theclass[1] = AMD64_NO_CLASS;
/* 3. Each field of an object is classified recursively so that
- always two fields are considered. The resulting class is
- calculated according to the classes of the fields in the
- eightbyte: */
+ always two fields are considered. The resulting class is
+ calculated according to the classes of the fields in the
+ eightbyte: */
if (type->code () == TYPE_CODE_ARRAY)
{
&& (len == 1 || len == 2 || len == 4 || len == 8))
theclass[0] = AMD64_INTEGER;
- /* Arguments of types float, double, _Decimal32, _Decimal64 and __m64
- are in class SSE. */
+ /* Arguments of types _Float16, float, double, _Decimal32, _Decimal64 and
+ __m64 are in class SSE. */
else if ((code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
- && (len == 4 || len == 8))
+ && (len == 2 || len == 4 || len == 8))
/* FIXME: __m64 . */
theclass[0] = AMD64_SSE;
/* Class X87 and X87UP. */
theclass[0] = AMD64_X87, theclass[1] = AMD64_X87UP;
- /* Arguments of complex T where T is one of the types float or
- double get treated as if they are implemented as:
+ /* Arguments of complex T - where T is one of the types _Float16, float or
+ double - get treated as if they are implemented as:
struct complexT {
T real;
};
*/
- else if (code == TYPE_CODE_COMPLEX && len == 8)
+ else if (code == TYPE_CODE_COMPLEX && (len == 8 || len == 4))
theclass[0] = AMD64_SSE;
else if (code == TYPE_CODE_COMPLEX && len == 16)
theclass[0] = theclass[1] = AMD64_SSE;
if (theclass[0] == AMD64_MEMORY)
{
/* As indicated by the comment above, the ABI guarantees that we
- can always find the return value just after the function has
- returned. */
+ can always find the return value just after the function has
+ returned. */
if (readbuf)
{
}
/* 8. If the class is COMPLEX_X87, the real part of the value is
- returned in %st0 and the imaginary part in %st1. */
+ returned in %st0 and the imaginary part in %st1. */
if (theclass[0] == AMD64_COMPLEX_X87)
{
if (readbuf)
case AMD64_SSE:
/* 4. If the class is SSE, the next available SSE register
- of the sequence %xmm0, %xmm1 is used. */
+ of the sequence %xmm0, %xmm1 is used. */
regnum = sse_regnum[sse_reg++];
break;
case AMD64_X87:
/* 6. If the class is X87, the value is returned on the X87
- stack in %st0 as 80-bit x87 number. */
+ stack in %st0 as 80-bit x87 number. */
regnum = AMD64_ST0_REGNUM;
if (writebuf)
i387_return_value (gdbarch, regcache);
case AMD64_X87UP:
/* 7. If the class is X87UP, the value is returned together
- with the previous X87 value in %st0. */
+ with the previous X87 value in %st0. */
gdb_assert (i > 0 && theclass[0] == AMD64_X87);
regnum = AMD64_ST0_REGNUM;
offset = 8;
amd64_classify (type, theclass);
/* Calculate the number of integer and SSE registers needed for
- this argument. */
+ this argument. */
for (j = 0; j < 2; j++)
{
if (theclass[j] == AMD64_INTEGER)
}
/* Check whether enough registers are available, and if the
- argument should be passed in registers at all. */
+ argument should be passed in registers at all. */
if (integer_reg + needed_integer_regs > ARRAY_SIZE (integer_regnum)
|| sse_reg + needed_sse_regs > ARRAY_SIZE (sse_regnum)
|| (needed_integer_regs == 0 && needed_sse_regs == 0))
else
{
/* The argument will be passed in registers. */
- const gdb_byte *valbuf = value_contents (args[i]);
+ const gdb_byte *valbuf = value_contents (args[i]).data ();
gdb_byte buf[8];
gdb_assert (len <= 16);
for (i = 0; i < num_stack_args; i++)
{
struct type *type = value_type (stack_args[i]);
- const gdb_byte *valbuf = value_contents (stack_args[i]);
+ const gdb_byte *valbuf = value_contents (stack_args[i]).data ();
int len = TYPE_LENGTH (type);
write_memory (sp + element * 8, valbuf, len);
gdb_byte *raw_insn;
};
-struct amd64_displaced_step_closure : public displaced_step_closure
+struct amd64_displaced_step_copy_insn_closure
+ : public displaced_step_copy_insn_closure
{
- amd64_displaced_step_closure (int insn_buf_len)
+ amd64_displaced_step_copy_insn_closure (int insn_buf_len)
: insn_buf (insn_buf_len, 0)
{}
We set base = pc + insn_length so we can leave disp unchanged. */
static void
-fixup_riprel (struct gdbarch *gdbarch, amd64_displaced_step_closure *dsc,
+fixup_riprel (struct gdbarch *gdbarch,
+ amd64_displaced_step_copy_insn_closure *dsc,
CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
{
const struct amd64_insn *insn_details = &dsc->insn_details;
regcache_cooked_write_unsigned (regs, tmp_regno, rip_base);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog, "displaced: %%rip-relative addressing used.\n"
- "displaced: using temp reg %d, old value %s, new value %s\n",
- dsc->tmp_regno, paddress (gdbarch, dsc->tmp_save),
- paddress (gdbarch, rip_base));
+ displaced_debug_printf ("%%rip-relative addressing used.");
+ displaced_debug_printf ("using temp reg %d, old value %s, new value %s",
+ dsc->tmp_regno, paddress (gdbarch, dsc->tmp_save),
+ paddress (gdbarch, rip_base));
}
static void
fixup_displaced_copy (struct gdbarch *gdbarch,
- amd64_displaced_step_closure *dsc,
+ amd64_displaced_step_copy_insn_closure *dsc,
CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
{
const struct amd64_insn *details = &dsc->insn_details;
}
}
-displaced_step_closure_up
+displaced_step_copy_insn_closure_up
amd64_displaced_step_copy_insn (struct gdbarch *gdbarch,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
/* Extra space for sentinels so fixup_{riprel,displaced_copy} don't have to
continually watch for running off the end of the buffer. */
int fixup_sentinel_space = len;
- std::unique_ptr<amd64_displaced_step_closure> dsc
- (new amd64_displaced_step_closure (len + fixup_sentinel_space));
+ std::unique_ptr<amd64_displaced_step_copy_insn_closure> dsc
+ (new amd64_displaced_step_copy_insn_closure (len + fixup_sentinel_space));
gdb_byte *buf = &dsc->insn_buf[0];
struct amd64_insn *details = &dsc->insn_details;
write_memory (to, buf, len);
- if (debug_displaced)
- {
- fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
- paddress (gdbarch, from), paddress (gdbarch, to));
- displaced_step_dump_bytes (gdb_stdlog, buf, len);
- }
+ displaced_debug_printf ("copy %s->%s: %s",
+ paddress (gdbarch, from), paddress (gdbarch, to),
+ displaced_step_dump_bytes (buf, len).c_str ());
/* This is a work around for a problem with g++ 4.8. */
- return displaced_step_closure_up (dsc.release ());
+ return displaced_step_copy_insn_closure_up (dsc.release ());
}
static int
void
amd64_displaced_step_fixup (struct gdbarch *gdbarch,
- struct displaced_step_closure *dsc_,
+ struct displaced_step_copy_insn_closure *dsc_,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
{
- amd64_displaced_step_closure *dsc = (amd64_displaced_step_closure *) dsc_;
+ amd64_displaced_step_copy_insn_closure *dsc
+ = (amd64_displaced_step_copy_insn_closure *) dsc_;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* The offset we applied to the instruction's address. */
ULONGEST insn_offset = to - from;
gdb_byte *insn = dsc->insn_buf.data ();
const struct amd64_insn *insn_details = &dsc->insn_details;
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: fixup (%s, %s), "
- "insn = 0x%02x 0x%02x ...\n",
- paddress (gdbarch, from), paddress (gdbarch, to),
- insn[0], insn[1]);
+ displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
+ paddress (gdbarch, from), paddress (gdbarch, to),
+ insn[0], insn[1]);
/* If we used a tmp reg, restore it. */
if (dsc->tmp_used)
{
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog, "displaced: restoring reg %d to %s\n",
- dsc->tmp_regno, paddress (gdbarch, dsc->tmp_save));
+ displaced_debug_printf ("restoring reg %d to %s",
+ dsc->tmp_regno, paddress (gdbarch, dsc->tmp_save));
regcache_cooked_write_unsigned (regs, dsc->tmp_regno, dsc->tmp_save);
}
Presumably this is a kernel bug.
Fixup ensures its a nop, we add one to the length for it. */
&& orig_rip != to + insn_len + 1)
- {
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: syscall changed %%rip; "
- "not relocating\n");
- }
+ displaced_debug_printf ("syscall changed %%rip; not relocating");
else
{
ULONGEST rip = orig_rip - insn_offset;
regcache_cooked_write_unsigned (regs, AMD64_RIP_REGNUM, rip);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: "
- "relocated %%rip from %s to %s\n",
- paddress (gdbarch, orig_rip),
- paddress (gdbarch, rip));
+ displaced_debug_printf ("relocated %%rip from %s to %s",
+ paddress (gdbarch, orig_rip),
+ paddress (gdbarch, rip));
}
}
retaddr = (retaddr - insn_offset) & 0xffffffffffffffffULL;
write_memory_unsigned_integer (rsp, retaddr_len, byte_order, retaddr);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: relocated return addr at %s "
- "to %s\n",
- paddress (gdbarch, rsp),
- paddress (gdbarch, retaddr));
+ displaced_debug_printf ("relocated return addr at %s to %s",
+ paddress (gdbarch, rsp),
+ paddress (gdbarch, retaddr));
}
}
newrel = (oldloc - *to) + rel32;
store_signed_integer (insn + 1, 4, byte_order, newrel);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "Adjusted insn rel32=%s at %s to"
- " rel32=%s at %s\n",
- hex_string (rel32), paddress (gdbarch, oldloc),
- hex_string (newrel), paddress (gdbarch, *to));
+ displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
+ hex_string (rel32), paddress (gdbarch, oldloc),
+ hex_string (newrel), paddress (gdbarch, *to));
/* Write the adjusted jump into its displaced location. */
append_insns (to, 5, insn);
rel32 = extract_signed_integer (insn + offset, 4, byte_order);
newrel = (oldloc - *to) + rel32;
store_signed_integer (insn + offset, 4, byte_order, newrel);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "Adjusted insn rel32=%s at %s to"
- " rel32=%s at %s\n",
- hex_string (rel32), paddress (gdbarch, oldloc),
- hex_string (newrel), paddress (gdbarch, *to));
+ displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
+ hex_string (rel32), paddress (gdbarch, oldloc),
+ hex_string (newrel), paddress (gdbarch, *to));
}
/* Write the adjusted instruction into its displaced location. */
"andq $-XXX, %rsp" can be either 4 bytes or 7 bytes:
- 0x48 0x83 0xe4 0xf0 andq $-16, %rsp
- 0x48 0x81 0xe4 0x00 0xff 0xff 0xff andq $-256, %rsp
+ 0x48 0x83 0xe4 0xf0 andq $-16, %rsp
+ 0x48 0x81 0xe4 0x00 0xff 0xff 0xff andq $-256, %rsp
*/
gdb_byte buf[18];
"andq $-XXX, %rsp" can be either 4 bytes or 7 bytes:
- 0x48 0x83 0xe4 0xf0 andq $-16, %rsp
- 0x48 0x81 0xe4 0x00 0xff 0xff 0xff andq $-256, %rsp
+ 0x48 0x83 0xe4 0xf0 andq $-16, %rsp
+ 0x48 0x81 0xe4 0x00 0xff 0xff 0xff andq $-256, %rsp
"andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
- 0x83 0xe4 0xf0 andl $-16, %esp
- 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
+ 0x83 0xe4 0xf0 andl $-16, %esp
+ 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
*/
gdb_byte buf[19];
if (op == 0x55) /* pushq %rbp */
{
/* Take into account that we've executed the `pushq %rbp' that
- starts this instruction sequence. */
+ starts this instruction sequence. */
cache->saved_regs[AMD64_RBP_REGNUM] = 0;
cache->sp_offset += 8;
/* If that's all, return now. */
if (current_pc <= pc + 1)
- return current_pc;
+ return current_pc;
read_code (pc + 1, buf, 3);
start_pc_sal = find_pc_sect_line (start_pc, NULL, 0);
if (start_pc_sal.symtab == NULL
- || producer_is_gcc_ge_4 (COMPUNIT_PRODUCER
- (SYMTAB_COMPUNIT (start_pc_sal.symtab))) < 6
+ || producer_is_gcc_ge_4 (start_pc_sal.symtab->compunit ()
+ ->producer ()) < 6
|| start_pc_sal.pc != start_pc || pc >= start_pc_sal.end)
return pc;
{
/* 0x0f 0x29 0b??000101 movaps %xmmreg?,-0x??(%rbp) */
if (buf[offset] != 0x0f || buf[offset + 1] != 0x29
- || (buf[offset + 2] & 0x3f) != (xmmreg << 3 | 0x5))
+ || (buf[offset + 2] & 0x3f) != (xmmreg << 3 | 0x5))
return pc;
/* 0b01?????? */
struct compunit_symtab *cust = find_pc_compunit_symtab (func_addr);
/* LLVM backend (Clang/Flang) always emits a line note before the
- prologue and another one after. We trust clang to emit usable
- line notes. */
+ prologue and another one after. We trust clang and newer Intel
+ compilers to emit usable line notes. */
if (post_prologue_pc
&& (cust != NULL
- && COMPUNIT_PRODUCER (cust) != NULL
- && producer_is_llvm (COMPUNIT_PRODUCER (cust))))
+ && cust->producer () != nullptr
+ && (producer_is_llvm (cust->producer ())
+ || producer_is_icc_ge_19 (cust->producer ()))))
return std::max (start_pc, post_prologue_pc);
}
static const struct frame_unwind amd64_frame_unwind =
{
+ "amd64 prologue",
NORMAL_FRAME,
amd64_frame_unwind_stop_reason,
amd64_frame_this_id,
amd64_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
struct amd64_frame_cache *cache;
CORE_ADDR addr;
struct frame_info *this_frame,
void **this_cache)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
+ gdbarch *arch = get_frame_arch (this_frame);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
/* We shouldn't even bother if we don't have a sigcontext_addr
handler. */
static const struct frame_unwind amd64_sigtramp_frame_unwind =
{
+ "amd64 sigtramp",
SIGTRAMP_FRAME,
amd64_sigtramp_frame_unwind_stop_reason,
amd64_sigtramp_frame_this_id,
struct compunit_symtab *cust;
cust = find_pc_compunit_symtab (pc);
- if (cust != NULL && COMPUNIT_EPILOGUE_UNWIND_VALID (cust))
+ if (cust != NULL && cust->epilogue_unwind_valid ())
return 0;
if (target_read_memory (pc, &insn, 1))
static const struct frame_unwind amd64_epilogue_frame_unwind =
{
+ "amd64 epilogue",
NORMAL_FRAME,
amd64_epilogue_frame_unwind_stop_reason,
amd64_epilogue_frame_this_id,
int regnum, const void *fpregs, size_t len)
{
struct gdbarch *gdbarch = regcache->arch ();
- const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ const i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
gdb_assert (len >= tdep->sizeof_fpregset);
amd64_supply_fxsave (regcache, regnum, fpregs);
int regnum, void *fpregs, size_t len)
{
struct gdbarch *gdbarch = regcache->arch ();
- const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ const i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
gdb_assert (len >= tdep->sizeof_fpregset);
amd64_collect_fxsave (regcache, regnum, fpregs);
gdb_byte buf[8];
CORE_ADDR jb_addr;
struct gdbarch *gdbarch = get_frame_arch (frame);
- int jb_pc_offset = gdbarch_tdep (gdbarch)->jb_pc_offset;
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ int jb_pc_offset = tdep->jb_pc_offset;
int len = TYPE_LENGTH (builtin_type (gdbarch)->builtin_func_ptr);
/* If JB_PC_OFFSET is -1, we have no way to find out where the
amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch,
const target_desc *default_tdesc)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
const struct target_desc *tdesc = info.target_desc;
static const char *const stap_integer_prefixes[] = { "$", NULL };
static const char *const stap_register_prefixes[] = { "%", NULL };
set_gdbarch_in_indirect_branch_thunk (gdbarch,
amd64_in_indirect_branch_thunk);
+
+ register_amd64_ravenscar_ops (gdbarch);
}
/* Initialize ARCH for x86-64, no osabi. */
static struct type *
amd64_x32_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
switch (regnum - tdep->eax_regnum)
{
amd64_x32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch,
const target_desc *default_tdesc)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
amd64_init_abi (info, gdbarch, default_tdesc);
_initialize_amd64_tdep ()
{
gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x86_64, GDB_OSABI_NONE,
- amd64_none_init_abi);
+ amd64_none_init_abi);
gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x64_32, GDB_OSABI_NONE,
- amd64_x32_none_init_abi);
+ amd64_x32_none_init_abi);
}
\f
const void *fxsave)
{
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
i387_supply_fxsave (regcache, regnum, fxsave);
const void *xsave)
{
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
i387_supply_xsave (regcache, regnum, xsave);
void *fxsave)
{
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
gdb_byte *regs = (gdb_byte *) fxsave;
i387_collect_fxsave (regcache, regnum, fxsave);
void *xsave, int gcore)
{
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
gdb_byte *regs = (gdb_byte *) xsave;
i387_collect_xsave (regcache, regnum, xsave, gcore);
projects / binutils-gdb.git / blobdiff