gdb: include gdbsupport/buildargv.h in ser-mingw.c

[binutils-gdb.git] / gdb / arc-tdep.h

diff --git a/gdb/arc-tdep.h b/gdb/arc-tdep.h
index 6ca759a661d4bbd1a59dbde88820646f99c90e8d..0a8d1dc56464e5dbc0b11068076b36f72d723670 100644 (file)
--- a/gdb/arc-tdep.h
+++ b/gdb/arc-tdep.h
@@ -1,6 +1,6 @@
 /* Target dependent code for ARC architecture, for GDB.
 
-   Copyright 2005-2020 Free Software Foundation, Inc.
+   Copyright 2005-2022 Free Software Foundation, Inc.
    Contributed by Synopsys Inc.
 
    This file is part of GDB.
@@ -23,6 +23,7 @@
 
 /* Need disassemble_info.  */
 #include "dis-asm.h"
+#include "gdbarch.h"
 #include "arch/arc.h"
 
 /* To simplify GDB code this enum assumes that internal regnums should be same
@@ -84,7 +85,9 @@ enum arc_regnum
     ARC_LP_END_REGNUM,
     /* Branch target address.  */
     ARC_BTA_REGNUM,
-    ARC_LAST_AUX_REGNUM = ARC_BTA_REGNUM,
+    /* Exception return address.  */
+    ARC_ERET_REGNUM,
+    ARC_LAST_AUX_REGNUM = ARC_ERET_REGNUM,
     ARC_LAST_REGNUM = ARC_LAST_AUX_REGNUM,
 
     /* Additional ABI constants.  */
@@ -99,17 +102,46 @@ enum arc_regnum
    Longer registers are represented as pairs of 32-bit registers.  */
 #define ARC_REGISTER_SIZE  4
 
+/* STATUS32 register: hardware loops disabled bit.  */
+#define ARC_STATUS32_L_MASK (1 << 12)
+/* STATUS32 register: current instruction is a delay slot.  */
+#define ARC_STATUS32_DE_MASK (1 << 6)
+
+/* Special value for register offset arrays.  */
+#define ARC_OFFSET_NO_REGISTER (-1)
+
 #define arc_print(fmt, args...) fprintf_unfiltered (gdb_stdlog, fmt, ##args)
 
-extern int arc_debug;
+extern bool arc_debug;
+
+/* Print an "arc" debug statement.  */
+
+#define arc_debug_printf(fmt, ...) \
+  debug_prefixed_printf_cond (arc_debug, "arc", fmt, ##__VA_ARGS__)
 
 /* Target-dependent information.  */
 
-struct gdbarch_tdep
+struct arc_gdbarch_tdep : gdbarch_tdep
 {
   /* Offset to PC value in jump buffer.  If this is negative, longjmp
      support will be disabled.  */
-  int jb_pc;
+  int jb_pc = 0;
+
+  /* Whether target has hardware (aka zero-delay) loops.  */
+  bool has_hw_loops = false;
+
+  /* Detect sigtramp.  */
+  bool (*is_sigtramp) (struct frame_info *) = nullptr;
+
+  /* Get address of sigcontext for sigtramp.  */
+  CORE_ADDR (*sigcontext_addr) (struct frame_info *) = nullptr;
+
+  /* Offset of registers in `struct sigcontext'.  */
+  const int *sc_reg_offset = nullptr;
+
+  /* Number of registers in sc_reg_offsets.  Most likely a ARC_LAST_REGNUM,
+     but in theory it could be less, so it is kept separate.  */
+  int sc_num_regs = 0;
 };
 
 /* Utility functions used by other ARC-specific modules.  */
@@ -173,4 +205,9 @@ CORE_ADDR arc_insn_get_branch_target (const struct arc_instruction &insn);
 
 CORE_ADDR arc_insn_get_linear_next_pc (const struct arc_instruction &insn);
 
+/* Create an arc_arch_features instance from the provided data.  */
+
+arc_arch_features arc_arch_features_create (const bfd *abfd,
+                                           const unsigned long mach);
+
 #endif /* ARC_TDEP_H */