/* GNU/Linux on ARM native support.
- Copyright (C) 1999-2018 Free Software Foundation, Inc.
+ Copyright (C) 1999-2022 Free Software Foundation, Inc.
This file is part of GDB.
#include "observable.h"
#include "gdbthread.h"
+#include "aarch32-tdep.h"
#include "arm-tdep.h"
#include "arm-linux-tdep.h"
#include "aarch32-linux-nat.h"
#include <sys/procfs.h>
#include "nat/linux-ptrace.h"
+#include "linux-tdep.h"
/* Prototypes for supply_gregset etc. */
#include "gregset.h"
#define PTRACE_SETHBPREGS 30
#endif
-extern int arm_apcs_32;
-
class arm_linux_nat_target final : public linux_nat_target
{
public:
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
/* Read the floating point state. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
- perror_with_name (_("Unable to fetch the floating point registers."));
+ perror_with_name (_("Unable to fetch the floating point registers"));
/* Fetch fpsr. */
- regcache_raw_supply (regcache, ARM_FPS_REGNUM,
- fp + NWFPE_FPSR_OFFSET);
+ regcache->raw_supply (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
/* Fetch the floating point registers. */
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
/* Read the floating point state. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
- perror_with_name (_("Unable to fetch the floating point registers."));
+ perror_with_name (_("Unable to fetch the floating point registers"));
/* Store fpsr. */
- if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
- regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
+ if (REG_VALID == regcache->get_register_status (ARM_FPS_REGNUM))
+ regcache->raw_collect (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
/* Store the floating point registers. */
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
- if (REG_VALID == regcache_register_status (regcache, regno))
+ if (REG_VALID == regcache->get_register_status (regno))
collect_nwfpe_register (regcache, regno, fp);
if (have_ptrace_getregset == TRIBOOL_TRUE)
ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
if (ret < 0)
- perror_with_name (_("Unable to store floating point registers."));
+ perror_with_name (_("Unable to store floating point registers"));
}
/* Fetch all general registers of the process and store into
static void
fetch_regs (struct regcache *regcache)
{
- int ret, regno, tid;
+ int ret, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
- perror_with_name (_("Unable to fetch general registers."));
+ perror_with_name (_("Unable to fetch general registers"));
aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
}
static void
store_regs (const struct regcache *regcache)
{
- int ret, regno, tid;
+ int ret, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
/* Fetch the general registers. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
- perror_with_name (_("Unable to fetch general registers."));
+ perror_with_name (_("Unable to fetch general registers"));
aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
- perror_with_name (_("Unable to store general registers."));
+ perror_with_name (_("Unable to store general registers"));
}
/* Fetch all WMMX registers of the process and store into
regcache. */
-#define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
-
static void
fetch_wmmx_regs (struct regcache *regcache)
{
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- perror_with_name (_("Unable to fetch WMMX registers."));
+ perror_with_name (_("Unable to fetch WMMX registers"));
for (regno = 0; regno < 16; regno++)
- regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
- ®buf[regno * 8]);
+ regcache->raw_supply (regno + ARM_WR0_REGNUM, ®buf[regno * 8]);
for (regno = 0; regno < 2; regno++)
- regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
- ®buf[16 * 8 + regno * 4]);
+ regcache->raw_supply (regno + ARM_WCSSF_REGNUM,
+ ®buf[16 * 8 + regno * 4]);
for (regno = 0; regno < 4; regno++)
- regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
- ®buf[16 * 8 + 2 * 4 + regno * 4]);
+ regcache->raw_supply (regno + ARM_WCGR0_REGNUM,
+ ®buf[16 * 8 + 2 * 4 + regno * 4]);
}
static void
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- perror_with_name (_("Unable to fetch WMMX registers."));
+ perror_with_name (_("Unable to fetch WMMX registers"));
for (regno = 0; regno < 16; regno++)
- if (REG_VALID == regcache_register_status (regcache,
- regno + ARM_WR0_REGNUM))
- regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
- ®buf[regno * 8]);
+ if (REG_VALID == regcache->get_register_status (regno + ARM_WR0_REGNUM))
+ regcache->raw_collect (regno + ARM_WR0_REGNUM, ®buf[regno * 8]);
for (regno = 0; regno < 2; regno++)
- if (REG_VALID == regcache_register_status (regcache,
- regno + ARM_WCSSF_REGNUM))
- regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
- ®buf[16 * 8 + regno * 4]);
+ if (REG_VALID == regcache->get_register_status (regno + ARM_WCSSF_REGNUM))
+ regcache->raw_collect (regno + ARM_WCSSF_REGNUM,
+ ®buf[16 * 8 + regno * 4]);
for (regno = 0; regno < 4; regno++)
- if (REG_VALID == regcache_register_status (regcache,
- regno + ARM_WCGR0_REGNUM))
- regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
- ®buf[16 * 8 + 2 * 4 + regno * 4]);
+ if (REG_VALID == regcache->get_register_status (regno + ARM_WCGR0_REGNUM))
+ regcache->raw_collect (regno + ARM_WCGR0_REGNUM,
+ ®buf[16 * 8 + 2 * 4 + regno * 4]);
ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- perror_with_name (_("Unable to store WMMX registers."));
+ perror_with_name (_("Unable to store WMMX registers"));
}
static void
fetch_vfp_regs (struct regcache *regcache)
{
- gdb_byte regbuf[VFP_REGS_SIZE];
- int ret, regno, tid;
+ gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
+ int ret, tid;
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = regbuf;
- iov.iov_len = VFP_REGS_SIZE;
+ iov.iov_len = ARM_VFP3_REGS_SIZE;
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
}
else
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
if (ret < 0)
- perror_with_name (_("Unable to fetch VFP registers."));
+ perror_with_name (_("Unable to fetch VFP registers"));
aarch32_vfp_regcache_supply (regcache, regbuf,
tdep->vfp_register_count);
static void
store_vfp_regs (const struct regcache *regcache)
{
- gdb_byte regbuf[VFP_REGS_SIZE];
- int ret, regno, tid;
+ gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
+ int ret, tid;
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
/* Get the thread id for the ptrace call. */
- tid = ptid_get_lwp (regcache_get_ptid (regcache));
+ tid = regcache->ptid ().lwp ();
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = regbuf;
- iov.iov_len = VFP_REGS_SIZE;
+ iov.iov_len = ARM_VFP3_REGS_SIZE;
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
}
else
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
if (ret < 0)
- perror_with_name (_("Unable to fetch VFP registers (for update)."));
+ perror_with_name (_("Unable to fetch VFP registers (for update)"));
aarch32_vfp_regcache_collect (regcache, regbuf,
tdep->vfp_register_count);
struct iovec iov;
iov.iov_base = regbuf;
- iov.iov_len = VFP_REGS_SIZE;
+ iov.iov_len = ARM_VFP3_REGS_SIZE;
ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
}
else
ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
if (ret < 0)
- perror_with_name (_("Unable to store VFP registers."));
+ perror_with_name (_("Unable to store VFP registers"));
}
/* Fetch registers from the child process. Fetch all registers if
arm_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
{
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
if (-1 == regno)
{
arm_linux_nat_target::store_registers (struct regcache *regcache, int regno)
{
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
if (-1 == regno)
{
ps_err_e
ps_get_thread_area (struct ps_prochandle *ph,
- lwpid_t lwpid, int idx, void **base)
+ lwpid_t lwpid, int idx, void **base)
{
if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
return PS_ERR;
const struct target_desc *
arm_linux_nat_target::read_description ()
{
- CORE_ADDR arm_hwcap = 0;
+ CORE_ADDR arm_hwcap = linux_get_hwcap (this);
if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
{
elf_gregset_t gpregs;
struct iovec iov;
- int tid = ptid_get_lwp (inferior_ptid);
+ int tid = inferior_ptid.pid ();
iov.iov_base = &gpregs;
iov.iov_len = sizeof (gpregs);
have_ptrace_getregset = TRIBOOL_TRUE;
}
- if (target_auxv_search (this, AT_HWCAP, &arm_hwcap) != 1)
- {
- return this->beneath->read_description ();
- }
-
if (arm_hwcap & HWCAP_IWMMXT)
- return tdesc_arm_with_iwmmxt;
+ return arm_read_description (ARM_FP_TYPE_IWMMXT, false);
if (arm_hwcap & HWCAP_VFP)
{
- int pid;
- char *buf;
- const struct target_desc * result = NULL;
+ /* Make sure that the kernel supports reading VFP registers. Support was
+ added in 2.6.30. */
+ int pid = inferior_ptid.pid ();
+ errno = 0;
+ char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
+ if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
+ return nullptr;
/* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
Neon with VFPv3-D32. */
if (arm_hwcap & HWCAP_NEON)
- result = tdesc_arm_with_neon;
+ return aarch32_read_description ();
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
- result = tdesc_arm_with_vfpv3;
- else
- result = tdesc_arm_with_vfpv2;
+ return arm_read_description (ARM_FP_TYPE_VFPV3, false);
- /* Now make sure that the kernel supports reading these
- registers. Support was added in 2.6.30. */
- pid = ptid_get_lwp (inferior_ptid);
- errno = 0;
- buf = (char *) alloca (VFP_REGS_SIZE);
- if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
- && errno == EIO)
- result = NULL;
-
- return result;
+ return arm_read_description (ARM_FP_TYPE_VFPV2, false);
}
- return this->beneath->read_description ();
+ return this->beneath ()->read_description ();
}
/* Information describing the hardware breakpoint capabilities. */
int tid;
unsigned int val;
- tid = ptid_get_lwp (inferior_ptid);
+ tid = inferior_ptid.lwp ();
if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
available = 0;
else
info.bp_count = (gdb_byte)(val & 0xff);
if (info.wp_count > MAX_WPTS)
- {
- warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
- supports %d"), MAX_WPTS, info.wp_count);
- info.wp_count = MAX_WPTS;
- }
+ {
+ warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
+ supports %d"), MAX_WPTS, info.wp_count);
+ info.wp_count = MAX_WPTS;
+ }
if (info.bp_count > MAX_BPTS)
- {
- warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
- supports %d"), MAX_BPTS, info.bp_count);
- info.bp_count = MAX_BPTS;
- }
+ {
+ warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
+ supports %d"), MAX_BPTS, info.bp_count);
+ info.bp_count = MAX_BPTS;
+ }
available = (info.arch != 0);
}
}
return -1;
}
else
- gdb_assert (FALSE);
+ gdb_assert_not_reached ("unknown breakpoint type");
return 1;
}
The Linux vector is indexed as follows:
-((i << 1) + 2): Control register for watchpoint i.
-((i << 1) + 1): Address register for watchpoint i.
- 0: Information register.
+ 0: Information register.
((i << 1) + 1): Address register for breakpoint i.
((i << 1) + 2): Control register for breakpoint i.
/* Callback to mark a watch-/breakpoint to be updated in all threads of
the current process. */
-struct update_registers_data
-{
- int watch;
- int index;
-};
-
static int
-update_registers_callback (struct lwp_info *lwp, void *arg)
+update_registers_callback (struct lwp_info *lwp, int watch, int index)
{
- struct update_registers_data *data = (struct update_registers_data *) arg;
-
if (lwp->arch_private == NULL)
lwp->arch_private = XCNEW (struct arch_lwp_info);
/* The actual update is done later just before resuming the lwp,
we just mark that the registers need updating. */
- if (data->watch)
- lwp->arch_private->wpts_changed[data->index] = 1;
+ if (watch)
+ lwp->arch_private->wpts_changed[index] = 1;
else
- lwp->arch_private->bpts_changed[data->index] = 1;
+ lwp->arch_private->bpts_changed[index] = 1;
/* If the lwp isn't stopped, force it to momentarily pause, so
we can update its breakpoint registers. */
=1) BPT for thread TID. */
static void
arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
- int watchpoint)
+ int watchpoint)
{
int pid;
ptid_t pid_ptid;
gdb_byte count, i;
struct arm_linux_hw_breakpoint* bpts;
- struct update_registers_data data;
- pid = ptid_get_pid (inferior_ptid);
- pid_ptid = pid_to_ptid (pid);
+ pid = inferior_ptid.pid ();
+ pid_ptid = ptid_t (pid);
if (watchpoint)
{
for (i = 0; i < count; ++i)
if (!arm_hwbp_control_is_enabled (bpts[i].control))
{
- data.watch = watchpoint;
- data.index = i;
- bpts[i] = *bpt;
- iterate_over_lwps (pid_ptid, update_registers_callback, &data);
- break;
+ bpts[i] = *bpt;
+ iterate_over_lwps (pid_ptid,
+ [=] (struct lwp_info *info)
+ {
+ return update_registers_callback (info, watchpoint,
+ i);
+ });
+ break;
}
gdb_assert (i != count);
(WATCHPOINT = 1) BPT for thread TID. */
static void
arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
- int watchpoint)
+ int watchpoint)
{
int pid;
gdb_byte count, i;
ptid_t pid_ptid;
struct arm_linux_hw_breakpoint* bpts;
- struct update_registers_data data;
- pid = ptid_get_pid (inferior_ptid);
- pid_ptid = pid_to_ptid (pid);
+ pid = inferior_ptid.pid ();
+ pid_ptid = ptid_t (pid);
if (watchpoint)
{
for (i = 0; i < count; ++i)
if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
{
- data.watch = watchpoint;
- data.index = i;
- bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
- iterate_over_lwps (pid_ptid, update_registers_callback, &data);
- break;
+ bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
+ iterate_over_lwps (pid_ptid,
+ [=] (struct lwp_info *info)
+ {
+ return update_registers_callback (info, watchpoint,
+ i);
+ });
+ break;
}
gdb_assert (i != count);
arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_breakpoint_count () == 0)
arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_breakpoint_count () == 0)
enum target_hw_bp_type rw,
struct expression *cond)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_watchpoint_count () == 0)
int len, enum target_hw_bp_type rw,
struct expression *cond)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_watchpoint_count () == 0)
struct arm_linux_hw_breakpoint *bpts, *wpts;
struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
- pid = ptid_get_lwp (lwp->ptid);
- bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
- wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
+ pid = lwp->ptid.lwp ();
+ bpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->bpts;
+ wpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->wpts;
/* NULL means this is the main thread still going through the shell,
or, no watchpoint has been set yet. In that case, there's
for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
if (arm_lwp_info->bpts_changed[i])
{
- errno = 0;
- if (arm_hwbp_control_is_enabled (bpts[i].control))
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
- perror_with_name (_("Unexpected error setting breakpoint"));
-
- if (bpts[i].control != 0)
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
- perror_with_name (_("Unexpected error setting breakpoint"));
-
- arm_lwp_info->bpts_changed[i] = 0;
+ errno = 0;
+ if (arm_hwbp_control_is_enabled (bpts[i].control))
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
+ perror_with_name (_("Unexpected error setting breakpoint"));
+
+ if (bpts[i].control != 0)
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
+ perror_with_name (_("Unexpected error setting breakpoint"));
+
+ arm_lwp_info->bpts_changed[i] = 0;
}
for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
if (arm_lwp_info->wpts_changed[i])
{
- errno = 0;
- if (arm_hwbp_control_is_enabled (wpts[i].control))
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
- perror_with_name (_("Unexpected error setting watchpoint"));
-
- if (wpts[i].control != 0)
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
- perror_with_name (_("Unexpected error setting watchpoint"));
-
- arm_lwp_info->wpts_changed[i] = 0;
+ errno = 0;
+ if (arm_hwbp_control_is_enabled (wpts[i].control))
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
+ perror_with_name (_("Unexpected error setting watchpoint"));
+
+ if (wpts[i].control != 0)
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
+ perror_with_name (_("Unexpected error setting watchpoint"));
+
+ arm_lwp_info->wpts_changed[i] = 0;
}
}
new process so that all breakpoints and watchpoints can be
removed together. */
- parent_pid = ptid_get_pid (parent->ptid);
+ parent_pid = parent->ptid.pid ();
parent_state = arm_linux_get_debug_reg_state (parent_pid);
child_state = arm_linux_get_debug_reg_state (child_pid);
*child_state = *parent_state;
}
+void _initialize_arm_linux_nat ();
void
-_initialize_arm_linux_nat (void)
+_initialize_arm_linux_nat ()
{
/* Register the target. */
linux_target = &the_arm_linux_nat_target;
projects / binutils-gdb.git / blobdiff