/* GNU/Linux on ARM native support.
- Copyright (C) 1999-2015 Free Software Foundation, Inc.
+ Copyright (C) 1999-2022 Free Software Foundation, Inc.
This file is part of GDB.
#include "linux-nat.h"
#include "target-descriptions.h"
#include "auxv.h"
-#include "observer.h"
+#include "observable.h"
#include "gdbthread.h"
+#include "aarch32-tdep.h"
#include "arm-tdep.h"
#include "arm-linux-tdep.h"
+#include "aarch32-linux-nat.h"
#include <elf/common.h>
#include <sys/user.h>
-#include <sys/ptrace.h>
+#include "nat/gdb_ptrace.h"
#include <sys/utsname.h>
#include <sys/procfs.h>
+#include "nat/linux-ptrace.h"
+#include "linux-tdep.h"
+
/* Prototypes for supply_gregset etc. */
#include "gregset.h"
#define PTRACE_SETHBPREGS 30
#endif
-extern int arm_apcs_32;
+class arm_linux_nat_target final : public linux_nat_target
+{
+public:
+ /* Add our register access methods. */
+ void fetch_registers (struct regcache *, int) override;
+ void store_registers (struct regcache *, int) override;
-/* On GNU/Linux, threads are implemented as pseudo-processes, in which
- case we may be tracing more than one process at a time. In that
- case, inferior_ptid will contain the main process ID and the
- individual thread (process) ID. get_thread_id () is used to get
- the thread id if it's available, and the process id otherwise. */
+ /* Add our hardware breakpoint and watchpoint implementation. */
+ int can_use_hw_breakpoint (enum bptype, int, int) override;
-static int
-get_thread_id (ptid_t ptid)
-{
- int tid = ptid_get_lwp (ptid);
- if (0 == tid)
- tid = ptid_get_pid (ptid);
- return tid;
-}
+ int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
-#define GET_THREAD_ID(PTID) get_thread_id (PTID)
+ int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
-/* Get the value of a particular register from the floating point
- state of the process and store it into regcache. */
+ int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
-static void
-fetch_fpregister (struct regcache *regcache, int regno)
-{
- int ret, tid;
- gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
-
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
+ struct expression *) override;
- /* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
- if (ret < 0)
- {
- warning (_("Unable to fetch floating point register."));
- return;
- }
+ int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
+ struct expression *) override;
+ bool stopped_by_watchpoint () override;
- /* Fetch fpsr. */
- if (ARM_FPS_REGNUM == regno)
- regcache_raw_supply (regcache, ARM_FPS_REGNUM,
- fp + NWFPE_FPSR_OFFSET);
+ bool stopped_data_address (CORE_ADDR *) override;
- /* Fetch the floating point register. */
- if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
- supply_nwfpe_register (regcache, regno, fp);
-}
+ bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
+
+ const struct target_desc *read_description () override;
+
+ /* Override linux_nat_target low methods. */
+
+ /* Handle thread creation and exit. */
+ void low_new_thread (struct lwp_info *lp) override;
+ void low_delete_thread (struct arch_lwp_info *lp) override;
+ void low_prepare_to_resume (struct lwp_info *lp) override;
+
+ /* Handle process creation and exit. */
+ void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
+ void low_forget_process (pid_t pid) override;
+};
+
+static arm_linux_nat_target the_arm_linux_nat_target;
/* Get the whole floating point state of the process and store it
into regcache. */
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
+ tid = regcache->ptid ().lwp ();
+
/* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch the floating point registers."));
- return;
+ struct iovec iov;
+
+ iov.iov_base = &fp;
+ iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
+
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
}
+ else
+ ret = ptrace (PT_GETFPREGS, tid, 0, fp);
+
+ if (ret < 0)
+ perror_with_name (_("Unable to fetch the floating point registers."));
/* Fetch fpsr. */
- regcache_raw_supply (regcache, ARM_FPS_REGNUM,
- fp + NWFPE_FPSR_OFFSET);
+ regcache->raw_supply (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
/* Fetch the floating point registers. */
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
supply_nwfpe_register (regcache, regno, fp);
}
-/* Save a particular register into the floating point state of the
- process using the contents from regcache. */
-
-static void
-store_fpregister (const struct regcache *regcache, int regno)
-{
- int ret, tid;
- gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
-
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- /* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
- if (ret < 0)
- {
- warning (_("Unable to fetch the floating point registers."));
- return;
- }
-
- /* Store fpsr. */
- if (ARM_FPS_REGNUM == regno
- && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
- regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
-
- /* Store the floating point register. */
- if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
- collect_nwfpe_register (regcache, regno, fp);
-
- ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
- if (ret < 0)
- {
- warning (_("Unable to store floating point register."));
- return;
- }
-}
-
/* Save the whole floating point state of the process using
the contents from regcache. */
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
+ tid = regcache->ptid ().lwp ();
+
/* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch the floating point registers."));
- return;
+ elf_fpregset_t fpregs;
+ struct iovec iov;
+
+ iov.iov_base = &fpregs;
+ iov.iov_len = sizeof (fpregs);
+
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
}
+ else
+ ret = ptrace (PT_GETFPREGS, tid, 0, fp);
+
+ if (ret < 0)
+ perror_with_name (_("Unable to fetch the floating point registers."));
/* Store fpsr. */
- if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
- regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
+ if (REG_VALID == regcache->get_register_status (ARM_FPS_REGNUM))
+ regcache->raw_collect (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
/* Store the floating point registers. */
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
- if (REG_VALID == regcache_register_status (regcache, regno))
+ if (REG_VALID == regcache->get_register_status (regno))
collect_nwfpe_register (regcache, regno, fp);
- ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to store floating point registers."));
- return;
- }
-}
-
-/* Fetch a general register of the process and store into
- regcache. */
+ struct iovec iov;
-static void
-fetch_register (struct regcache *regcache, int regno)
-{
- int ret, tid;
- elf_gregset_t regs;
+ iov.iov_base = &fp;
+ iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
- if (ret < 0)
- {
- warning (_("Unable to fetch general register."));
- return;
+ ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
}
+ else
+ ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
- if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
- regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
-
- if (ARM_PS_REGNUM == regno)
- {
- if (arm_apcs_32)
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
- else
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
- }
-
- if (ARM_PC_REGNUM == regno)
- {
- regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
- (get_regcache_arch (regcache),
- regs[ARM_PC_REGNUM]);
- regcache_raw_supply (regcache, ARM_PC_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
- }
+ if (ret < 0)
+ perror_with_name (_("Unable to store floating point registers."));
}
/* Fetch all general registers of the process and store into
static void
fetch_regs (struct regcache *regcache)
{
- int ret, regno, tid;
+ int ret, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
- if (ret < 0)
+ tid = regcache->ptid ().lwp ();
+
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch general registers."));
- return;
- }
+ struct iovec iov;
- for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
- regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
+ iov.iov_base = ®s;
+ iov.iov_len = sizeof (regs);
- if (arm_apcs_32)
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
+ }
else
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
- regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
- (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
- regcache_raw_supply (regcache, ARM_PC_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
-}
+ if (ret < 0)
+ perror_with_name (_("Unable to fetch general registers."));
-/* Store all general registers of the process from the values in
- regcache. */
+ aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
+}
static void
-store_register (const struct regcache *regcache, int regno)
+store_regs (const struct regcache *regcache)
{
int ret, tid;
elf_gregset_t regs;
-
- if (REG_VALID != regcache_register_status (regcache, regno))
- return;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- /* Get the general registers from the process. */
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
- if (ret < 0)
+ tid = regcache->ptid ().lwp ();
+
+ /* Fetch the general registers. */
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch general registers."));
- return;
- }
+ struct iovec iov;
- if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
- regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
- else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
- regcache_raw_collect (regcache, regno,
- (char *) ®s[ARM_CPSR_GREGNUM]);
- else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
- regcache_raw_collect (regcache, ARM_PC_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
+ iov.iov_base = ®s;
+ iov.iov_len = sizeof (regs);
- ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
- if (ret < 0)
- {
- warning (_("Unable to store general register."));
- return;
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
}
-}
-
-static void
-store_regs (const struct regcache *regcache)
-{
- int ret, regno, tid;
- elf_gregset_t regs;
+ else
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- /* Fetch the general registers. */
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
- {
- warning (_("Unable to fetch general registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch general registers."));
+
+ aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
- for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- if (REG_VALID == regcache_register_status (regcache, regno))
- regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
- }
+ struct iovec iov;
- if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
- regcache_raw_collect (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
+ iov.iov_base = ®s;
+ iov.iov_len = sizeof (regs);
- ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
+ ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
- {
- warning (_("Unable to store general registers."));
- return;
- }
+ perror_with_name (_("Unable to store general registers."));
}
/* Fetch all WMMX registers of the process and store into
regcache. */
-#define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
-
static void
fetch_wmmx_regs (struct regcache *regcache)
{
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = regcache->ptid ().lwp ();
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to fetch WMMX registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch WMMX registers."));
for (regno = 0; regno < 16; regno++)
- regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
- ®buf[regno * 8]);
+ regcache->raw_supply (regno + ARM_WR0_REGNUM, ®buf[regno * 8]);
for (regno = 0; regno < 2; regno++)
- regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
- ®buf[16 * 8 + regno * 4]);
+ regcache->raw_supply (regno + ARM_WCSSF_REGNUM,
+ ®buf[16 * 8 + regno * 4]);
for (regno = 0; regno < 4; regno++)
- regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
- ®buf[16 * 8 + 2 * 4 + regno * 4]);
+ regcache->raw_supply (regno + ARM_WCGR0_REGNUM,
+ ®buf[16 * 8 + 2 * 4 + regno * 4]);
}
static void
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = regcache->ptid ().lwp ();
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to fetch WMMX registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch WMMX registers."));
for (regno = 0; regno < 16; regno++)
- if (REG_VALID == regcache_register_status (regcache,
- regno + ARM_WR0_REGNUM))
- regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
- ®buf[regno * 8]);
+ if (REG_VALID == regcache->get_register_status (regno + ARM_WR0_REGNUM))
+ regcache->raw_collect (regno + ARM_WR0_REGNUM, ®buf[regno * 8]);
for (regno = 0; regno < 2; regno++)
- if (REG_VALID == regcache_register_status (regcache,
- regno + ARM_WCSSF_REGNUM))
- regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
- ®buf[16 * 8 + regno * 4]);
+ if (REG_VALID == regcache->get_register_status (regno + ARM_WCSSF_REGNUM))
+ regcache->raw_collect (regno + ARM_WCSSF_REGNUM,
+ ®buf[16 * 8 + regno * 4]);
for (regno = 0; regno < 4; regno++)
- if (REG_VALID == regcache_register_status (regcache,
- regno + ARM_WCGR0_REGNUM))
- regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
- ®buf[16 * 8 + 2 * 4 + regno * 4]);
+ if (REG_VALID == regcache->get_register_status (regno + ARM_WCGR0_REGNUM))
+ regcache->raw_collect (regno + ARM_WCGR0_REGNUM,
+ ®buf[16 * 8 + 2 * 4 + regno * 4]);
ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to store WMMX registers."));
- return;
- }
+ perror_with_name (_("Unable to store WMMX registers."));
}
-/* Fetch and store VFP Registers. The kernel object has space for 32
- 64-bit registers, and the FPSCR. This is even when on a VFPv2 or
- VFPv3D16 target. */
-#define VFP_REGS_SIZE (32 * 8 + 4)
-
static void
fetch_vfp_regs (struct regcache *regcache)
{
- char regbuf[VFP_REGS_SIZE];
- int ret, regno, tid;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
+ int ret, tid;
+ struct gdbarch *gdbarch = regcache->arch ();
+ arm_gdbarch_tdep *tdep = (arm_gdbarch_tdep *) gdbarch_tdep (gdbarch);
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = regcache->ptid ().lwp ();
- ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch VFP registers."));
- return;
+ struct iovec iov;
+
+ iov.iov_base = regbuf;
+ iov.iov_len = ARM_VFP3_REGS_SIZE;
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
}
+ else
+ ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
- for (regno = 0; regno < tdep->vfp_register_count; regno++)
- regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
- (char *) regbuf + regno * 8);
+ if (ret < 0)
+ perror_with_name (_("Unable to fetch VFP registers."));
- regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
- (char *) regbuf + 32 * 8);
+ aarch32_vfp_regcache_supply (regcache, regbuf,
+ tdep->vfp_register_count);
}
static void
store_vfp_regs (const struct regcache *regcache)
{
- char regbuf[VFP_REGS_SIZE];
- int ret, regno, tid;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
+ int ret, tid;
+ struct gdbarch *gdbarch = regcache->arch ();
+ arm_gdbarch_tdep *tdep = (arm_gdbarch_tdep *) gdbarch_tdep (gdbarch);
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = regcache->ptid ().lwp ();
- ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch VFP registers (for update)."));
- return;
- }
+ struct iovec iov;
- for (regno = 0; regno < tdep->vfp_register_count; regno++)
- regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
- (char *) regbuf + regno * 8);
+ iov.iov_base = regbuf;
+ iov.iov_len = ARM_VFP3_REGS_SIZE;
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
- regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
- (char *) regbuf + 32 * 8);
+ if (ret < 0)
+ perror_with_name (_("Unable to fetch VFP registers (for update)."));
- ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
+ aarch32_vfp_regcache_collect (regcache, regbuf,
+ tdep->vfp_register_count);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to store VFP registers."));
- return;
+ struct iovec iov;
+
+ iov.iov_base = regbuf;
+ iov.iov_len = ARM_VFP3_REGS_SIZE;
+ ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
}
+ else
+ ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
+
+ if (ret < 0)
+ perror_with_name (_("Unable to store VFP registers."));
}
/* Fetch registers from the child process. Fetch all registers if
regno == -1, otherwise fetch all general registers or all floating
point registers depending upon the value of regno. */
-static void
-arm_linux_fetch_inferior_registers (struct target_ops *ops,
- struct regcache *regcache, int regno)
+void
+arm_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ struct gdbarch *gdbarch = regcache->arch ();
+ arm_gdbarch_tdep *tdep = (arm_gdbarch_tdep *) gdbarch_tdep (gdbarch);
if (-1 == regno)
{
fetch_regs (regcache);
- fetch_fpregs (regcache);
if (tdep->have_wmmx_registers)
fetch_wmmx_regs (regcache);
if (tdep->vfp_register_count > 0)
fetch_vfp_regs (regcache);
+ if (tdep->have_fpa_registers)
+ fetch_fpregs (regcache);
}
- else
+ else
{
if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
- fetch_register (regcache, regno);
+ fetch_regs (regcache);
else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
- fetch_fpregister (regcache, regno);
+ fetch_fpregs (regcache);
else if (tdep->have_wmmx_registers
&& regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
fetch_wmmx_regs (regcache);
else if (tdep->vfp_register_count > 0
&& regno >= ARM_D0_REGNUM
- && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
+ && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
+ || regno == ARM_FPSCR_REGNUM))
fetch_vfp_regs (regcache);
}
}
regno == -1, otherwise store all general registers or all floating
point registers depending upon the value of regno. */
-static void
-arm_linux_store_inferior_registers (struct target_ops *ops,
- struct regcache *regcache, int regno)
+void
+arm_linux_nat_target::store_registers (struct regcache *regcache, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ struct gdbarch *gdbarch = regcache->arch ();
+ arm_gdbarch_tdep *tdep = (arm_gdbarch_tdep *) gdbarch_tdep (gdbarch);
if (-1 == regno)
{
store_regs (regcache);
- store_fpregs (regcache);
if (tdep->have_wmmx_registers)
store_wmmx_regs (regcache);
if (tdep->vfp_register_count > 0)
store_vfp_regs (regcache);
+ if (tdep->have_fpa_registers)
+ store_fpregs (regcache);
}
else
{
if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
- store_register (regcache, regno);
+ store_regs (regcache);
else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
- store_fpregister (regcache, regno);
+ store_fpregs (regcache);
else if (tdep->have_wmmx_registers
&& regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
store_wmmx_regs (regcache);
else if (tdep->vfp_register_count > 0
&& regno >= ARM_D0_REGNUM
- && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
+ && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
+ || regno == ARM_FPSCR_REGNUM))
store_vfp_regs (regcache);
}
}
/* Fetch the thread-local storage pointer for libthread_db. */
ps_err_e
-ps_get_thread_area (const struct ps_prochandle *ph,
- lwpid_t lwpid, int idx, void **base)
+ps_get_thread_area (struct ps_prochandle *ph,
+ lwpid_t lwpid, int idx, void **base)
{
if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
return PS_ERR;
return PS_OK;
}
-static const struct target_desc *
-arm_linux_read_description (struct target_ops *ops)
+const struct target_desc *
+arm_linux_nat_target::read_description ()
{
- CORE_ADDR arm_hwcap = 0;
+ CORE_ADDR arm_hwcap = linux_get_hwcap (this);
- if (have_ptrace_getregset == -1)
+ if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
{
elf_gregset_t gpregs;
struct iovec iov;
- int tid = GET_THREAD_ID (inferior_ptid);
+ int tid = inferior_ptid.pid ();
iov.iov_base = &gpregs;
iov.iov_len = sizeof (gpregs);
/* Check if PTRACE_GETREGSET works. */
if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
- have_ptrace_getregset = 0;
+ have_ptrace_getregset = TRIBOOL_FALSE;
else
- have_ptrace_getregset = 1;
- }
-
- if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
- {
- return ops->beneath->to_read_description (ops->beneath);
+ have_ptrace_getregset = TRIBOOL_TRUE;
}
if (arm_hwcap & HWCAP_IWMMXT)
- return tdesc_arm_with_iwmmxt;
+ return arm_read_description (ARM_FP_TYPE_IWMMXT);
if (arm_hwcap & HWCAP_VFP)
{
- int pid;
- char *buf;
- const struct target_desc * result = NULL;
+ /* Make sure that the kernel supports reading VFP registers. Support was
+ added in 2.6.30. */
+ int pid = inferior_ptid.pid ();
+ errno = 0;
+ char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
+ if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
+ return nullptr;
/* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
Neon with VFPv3-D32. */
if (arm_hwcap & HWCAP_NEON)
- result = tdesc_arm_with_neon;
+ return aarch32_read_description ();
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
- result = tdesc_arm_with_vfpv3;
- else
- result = tdesc_arm_with_vfpv2;
-
- /* Now make sure that the kernel supports reading these
- registers. Support was added in 2.6.30. */
- pid = ptid_get_lwp (inferior_ptid);
- errno = 0;
- buf = alloca (VFP_REGS_SIZE);
- if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
- && errno == EIO)
- result = NULL;
+ return arm_read_description (ARM_FP_TYPE_VFPV3);
- return result;
+ return arm_read_description (ARM_FP_TYPE_VFPV2);
}
- return ops->beneath->to_read_description (ops->beneath);
+ return this->beneath ()->read_description ();
}
/* Information describing the hardware breakpoint capabilities. */
int tid;
unsigned int val;
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = inferior_ptid.lwp ();
if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
available = 0;
else
info.bp_count = (gdb_byte)(val & 0xff);
if (info.wp_count > MAX_WPTS)
- {
- warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
- supports %d"), MAX_WPTS, info.wp_count);
- info.wp_count = MAX_WPTS;
- }
+ {
+ warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
+ supports %d"), MAX_WPTS, info.wp_count);
+ info.wp_count = MAX_WPTS;
+ }
if (info.bp_count > MAX_BPTS)
- {
- warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
- supports %d"), MAX_BPTS, info.bp_count);
- info.bp_count = MAX_BPTS;
- }
+ {
+ warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
+ supports %d"), MAX_BPTS, info.bp_count);
+ info.bp_count = MAX_BPTS;
+ }
available = (info.arch != 0);
}
}
/* Have we got a free break-/watch-point available for use? Returns -1 if
there is not an appropriate resource available, otherwise returns 1. */
-static int
-arm_linux_can_use_hw_breakpoint (struct target_ops *self,
- int type, int cnt, int ot)
+int
+arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
+ int cnt, int ot)
{
if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
|| type == bp_access_watchpoint || type == bp_watchpoint)
return -1;
}
else
- gdb_assert (FALSE);
+ gdb_assert_not_reached ("unknown breakpoint type");
return 1;
}
The Linux vector is indexed as follows:
-((i << 1) + 2): Control register for watchpoint i.
-((i << 1) + 1): Address register for watchpoint i.
- 0: Information register.
+ 0: Information register.
((i << 1) + 1): Address register for breakpoint i.
((i << 1) + 2): Control register for breakpoint i.
{
struct arm_linux_process_info *proc;
- proc = xcalloc (1, sizeof (*proc));
+ proc = XCNEW (struct arm_linux_process_info);
proc->pid = pid;
proc->next = arm_linux_process_list;
/* Called whenever GDB is no longer debugging process PID. It deletes
data structures that keep track of debug register state. */
-static void
-arm_linux_forget_process (pid_t pid)
+void
+arm_linux_nat_target::low_forget_process (pid_t pid)
{
struct arm_linux_process_info *proc, **proc_link;
p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
}
-/* Get the ARM hardware breakpoint type from the RW value we're given when
- asked to set a watchpoint. */
+/* Get the ARM hardware breakpoint type from the TYPE value we're
+ given when asked to set a watchpoint. */
static arm_hwbp_type
-arm_linux_get_hwbp_type (int rw)
+arm_linux_get_hwbp_type (enum target_hw_bp_type type)
{
- if (rw == hw_read)
+ if (type == hw_read)
return arm_hwbp_load;
- else if (rw == hw_write)
+ else if (type == hw_write)
return arm_hwbp_store;
else
return arm_hwbp_access;
/* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
to LEN. The type of watchpoint is given in RW. */
static void
-arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
+arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
struct arm_linux_hw_breakpoint *p)
{
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
p->address = (unsigned int) addr;
p->control = arm_hwbp_control_initialize (mask,
- arm_linux_get_hwbp_type (rw), 1);
+ arm_linux_get_hwbp_type (type), 1);
}
/* Are two break-/watch-points equal? */
/* Callback to mark a watch-/breakpoint to be updated in all threads of
the current process. */
-struct update_registers_data
-{
- int watch;
- int index;
-};
-
static int
-update_registers_callback (struct lwp_info *lwp, void *arg)
+update_registers_callback (struct lwp_info *lwp, int watch, int index)
{
- struct update_registers_data *data = (struct update_registers_data *) arg;
-
if (lwp->arch_private == NULL)
lwp->arch_private = XCNEW (struct arch_lwp_info);
/* The actual update is done later just before resuming the lwp,
we just mark that the registers need updating. */
- if (data->watch)
- lwp->arch_private->wpts_changed[data->index] = 1;
+ if (watch)
+ lwp->arch_private->wpts_changed[index] = 1;
else
- lwp->arch_private->bpts_changed[data->index] = 1;
+ lwp->arch_private->bpts_changed[index] = 1;
/* If the lwp isn't stopped, force it to momentarily pause, so
we can update its breakpoint registers. */
=1) BPT for thread TID. */
static void
arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
- int watchpoint)
+ int watchpoint)
{
int pid;
ptid_t pid_ptid;
gdb_byte count, i;
struct arm_linux_hw_breakpoint* bpts;
- struct update_registers_data data;
- pid = ptid_get_pid (inferior_ptid);
- pid_ptid = pid_to_ptid (pid);
+ pid = inferior_ptid.pid ();
+ pid_ptid = ptid_t (pid);
if (watchpoint)
{
for (i = 0; i < count; ++i)
if (!arm_hwbp_control_is_enabled (bpts[i].control))
{
- data.watch = watchpoint;
- data.index = i;
- bpts[i] = *bpt;
- iterate_over_lwps (pid_ptid, update_registers_callback, &data);
- break;
+ bpts[i] = *bpt;
+ iterate_over_lwps (pid_ptid,
+ [=] (struct lwp_info *info)
+ {
+ return update_registers_callback (info, watchpoint,
+ i);
+ });
+ break;
}
gdb_assert (i != count);
(WATCHPOINT = 1) BPT for thread TID. */
static void
arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
- int watchpoint)
+ int watchpoint)
{
int pid;
gdb_byte count, i;
ptid_t pid_ptid;
struct arm_linux_hw_breakpoint* bpts;
- struct update_registers_data data;
- pid = ptid_get_pid (inferior_ptid);
- pid_ptid = pid_to_ptid (pid);
+ pid = inferior_ptid.pid ();
+ pid_ptid = ptid_t (pid);
if (watchpoint)
{
for (i = 0; i < count; ++i)
if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
{
- data.watch = watchpoint;
- data.index = i;
- bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
- iterate_over_lwps (pid_ptid, update_registers_callback, &data);
- break;
+ bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
+ iterate_over_lwps (pid_ptid,
+ [=] (struct lwp_info *info)
+ {
+ return update_registers_callback (info, watchpoint,
+ i);
+ });
+ break;
}
gdb_assert (i != count);
}
/* Insert a Hardware breakpoint. */
-static int
-arm_linux_insert_hw_breakpoint (struct target_ops *self,
- struct gdbarch *gdbarch,
- struct bp_target_info *bp_tgt)
+int
+arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_breakpoint_count () == 0)
}
/* Remove a hardware breakpoint. */
-static int
-arm_linux_remove_hw_breakpoint (struct target_ops *self,
- struct gdbarch *gdbarch,
- struct bp_target_info *bp_tgt)
+int
+arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_breakpoint_count () == 0)
/* Are we able to use a hardware watchpoint for the LEN bytes starting at
ADDR? */
-static int
-arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
- CORE_ADDR addr, int len)
+int
+arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
{
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
CORE_ADDR max_wp_length, aligned_addr;
}
/* Insert a Hardware breakpoint. */
-static int
-arm_linux_insert_watchpoint (struct target_ops *self,
- CORE_ADDR addr, int len, int rw,
- struct expression *cond)
+int
+arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
+ enum target_hw_bp_type rw,
+ struct expression *cond)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_watchpoint_count () == 0)
}
/* Remove a hardware breakpoint. */
-static int
-arm_linux_remove_watchpoint (struct target_ops *self,
- CORE_ADDR addr, int len, int rw,
- struct expression *cond)
+int
+arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr,
+ int len, enum target_hw_bp_type rw,
+ struct expression *cond)
{
- struct lwp_info *lp;
struct arm_linux_hw_breakpoint p;
if (arm_linux_get_hw_watchpoint_count () == 0)
}
/* What was the data address the target was stopped on accessing. */
-static int
-arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
+bool
+arm_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
{
siginfo_t siginfo;
int slot;
if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
- return 0;
+ return false;
/* This must be a hardware breakpoint. */
if (siginfo.si_signo != SIGTRAP
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
- return 0;
+ return false;
/* We must be able to set hardware watchpoints. */
if (arm_linux_get_hw_watchpoint_count () == 0)
/* If we are in a positive slot then we're looking at a breakpoint and not
a watchpoint. */
if (slot >= 0)
- return 0;
+ return false;
*addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
- return 1;
+ return true;
}
/* Has the target been stopped by hitting a watchpoint? */
-static int
-arm_linux_stopped_by_watchpoint (struct target_ops *ops)
+bool
+arm_linux_nat_target::stopped_by_watchpoint ()
{
CORE_ADDR addr;
- return arm_linux_stopped_data_address (ops, &addr);
+ return stopped_data_address (&addr);
}
-static int
-arm_linux_watchpoint_addr_within_range (struct target_ops *target,
- CORE_ADDR addr,
- CORE_ADDR start, int length)
+bool
+arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
+ CORE_ADDR start,
+ int length)
{
return start <= addr && start + length - 1 >= addr;
}
/* Handle thread creation. We need to copy the breakpoints and watchpoints
in the parent thread to the child thread. */
-static void
-arm_linux_new_thread (struct lwp_info *lp)
+void
+arm_linux_nat_target::low_new_thread (struct lwp_info *lp)
{
int i;
struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
lp->arch_private = info;
}
+/* Function to call when a thread is being deleted. */
+
+void
+arm_linux_nat_target::low_delete_thread (struct arch_lwp_info *arch_lwp)
+{
+ xfree (arch_lwp);
+}
+
/* Called when resuming a thread.
The hardware debug registers are updated when there is any change. */
-static void
-arm_linux_prepare_to_resume (struct lwp_info *lwp)
+void
+arm_linux_nat_target::low_prepare_to_resume (struct lwp_info *lwp)
{
int pid, i;
struct arm_linux_hw_breakpoint *bpts, *wpts;
struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
- pid = ptid_get_lwp (lwp->ptid);
- bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
- wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
+ pid = lwp->ptid.lwp ();
+ bpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->bpts;
+ wpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->wpts;
/* NULL means this is the main thread still going through the shell,
or, no watchpoint has been set yet. In that case, there's
for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
if (arm_lwp_info->bpts_changed[i])
{
- errno = 0;
- if (arm_hwbp_control_is_enabled (bpts[i].control))
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
- perror_with_name (_("Unexpected error setting breakpoint"));
-
- if (bpts[i].control != 0)
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
- perror_with_name (_("Unexpected error setting breakpoint"));
-
- arm_lwp_info->bpts_changed[i] = 0;
+ errno = 0;
+ if (arm_hwbp_control_is_enabled (bpts[i].control))
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
+ perror_with_name (_("Unexpected error setting breakpoint"));
+
+ if (bpts[i].control != 0)
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
+ perror_with_name (_("Unexpected error setting breakpoint"));
+
+ arm_lwp_info->bpts_changed[i] = 0;
}
for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
if (arm_lwp_info->wpts_changed[i])
{
- errno = 0;
- if (arm_hwbp_control_is_enabled (wpts[i].control))
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
- perror_with_name (_("Unexpected error setting watchpoint"));
-
- if (wpts[i].control != 0)
- if (ptrace (PTRACE_SETHBPREGS, pid,
- (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
- perror_with_name (_("Unexpected error setting watchpoint"));
-
- arm_lwp_info->wpts_changed[i] = 0;
+ errno = 0;
+ if (arm_hwbp_control_is_enabled (wpts[i].control))
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
+ perror_with_name (_("Unexpected error setting watchpoint"));
+
+ if (wpts[i].control != 0)
+ if (ptrace (PTRACE_SETHBPREGS, pid,
+ (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
+ perror_with_name (_("Unexpected error setting watchpoint"));
+
+ arm_lwp_info->wpts_changed[i] = 0;
}
}
/* linux_nat_new_fork hook. */
-static void
-arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
+void
+arm_linux_nat_target::low_new_fork (struct lwp_info *parent, pid_t child_pid)
{
pid_t parent_pid;
struct arm_linux_debug_reg_state *parent_state;
new process so that all breakpoints and watchpoints can be
removed together. */
- parent_pid = ptid_get_pid (parent->ptid);
+ parent_pid = parent->ptid.pid ();
parent_state = arm_linux_get_debug_reg_state (parent_pid);
child_state = arm_linux_get_debug_reg_state (child_pid);
*child_state = *parent_state;
}
-void _initialize_arm_linux_nat (void);
-
+void _initialize_arm_linux_nat ();
void
-_initialize_arm_linux_nat (void)
+_initialize_arm_linux_nat ()
{
- struct target_ops *t;
-
- /* Fill in the generic GNU/Linux methods. */
- t = linux_target ();
-
- /* Add our register access methods. */
- t->to_fetch_registers = arm_linux_fetch_inferior_registers;
- t->to_store_registers = arm_linux_store_inferior_registers;
-
- /* Add our hardware breakpoint and watchpoint implementation. */
- t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
- t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
- t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
- t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
- t->to_insert_watchpoint = arm_linux_insert_watchpoint;
- t->to_remove_watchpoint = arm_linux_remove_watchpoint;
- t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
- t->to_stopped_data_address = arm_linux_stopped_data_address;
- t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
-
- t->to_read_description = arm_linux_read_description;
-
/* Register the target. */
- linux_nat_add_target (t);
-
- /* Handle thread creation and exit. */
- linux_nat_set_new_thread (t, arm_linux_new_thread);
- linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
-
- /* Handle process creation and exit. */
- linux_nat_set_new_fork (t, arm_linux_new_fork);
- linux_nat_set_forget_process (t, arm_linux_forget_process);
+ linux_target = &the_arm_linux_nat_target;
+ add_inf_child_target (&the_arm_linux_nat_target);
}