/* GNU/Linux on ARM native support.
- Copyright (C) 1999-2014 Free Software Foundation, Inc.
+ Copyright (C) 1999-2015 Free Software Foundation, Inc.
This file is part of GDB.
#include "arm-tdep.h"
#include "arm-linux-tdep.h"
+#include "aarch32-linux-nat.h"
#include <elf/common.h>
#include <sys/user.h>
-#include <sys/ptrace.h>
+#include "nat/gdb_ptrace.h"
#include <sys/utsname.h>
#include <sys/procfs.h>
+#include "nat/linux-ptrace.h"
+
/* Prototypes for supply_gregset etc. */
#include "gregset.h"
#define PTRACE_SETHBPREGS 30
#endif
-/* A flag for whether the WMMX registers are available. */
-static int arm_linux_has_wmmx_registers;
-
-/* The number of 64-bit VFP registers we have (expect this to be 0,
- 16, or 32). */
-static int arm_linux_vfp_register_count;
-
extern int arm_apcs_32;
/* On GNU/Linux, threads are implemented as pseudo-processes, in which
#define GET_THREAD_ID(PTID) get_thread_id (PTID)
-/* Get the value of a particular register from the floating point
- state of the process and store it into regcache. */
-
-static void
-fetch_fpregister (struct regcache *regcache, int regno)
-{
- int ret, tid;
- gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
-
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- /* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
- if (ret < 0)
- {
- warning (_("Unable to fetch floating point register."));
- return;
- }
-
- /* Fetch fpsr. */
- if (ARM_FPS_REGNUM == regno)
- regcache_raw_supply (regcache, ARM_FPS_REGNUM,
- fp + NWFPE_FPSR_OFFSET);
-
- /* Fetch the floating point register. */
- if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
- supply_nwfpe_register (regcache, regno, fp);
-}
-
/* Get the whole floating point state of the process and store it
into regcache. */
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
-
+
/* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
+ {
+ struct iovec iov;
+
+ iov.iov_base = &fp;
+ iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
+
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
+ }
+ else
+ ret = ptrace (PT_GETFPREGS, tid, 0, fp);
+
if (ret < 0)
{
warning (_("Unable to fetch the floating point registers."));
supply_nwfpe_register (regcache, regno, fp);
}
-/* Save a particular register into the floating point state of the
- process using the contents from regcache. */
+/* Save the whole floating point state of the process using
+ the contents from regcache. */
static void
-store_fpregister (const struct regcache *regcache, int regno)
+store_fpregs (const struct regcache *regcache)
{
- int ret, tid;
+ int ret, regno, tid;
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
-
+
/* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch the floating point registers."));
- return;
- }
+ elf_fpregset_t fpregs;
+ struct iovec iov;
- /* Store fpsr. */
- if (ARM_FPS_REGNUM == regno
- && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
- regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
+ iov.iov_base = &fpregs;
+ iov.iov_len = sizeof (fpregs);
- /* Store the floating point register. */
- if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
- collect_nwfpe_register (regcache, regno, fp);
-
- ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
- if (ret < 0)
- {
- warning (_("Unable to store floating point register."));
- return;
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
}
-}
-
-/* Save the whole floating point state of the process using
- the contents from regcache. */
-
-static void
-store_fpregs (const struct regcache *regcache)
-{
- int ret, regno, tid;
- gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
+ else
+ ret = ptrace (PT_GETFPREGS, tid, 0, fp);
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- /* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
{
warning (_("Unable to fetch the floating point registers."));
if (REG_VALID == regcache_register_status (regcache, regno))
collect_nwfpe_register (regcache, regno, fp);
- ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
- if (ret < 0)
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to store floating point registers."));
- return;
- }
-}
+ struct iovec iov;
-/* Fetch a general register of the process and store into
- regcache. */
+ iov.iov_base = &fp;
+ iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
-static void
-fetch_register (struct regcache *regcache, int regno)
-{
- int ret, tid;
- elf_gregset_t regs;
+ ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
- warning (_("Unable to fetch general register."));
+ warning (_("Unable to store floating point registers."));
return;
}
-
- if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
- regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
-
- if (ARM_PS_REGNUM == regno)
- {
- if (arm_apcs_32)
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
- else
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
- }
-
- if (ARM_PC_REGNUM == regno)
- {
- regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
- (get_regcache_arch (regcache),
- regs[ARM_PC_REGNUM]);
- regcache_raw_supply (regcache, ARM_PC_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
- }
}
/* Fetch all general registers of the process and store into
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
-
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
- if (ret < 0)
+
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- warning (_("Unable to fetch general registers."));
- return;
- }
+ struct iovec iov;
- for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
- regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
+ iov.iov_base = ®s;
+ iov.iov_len = sizeof (regs);
- if (arm_apcs_32)
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
+ }
else
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
-
- regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
- (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
- regcache_raw_supply (regcache, ARM_PC_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
-}
-
-/* Store all general registers of the process from the values in
- regcache. */
-
-static void
-store_register (const struct regcache *regcache, int regno)
-{
- int ret, tid;
- elf_gregset_t regs;
-
- if (REG_VALID != regcache_register_status (regcache, regno))
- return;
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
- /* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
-
- /* Get the general registers from the process. */
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to fetch general registers."));
return;
}
- if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
- regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
- else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
- regcache_raw_collect (regcache, regno,
- (char *) ®s[ARM_CPSR_GREGNUM]);
- else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
- regcache_raw_collect (regcache, ARM_PC_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
-
- ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
- if (ret < 0)
- {
- warning (_("Unable to store general register."));
- return;
- }
+ aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
}
static void
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
-
+
/* Fetch the general registers. */
- ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
+ {
+ struct iovec iov;
+
+ iov.iov_base = ®s;
+ iov.iov_len = sizeof (regs);
+
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
+
if (ret < 0)
{
warning (_("Unable to fetch general registers."));
return;
}
- for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
+ aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
+
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- if (REG_VALID == regcache_register_status (regcache, regno))
- regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
- }
+ struct iovec iov;
- if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
- regcache_raw_collect (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
+ iov.iov_base = ®s;
+ iov.iov_len = sizeof (regs);
- ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
+ ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
{
}
}
-/* Fetch and store VFP Registers. The kernel object has space for 32
- 64-bit registers, and the FPSCR. This is even when on a VFPv2 or
- VFPv3D16 target. */
-#define VFP_REGS_SIZE (32 * 8 + 4)
-
static void
fetch_vfp_regs (struct regcache *regcache)
{
- char regbuf[VFP_REGS_SIZE];
+ gdb_byte regbuf[VFP_REGS_SIZE];
int ret, regno, tid;
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
- ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
+ {
+ struct iovec iov;
+
+ iov.iov_base = regbuf;
+ iov.iov_len = VFP_REGS_SIZE;
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
+
if (ret < 0)
{
warning (_("Unable to fetch VFP registers."));
return;
}
- for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
- regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
- (char *) regbuf + regno * 8);
-
- regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
- (char *) regbuf + 32 * 8);
+ aarch32_vfp_regcache_supply (regcache, regbuf,
+ tdep->vfp_register_count);
}
static void
store_vfp_regs (const struct regcache *regcache)
{
- char regbuf[VFP_REGS_SIZE];
+ gdb_byte regbuf[VFP_REGS_SIZE];
int ret, regno, tid;
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
- ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
+ {
+ struct iovec iov;
+
+ iov.iov_base = regbuf;
+ iov.iov_len = VFP_REGS_SIZE;
+ ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
+
if (ret < 0)
{
warning (_("Unable to fetch VFP registers (for update)."));
return;
}
- for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
- regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
- (char *) regbuf + regno * 8);
+ aarch32_vfp_regcache_collect (regcache, regbuf,
+ tdep->vfp_register_count);
- regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
- (char *) regbuf + 32 * 8);
+ if (have_ptrace_getregset == TRIBOOL_TRUE)
+ {
+ struct iovec iov;
- ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
+ iov.iov_base = regbuf;
+ iov.iov_len = VFP_REGS_SIZE;
+ ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
+ }
+ else
+ ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
if (ret < 0)
{
arm_linux_fetch_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
if (-1 == regno)
{
fetch_regs (regcache);
fetch_fpregs (regcache);
- if (arm_linux_has_wmmx_registers)
+ if (tdep->have_wmmx_registers)
fetch_wmmx_regs (regcache);
- if (arm_linux_vfp_register_count > 0)
+ if (tdep->vfp_register_count > 0)
fetch_vfp_regs (regcache);
}
else
{
if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
- fetch_register (regcache, regno);
+ fetch_regs (regcache);
else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
- fetch_fpregister (regcache, regno);
- else if (arm_linux_has_wmmx_registers
+ fetch_fpregs (regcache);
+ else if (tdep->have_wmmx_registers
&& regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
fetch_wmmx_regs (regcache);
- else if (arm_linux_vfp_register_count > 0
+ else if (tdep->vfp_register_count > 0
&& regno >= ARM_D0_REGNUM
- && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
+ && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
fetch_vfp_regs (regcache);
}
}
arm_linux_store_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
if (-1 == regno)
{
store_regs (regcache);
store_fpregs (regcache);
- if (arm_linux_has_wmmx_registers)
+ if (tdep->have_wmmx_registers)
store_wmmx_regs (regcache);
- if (arm_linux_vfp_register_count > 0)
+ if (tdep->vfp_register_count > 0)
store_vfp_regs (regcache);
}
else
{
if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
- store_register (regcache, regno);
+ store_regs (regcache);
else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
- store_fpregister (regcache, regno);
- else if (arm_linux_has_wmmx_registers
+ store_fpregs (regcache);
+ else if (tdep->have_wmmx_registers
&& regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
store_wmmx_regs (regcache);
- else if (arm_linux_vfp_register_count > 0
+ else if (tdep->vfp_register_count > 0
&& regno >= ARM_D0_REGNUM
- && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
+ && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
store_vfp_regs (regcache);
}
}
arm_linux_read_description (struct target_ops *ops)
{
CORE_ADDR arm_hwcap = 0;
- arm_linux_has_wmmx_registers = 0;
- arm_linux_vfp_register_count = 0;
+
+ if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
+ {
+ elf_gregset_t gpregs;
+ struct iovec iov;
+ int tid = GET_THREAD_ID (inferior_ptid);
+
+ iov.iov_base = &gpregs;
+ iov.iov_len = sizeof (gpregs);
+
+ /* Check if PTRACE_GETREGSET works. */
+ if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
+ have_ptrace_getregset = TRIBOOL_FALSE;
+ else
+ have_ptrace_getregset = TRIBOOL_TRUE;
+ }
if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
{
}
if (arm_hwcap & HWCAP_IWMMXT)
- {
- arm_linux_has_wmmx_registers = 1;
- return tdesc_arm_with_iwmmxt;
- }
+ return tdesc_arm_with_iwmmxt;
if (arm_hwcap & HWCAP_VFP)
{
/* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
Neon with VFPv3-D32. */
if (arm_hwcap & HWCAP_NEON)
- {
- arm_linux_vfp_register_count = 32;
- result = tdesc_arm_with_neon;
- }
+ result = tdesc_arm_with_neon;
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
- {
- arm_linux_vfp_register_count = 32;
- result = tdesc_arm_with_vfpv3;
- }
+ result = tdesc_arm_with_vfpv3;
else
- {
- arm_linux_vfp_register_count = 16;
- result = tdesc_arm_with_vfpv2;
- }
+ result = tdesc_arm_with_vfpv2;
/* Now make sure that the kernel supports reading these
registers. Support was added in 2.6.30. */
if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
|| type == bp_access_watchpoint || type == bp_watchpoint)
{
- if (cnt + ot > arm_linux_get_hw_watchpoint_count ())
+ int count = arm_linux_get_hw_watchpoint_count ();
+
+ if (count == 0)
+ return 0;
+ else if (cnt + ot > count)
return -1;
}
else if (type == bp_hardware_breakpoint)
{
- if (cnt > arm_linux_get_hw_breakpoint_count ())
+ int count = arm_linux_get_hw_breakpoint_count ();
+
+ if (count == 0)
+ return 0;
+ else if (cnt > count)
return -1;
}
else
struct arm_linux_hw_breakpoint *p)
{
unsigned mask;
- CORE_ADDR address = bp_tgt->placed_address;
+ CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
/* We have to create a mask for the control register which says which bits
of the word pointed to by address to break on. */
projects / binutils-gdb.git / blobdiff