#include "floatformat.h"
#include "gdb/sim-d10v.h"
#include "sim-regno.h"
+#include "disasm.h"
#include "gdb_assert.h"
{
int a0_regnum;
int nr_dmap_regs;
- unsigned long (*dmap_register) (int nr);
- unsigned long (*imap_register) (int nr);
+ unsigned long (*dmap_register) (void *regcache, int nr);
+ unsigned long (*imap_register) (void *regcache, int nr);
};
/* These are the addresses the D10V-EVA board maps data and
LR_REGNUM = 13,
D10V_SP_REGNUM = 15,
PSW_REGNUM = 16,
- _PC_REGNUM = 18,
+ D10V_PC_REGNUM = 18,
NR_IMAP_REGS = 2,
NR_A_REGS = 2,
TS2_NUM_REGS = 37,
static CORE_ADDR d10v_read_sp (void);
-static CORE_ADDR d10v_read_fp (void);
-
static void d10v_eva_prepare_to_trace (void);
static void d10v_eva_get_trace_data (void);
static CORE_ADDR
-d10v_stack_align (CORE_ADDR len)
+d10v_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
{
- return (len + 1) & ~1;
+ /* Align to the size of an instruction (so that they can safely be
+ pushed onto the stack. */
+ return sp & ~3;
}
/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
one of the segments. */
static unsigned long
-d10v_ts2_dmap_register (int reg_nr)
+d10v_ts2_dmap_register (void *regcache, int reg_nr)
{
switch (reg_nr)
{
case 1:
return 0x2000;
case 2:
- return read_register (TS2_DMAP_REGNUM);
+ {
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS2_DMAP_REGNUM, ®);
+ return reg;
+ }
default:
return 0;
}
}
static unsigned long
-d10v_ts3_dmap_register (int reg_nr)
-{
- return read_register (TS3_DMAP0_REGNUM + reg_nr);
-}
-
-static unsigned long
-d10v_dmap_register (int reg_nr)
+d10v_ts3_dmap_register (void *regcache, int reg_nr)
{
- return gdbarch_tdep (current_gdbarch)->dmap_register (reg_nr);
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS3_DMAP0_REGNUM + reg_nr, ®);
+ return reg;
}
static unsigned long
-d10v_ts2_imap_register (int reg_nr)
+d10v_ts2_imap_register (void *regcache, int reg_nr)
{
- return read_register (TS2_IMAP0_REGNUM + reg_nr);
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS2_IMAP0_REGNUM + reg_nr, ®);
+ return reg;
}
static unsigned long
-d10v_ts3_imap_register (int reg_nr)
+d10v_ts3_imap_register (void *regcache, int reg_nr)
{
- return read_register (TS3_IMAP0_REGNUM + reg_nr);
-}
-
-static unsigned long
-d10v_imap_register (int reg_nr)
-{
- return gdbarch_tdep (current_gdbarch)->imap_register (reg_nr);
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS3_IMAP0_REGNUM + reg_nr, ®);
+ return reg;
}
/* MAP GDB's internal register numbering (determined by the layout fo
static struct type *
d10v_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- if (reg_nr == PC_REGNUM)
+ if (reg_nr == D10V_PC_REGNUM)
return builtin_type_void_func_ptr;
if (reg_nr == D10V_SP_REGNUM || reg_nr == D10V_FP_REGNUM)
return builtin_type_void_data_ptr;
d10v_frame_unwind_cache (struct frame_info *next_frame,
void **this_prologue_cache)
{
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
CORE_ADDR pc;
ULONGEST prev_sp;
ULONGEST this_base;
pc > 0 && pc < frame_pc_unwind (next_frame);
pc += 4)
{
- op = (unsigned long) read_memory_integer (pc, 4);
+ op = get_frame_memory_unsigned (next_frame, pc, 4);
if ((op & 0xC0000000) == 0xC0000000)
{
/* long instruction */
{
/* The SP was saved (which is very unusual), the frame base is
just the PREV's frame's TOP-OF-STACK. */
- this_base = read_memory_unsigned_integer (info->saved_regs[D10V_SP_REGNUM],
- register_size (current_gdbarch,
- D10V_SP_REGNUM));
+ this_base
+ = get_frame_memory_unsigned (next_frame,
+ info->saved_regs[D10V_SP_REGNUM],
+ register_size (gdbarch, D10V_SP_REGNUM));
prev_sp = this_base;
}
else
if (info->saved_regs[LR_REGNUM])
{
- CORE_ADDR return_pc
- = read_memory_unsigned_integer (info->saved_regs[LR_REGNUM],
- register_size (current_gdbarch, LR_REGNUM));
+ CORE_ADDR return_pc
+ = get_frame_memory_unsigned (next_frame, info->saved_regs[LR_REGNUM],
+ register_size (gdbarch, LR_REGNUM));
info->return_pc = d10v_make_iaddr (return_pc);
}
else
d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, int regnum, int all)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
if (regnum >= 0)
{
default_print_registers_info (gdbarch, file, frame, regnum, all);
{
ULONGEST pc, psw, rpt_s, rpt_e, rpt_c;
- frame_read_unsigned_register (frame, PC_REGNUM, &pc);
+ frame_read_unsigned_register (frame, D10V_PC_REGNUM, &pc);
frame_read_unsigned_register (frame, PSW_REGNUM, &psw);
frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_s", -1), &rpt_s);
frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_e", -1), &rpt_e);
{
if (a > 0)
fprintf_filtered (file, " ");
- fprintf_filtered (file, "IMAP%d %04lx", a, d10v_imap_register (a));
+ fprintf_filtered (file, "IMAP%d %04lx", a,
+ tdep->imap_register (current_regcache, a));
}
if (nr_dmap_regs (gdbarch) == 1)
/* Registers DMAP0 and DMAP1 are constant. Just return dmap2. */
- fprintf_filtered (file, " DMAP %04lx\n", d10v_dmap_register (2));
+ fprintf_filtered (file, " DMAP %04lx\n",
+ tdep->dmap_register (current_regcache, 2));
else
{
for (a = 0; a < nr_dmap_regs (gdbarch); a++)
{
- fprintf_filtered (file, " DMAP%d %04lx", a, d10v_dmap_register (a));
+ fprintf_filtered (file, " DMAP%d %04lx", a,
+ tdep->dmap_register (current_regcache, a));
}
fprintf_filtered (file, "\n");
}
}
{
- char *num = alloca (max_register_size (gdbarch));
+ char num[MAX_REGISTER_SIZE];
int a;
fprintf_filtered (file, "A0-A%d", NR_A_REGS - 1);
for (a = a0_regnum (gdbarch); a < a0_regnum (gdbarch) + NR_A_REGS; a++)
int i;
fprintf_filtered (file, " ");
frame_read_register (frame, a, num);
- for (i = 0; i < register_size (current_gdbarch, a); i++)
+ for (i = 0; i < register_size (gdbarch, a); i++)
{
fprintf_filtered (file, "%02x", (num[i] & 0xff));
}
save_ptid = inferior_ptid;
inferior_ptid = ptid;
- pc = (int) read_register (PC_REGNUM);
+ pc = (int) read_register (D10V_PC_REGNUM);
inferior_ptid = save_ptid;
retval = d10v_make_iaddr (pc);
return retval;
save_ptid = inferior_ptid;
inferior_ptid = ptid;
- write_register (PC_REGNUM, d10v_convert_iaddr_to_raw (val));
+ write_register (D10V_PC_REGNUM, d10v_convert_iaddr_to_raw (val));
inferior_ptid = save_ptid;
}
return (d10v_make_daddr (read_register (D10V_SP_REGNUM)));
}
-static CORE_ADDR
-d10v_read_fp (void)
-{
- return (d10v_make_daddr (read_register (D10V_FP_REGNUM)));
-}
-
/* When arguments must be pushed onto the stack, they go on in reverse
order. The below implements a FILO (stack) to do this. */
static CORE_ADDR
-d10v_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache,
- CORE_ADDR dummy_addr, int nargs, struct value **args,
- CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
+d10v_push_dummy_code (struct gdbarch *gdbarch,
+ CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
+ struct value **args, int nargs,
+ struct type *value_type,
+ CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
+{
+ /* Allocate space sufficient for a breakpoint. */
+ sp = (sp - 4) & ~3;
+ /* Store the address of that breakpoint taking care to first convert
+ it into a code (IADDR) address from a stack (DADDR) address.
+ This of course assumes that the two virtual addresses map onto
+ the same real address. */
+ (*bp_addr) = d10v_make_iaddr (d10v_convert_iaddr_to_raw (sp));
+ /* d10v always starts the call at the callee's entry point. */
+ (*real_pc) = funaddr;
+ return sp;
+}
+
+static CORE_ADDR
+d10v_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+ struct regcache *regcache, CORE_ADDR bp_addr,
+ int nargs, struct value **args, CORE_ADDR sp, int struct_return,
+ CORE_ADDR struct_addr)
{
int i;
int regnum = ARG1_REGNUM;
long val;
/* Set the return address. For the d10v, the return breakpoint is
- always at DUMMY_ADDR. */
+ always at BP_ADDR. */
regcache_cooked_write_unsigned (regcache, LR_REGNUM,
- d10v_convert_iaddr_to_raw (dummy_addr));
+ d10v_convert_iaddr_to_raw (bp_addr));
/* If STRUCT_RETURN is true, then the struct return address (in
STRUCT_ADDR) will consume the first argument-passing register.
VM system works, we just call that to do the translation. */
static void
-remote_d10v_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
+remote_d10v_translate_xfer_address (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ CORE_ADDR memaddr, int nr_bytes,
CORE_ADDR *targ_addr, int *targ_len)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
long out_addr;
long out_len;
- out_len = sim_d10v_translate_addr (memaddr, nr_bytes,
- &out_addr,
- d10v_dmap_register,
- d10v_imap_register);
+ out_len = sim_d10v_translate_addr (memaddr, nr_bytes, &out_addr, regcache,
+ tdep->dmap_register, tdep->imap_register);
*targ_addr = out_addr;
*targ_len = out_len;
}
printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
}
-/* Print the instruction at address MEMADDR in debugged memory,
- on STREAM. Returns length of the instruction, in bytes. */
-
-static int
-print_insn (CORE_ADDR memaddr, struct ui_file *stream)
-{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
- tm_print_insn_info.endian = BFD_ENDIAN_BIG;
- else
- tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
- return TARGET_PRINT_INSN (memaddr, &tm_print_insn_info);
-}
-
static void
d10v_eva_prepare_to_trace (void)
{
if (!tracing)
return;
- last_pc = read_register (PC_REGNUM);
+ last_pc = read_register (D10V_PC_REGNUM);
}
/* Collect trace data from the target board and format it into a form
printf_filtered (":");
printf_filtered ("\t");
wrap_here (" ");
- next_address = next_address + print_insn (next_address, gdb_stdout);
+ next_address += gdb_print_insn (next_address, gdb_stdout);
printf_filtered ("\n");
gdb_flush (gdb_stdout);
}
d10v_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
ULONGEST pc;
- frame_unwind_unsigned_register (next_frame, PC_REGNUM, &pc);
+ frame_unwind_unsigned_register (next_frame, D10V_PC_REGNUM, &pc);
return d10v_make_iaddr (pc);
}
enum lval_type *lvalp, CORE_ADDR *addrp,
int *realnump, void *bufferp)
{
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
if (this_saved_regs[regnum] != 0)
{
if (regnum == D10V_SP_REGNUM)
*realnump = -1;
if (bufferp != NULL)
store_unsigned_integer (bufferp,
- register_size (current_gdbarch, regnum),
+ register_size (gdbarch, regnum),
this_saved_regs[regnum]);
}
else
if (bufferp != NULL)
{
/* Read the value in from memory. */
- read_memory (this_saved_regs[regnum], bufferp,
- register_size (current_gdbarch, regnum));
+ get_frame_memory (next_frame, this_saved_regs[regnum], bufferp,
+ register_size (gdbarch, regnum));
}
}
return;
{
struct d10v_unwind_cache *info
= d10v_frame_unwind_cache (next_frame, this_prologue_cache);
- if (regnum == PC_REGNUM)
+ if (regnum == D10V_PC_REGNUM)
{
/* The call instruction saves the caller's PC in LR. The
function prologue of the callee may then save the LR on the
set_gdbarch_read_pc (gdbarch, d10v_read_pc);
set_gdbarch_write_pc (gdbarch, d10v_write_pc);
- set_gdbarch_read_fp (gdbarch, d10v_read_fp);
set_gdbarch_read_sp (gdbarch, d10v_read_sp);
set_gdbarch_num_regs (gdbarch, d10v_num_regs);
set_gdbarch_sp_regnum (gdbarch, D10V_SP_REGNUM);
- set_gdbarch_pc_regnum (gdbarch, 18);
set_gdbarch_register_name (gdbarch, d10v_register_name);
- set_gdbarch_register_size (gdbarch, 2);
- set_gdbarch_register_bytes (gdbarch, (d10v_num_regs - 2) * 2 + 16);
- set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
set_gdbarch_register_type (gdbarch, d10v_register_type);
set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
}
set_gdbarch_extract_return_value (gdbarch, d10v_extract_return_value);
+ set_gdbarch_push_dummy_code (gdbarch, d10v_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, d10v_push_dummy_call);
set_gdbarch_store_return_value (gdbarch, d10v_store_return_value);
set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address);
set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
- set_gdbarch_stack_align (gdbarch, d10v_stack_align);
+ set_gdbarch_frame_align (gdbarch, d10v_frame_align);
set_gdbarch_register_sim_regno (gdbarch, d10v_register_sim_regno);
/* Return the unwound PC value. */
set_gdbarch_unwind_pc (gdbarch, d10v_unwind_pc);
+ set_gdbarch_print_insn (gdbarch, print_insn_d10v);
+
return gdbarch;
}
{
register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init);
- tm_print_insn = print_insn_d10v;
-
target_resume_hook = d10v_eva_prepare_to_trace;
target_wait_loop_hook = d10v_eva_get_trace_data;