/* Intel 386 target-dependent stuff.
- Copyright (C) 1988-2016 Free Software Foundation, Inc.
+ Copyright (C) 1988-2021 Free Software Foundation, Inc.
This file is part of GDB.
#include "arch-utils.h"
#include "command.h"
#include "dummy-frame.h"
-#include "dwarf2-frame.h"
-#include "doublest.h"
+#include "dwarf2/frame.h"
#include "frame.h"
#include "frame-base.h"
#include "frame-unwind.h"
#include "symfile.h"
#include "symtab.h"
#include "target.h"
+#include "target-float.h"
#include "value.h"
#include "dis-asm.h"
#include "disasm.h"
#include "remote.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
-#include "x86-xstate.h"
+#include "gdbsupport/x86-xstate.h"
+#include "x86-tdep.h"
#include "record.h"
#include "record-full.h"
-#include "features/i386/i386.c"
-#include "features/i386/i386-avx.c"
-#include "features/i386/i386-mpx.c"
-#include "features/i386/i386-avx512.c"
-#include "features/i386/i386-mmx.c"
+#include "target-descriptions.h"
+#include "arch/i386.h"
#include "ax.h"
#include "ax-gdb.h"
#include "expression.h"
#include "parser-defs.h"
#include <ctype.h>
+#include <algorithm>
+#include <unordered_set>
+#include "producer.h"
/* Register names. */
-static const char *i386_register_names[] =
+static const char * const i386_register_names[] =
{
"eax", "ecx", "edx", "ebx",
"esp", "ebp", "esi", "edi",
"mxcsr"
};
-static const char *i386_zmm_names[] =
+static const char * const i386_zmm_names[] =
{
"zmm0", "zmm1", "zmm2", "zmm3",
"zmm4", "zmm5", "zmm6", "zmm7"
};
-static const char *i386_zmmh_names[] =
+static const char * const i386_zmmh_names[] =
{
"zmm0h", "zmm1h", "zmm2h", "zmm3h",
"zmm4h", "zmm5h", "zmm6h", "zmm7h"
};
-static const char *i386_k_names[] =
+static const char * const i386_k_names[] =
{
"k0", "k1", "k2", "k3",
"k4", "k5", "k6", "k7"
};
-static const char *i386_ymm_names[] =
+static const char * const i386_ymm_names[] =
{
"ymm0", "ymm1", "ymm2", "ymm3",
"ymm4", "ymm5", "ymm6", "ymm7",
};
-static const char *i386_ymmh_names[] =
+static const char * const i386_ymmh_names[] =
{
"ymm0h", "ymm1h", "ymm2h", "ymm3h",
"ymm4h", "ymm5h", "ymm6h", "ymm7h",
};
-static const char *i386_mpx_names[] =
+static const char * const i386_mpx_names[] =
{
"bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
};
+static const char * const i386_pkeys_names[] =
+{
+ "pkru"
+};
+
/* Register names for MPX pseudo-registers. */
-static const char *i386_bnd_names[] =
+static const char * const i386_bnd_names[] =
{
"bnd0", "bnd1", "bnd2", "bnd3"
};
/* Register names for MMX pseudo-registers. */
-static const char *i386_mmx_names[] =
+static const char * const i386_mmx_names[] =
{
"mm0", "mm1", "mm2", "mm3",
"mm4", "mm5", "mm6", "mm7"
/* Register names for byte pseudo-registers. */
-static const char *i386_byte_names[] =
+static const char * const i386_byte_names[] =
{
"al", "cl", "dl", "bl",
"ah", "ch", "dh", "bh"
/* Register names for word pseudo-registers. */
-static const char *i386_word_names[] =
+static const char * const i386_word_names[] =
{
"ax", "cx", "dx", "bx",
"", "bp", "si", "di"
return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS;
}
+/* PKRU register? */
+
+bool
+i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int pkru_regnum = tdep->pkru_regnum;
+
+ if (pkru_regnum < 0)
+ return false;
+
+ regnum -= pkru_regnum;
+ return regnum >= 0 && regnum < I387_NUM_PKEYS_REGS;
+}
+
/* Return the name of register REGNUM, or the empty string if it is
an anonymous register. */
if (reg >= 0 && reg <= 7)
{
/* General-purpose registers. The debug info calls %ebp
- register 4, and %esp register 5. */
+ register 4, and %esp register 5. */
if (reg == 4)
- return 5;
+ return 5;
else if (reg == 5)
- return 4;
+ return 4;
else return reg;
}
else if (reg >= 12 && reg <= 19)
}
/* This will hopefully provoke a warning. */
- return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
+ return gdbarch_num_cooked_regs (gdbarch);
}
/* Convert SVR4 DWARF register number REG to the appropriate register number
/* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
num_regs + num_pseudo_regs for other debug formats. */
-static int
+int
i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
int regnum = i386_svr4_dwarf_reg_to_regnum (gdbarch, reg);
if (regnum == -1)
- return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
+ return gdbarch_num_cooked_regs (gdbarch);
return regnum;
}
This function is 64-bit safe. */
-static const gdb_byte *
-i386_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
-{
- static gdb_byte break_insn[] = { 0xcc }; /* int 3 */
+constexpr gdb_byte i386_break_insn[] = { 0xcc }; /* int 3 */
+
+typedef BP_MANIPULATION (i386_break_insn) i386_breakpoint;
- *len = sizeof (break_insn);
- return break_insn;
-}
\f
/* Displaced instruction handling. */
{
/* jump near, absolute indirect (/4). */
if ((insn[1] & 0x38) == 0x20)
- return 1;
+ return 1;
/* jump far, absolute indirect (/5). */
if ((insn[1] & 0x38) == 0x28)
- return 1;
+ return 1;
}
return 0;
{
/* Call near, absolute indirect (/2). */
if ((insn[1] & 0x38) == 0x10)
- return 1;
+ return 1;
/* Call far, absolute indirect (/3). */
if ((insn[1] & 0x38) == 0x18)
- return 1;
+ return 1;
}
return 0;
return i386_jmp_p (insn);
}
-/* Some kernels may run one past a syscall insn, so we have to cope.
- Otherwise this is just simple_displaced_step_copy_insn. */
+/* Some kernels may run one past a syscall insn, so we have to cope. */
-struct displaced_step_closure *
+displaced_step_copy_insn_closure_up
i386_displaced_step_copy_insn (struct gdbarch *gdbarch,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
{
size_t len = gdbarch_max_insn_length (gdbarch);
- gdb_byte *buf = (gdb_byte *) xmalloc (len);
+ std::unique_ptr<i386_displaced_step_copy_insn_closure> closure
+ (new i386_displaced_step_copy_insn_closure (len));
+ gdb_byte *buf = closure->buf.data ();
read_memory (from, buf, len);
write_memory (to, buf, len);
- if (debug_displaced)
- {
- fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
- paddress (gdbarch, from), paddress (gdbarch, to));
- displaced_step_dump_bytes (gdb_stdlog, buf, len);
- }
+ displaced_debug_printf ("%s->%s: %s",
+ paddress (gdbarch, from), paddress (gdbarch, to),
+ displaced_step_dump_bytes (buf, len).c_str ());
- return (struct displaced_step_closure *) buf;
+ /* This is a work around for a problem with g++ 4.8. */
+ return displaced_step_copy_insn_closure_up (closure.release ());
}
/* Fix up the state of registers and memory after having single-stepped
void
i386_displaced_step_fixup (struct gdbarch *gdbarch,
- struct displaced_step_closure *closure,
- CORE_ADDR from, CORE_ADDR to,
- struct regcache *regs)
+ struct displaced_step_copy_insn_closure *closure_,
+ CORE_ADDR from, CORE_ADDR to,
+ struct regcache *regs)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
applying it. */
ULONGEST insn_offset = to - from;
- /* Since we use simple_displaced_step_copy_insn, our closure is a
- copy of the instruction. */
- gdb_byte *insn = (gdb_byte *) closure;
+ i386_displaced_step_copy_insn_closure *closure
+ = (i386_displaced_step_copy_insn_closure *) closure_;
+ gdb_byte *insn = closure->buf.data ();
/* The start of the insn, needed in case we see some prefixes. */
gdb_byte *insn_start = insn;
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: fixup (%s, %s), "
- "insn = 0x%02x 0x%02x ...\n",
- paddress (gdbarch, from), paddress (gdbarch, to),
- insn[0], insn[1]);
+ displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
+ paddress (gdbarch, from), paddress (gdbarch, to),
+ insn[0], insn[1]);
/* The list of issues to contend with here is taken from
resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
regcache_cooked_read_unsigned (regs, I386_EIP_REGNUM, &orig_eip);
/* A signal trampoline system call changes the %eip, resuming
- execution of the main program after the signal handler has
- returned. That makes them like 'return' instructions; we
- shouldn't relocate %eip.
-
- But most system calls don't, and we do need to relocate %eip.
-
- Our heuristic for distinguishing these cases: if stepping
- over the system call instruction left control directly after
- the instruction, the we relocate --- control almost certainly
- doesn't belong in the displaced copy. Otherwise, we assume
- the instruction has put control where it belongs, and leave
- it unrelocated. Goodness help us if there are PC-relative
- system calls. */
+ execution of the main program after the signal handler has
+ returned. That makes them like 'return' instructions; we
+ shouldn't relocate %eip.
+
+ But most system calls don't, and we do need to relocate %eip.
+
+ Our heuristic for distinguishing these cases: if stepping
+ over the system call instruction left control directly after
+ the instruction, the we relocate --- control almost certainly
+ doesn't belong in the displaced copy. Otherwise, we assume
+ the instruction has put control where it belongs, and leave
+ it unrelocated. Goodness help us if there are PC-relative
+ system calls. */
if (i386_syscall_p (insn, &insn_len)
- && orig_eip != to + (insn - insn_start) + insn_len
+ && orig_eip != to + (insn - insn_start) + insn_len
/* GDB can get control back after the insn after the syscall.
Presumably this is a kernel bug.
i386_displaced_step_copy_insn ensures its a nop,
we add one to the length for it. */
- && orig_eip != to + (insn - insn_start) + insn_len + 1)
- {
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: syscall changed %%eip; "
- "not relocating\n");
- }
+ && orig_eip != to + (insn - insn_start) + insn_len + 1)
+ displaced_debug_printf ("syscall changed %%eip; not relocating");
else
- {
- ULONGEST eip = (orig_eip - insn_offset) & 0xffffffffUL;
+ {
+ ULONGEST eip = (orig_eip - insn_offset) & 0xffffffffUL;
/* If we just stepped over a breakpoint insn, we don't backup
the pc on purpose; this is to match behaviour without
stepping. */
- regcache_cooked_write_unsigned (regs, I386_EIP_REGNUM, eip);
+ regcache_cooked_write_unsigned (regs, I386_EIP_REGNUM, eip);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: "
- "relocated %%eip from %s to %s\n",
- paddress (gdbarch, orig_eip),
- paddress (gdbarch, eip));
- }
+ displaced_debug_printf ("relocated %%eip from %s to %s",
+ paddress (gdbarch, orig_eip),
+ paddress (gdbarch, eip));
+ }
}
/* If the instruction was PUSHFL, then the TF bit will be set in the
retaddr = (retaddr - insn_offset) & 0xffffffffUL;
write_memory_unsigned_integer (esp, retaddr_len, byte_order, retaddr);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "displaced: relocated return addr at %s to %s\n",
- paddress (gdbarch, esp),
- paddress (gdbarch, retaddr));
+ displaced_debug_printf ("relocated return addr at %s to %s",
+ paddress (gdbarch, esp),
+ paddress (gdbarch, retaddr));
}
}
newrel = (oldloc - *to) + rel32;
store_signed_integer (insn + 1, 4, byte_order, newrel);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "Adjusted insn rel32=%s at %s to"
- " rel32=%s at %s\n",
- hex_string (rel32), paddress (gdbarch, oldloc),
- hex_string (newrel), paddress (gdbarch, *to));
+ displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
+ hex_string (rel32), paddress (gdbarch, oldloc),
+ hex_string (newrel), paddress (gdbarch, *to));
/* Write the adjusted jump into its displaced location. */
append_insns (to, 5, insn);
rel32 = extract_signed_integer (insn + offset, 4, byte_order);
newrel = (oldloc - *to) + rel32;
store_signed_integer (insn + offset, 4, byte_order, newrel);
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog,
- "Adjusted insn rel32=%s at %s to"
- " rel32=%s at %s\n",
- hex_string (rel32), paddress (gdbarch, oldloc),
- hex_string (newrel), paddress (gdbarch, *to));
+ displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
+ hex_string (rel32), paddress (gdbarch, oldloc),
+ hex_string (newrel), paddress (gdbarch, *to));
}
/* Write the adjusted instructions into their displaced
delta = read_memory_integer (pc + 2, 2, byte_order);
/* Include the size of the jmp instruction (including the
- 0x66 prefix). */
+ 0x66 prefix). */
delta += 4;
}
else
{
/* Functions that return a structure or union start with:
- popl %eax 0x58
- xchgl %eax, (%esp) 0x87 0x04 0x24
+ popl %eax 0x58
+ xchgl %eax, (%esp) 0x87 0x04 0x24
or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
(the System V compiler puts out the second `xchg' instruction,
{
/* A function may start with
- pushl constant
- call _probe
+ pushl constant
+ call _probe
addl $4, %esp
followed by
- pushl %ebp
+ pushl %ebp
etc. */
gdb_byte buf[8];
if (current_pc > pc + offset_and)
cache->saved_sp_reg = regnums[reg];
- return min (pc + offset + 3, current_pc);
+ return std::min (pc + offset + 3, current_pc);
}
/* Maximum instruction length we need to handle. */
yet, and only the scratch registers %eax, %ecx and %edx can be
touched. */
-struct i386_insn i386_frame_setup_skip_insns[] =
+static i386_insn i386_frame_setup_skip_insns[] =
{
/* Check for `movb imm8, r' and `movl imm32, r'.
/* Check for `mov imm32, r32'. Note that there is an alternative
encoding for `mov m32, %eax'.
- ??? Should we handle SIB adressing here?
+ ??? Should we handle SIB addressing here?
??? Should we handle 16-bit operand-sizes here? */
/* `movl m32, %eax' */
{ 0 }
};
+/* Check whether PC points to an endbr32 instruction. */
+static CORE_ADDR
+i386_skip_endbr (CORE_ADDR pc)
+{
+ static const gdb_byte endbr32[] = { 0xf3, 0x0f, 0x1e, 0xfb };
+
+ gdb_byte buf[sizeof (endbr32)];
+
+ /* Stop there if we can't read the code */
+ if (target_read_code (pc, buf, sizeof (endbr32)))
+ return pc;
+
+ /* If the instruction isn't an endbr32, stop */
+ if (memcmp (buf, endbr32, sizeof (endbr32)) != 0)
+ return pc;
+
+ return pc + sizeof (endbr32);
+}
/* Check whether PC points to a no-op instruction. */
static CORE_ADDR
/* Check for some special instructions that might be migrated by
GCC into the prologue and skip them. At this point in the
prologue, code should only touch the scratch registers %eax,
- %ecx and %edx, so while the number of posibilities is sheer,
+ %ecx and %edx, so while the number of possibilities is sheer,
it is limited.
Make sure we only skip these instructions if we later see the
CORE_ADDR pc, CORE_ADDR current_pc,
struct i386_frame_cache *cache)
{
+ pc = i386_skip_endbr (pc);
pc = i386_skip_noop (pc);
pc = i386_follow_jump (gdbarch, pc);
pc = i386_analyze_struct_return (pc, current_pc, cache);
= skip_prologue_using_sal (gdbarch, func_addr);
struct compunit_symtab *cust = find_pc_compunit_symtab (func_addr);
- /* Clang always emits a line note before the prologue and another
- one after. We trust clang to emit usable line notes. */
+ /* LLVM backend (Clang/Flang) always emits a line note before the
+ prologue and another one after. We trust clang to emit usable
+ line notes. */
if (post_prologue_pc
&& (cust != NULL
&& COMPUNIT_PRODUCER (cust) != NULL
- && startswith (COMPUNIT_PRODUCER (cust), "clang ")))
- return max (start_pc, post_prologue_pc);
+ && producer_is_llvm (COMPUNIT_PRODUCER (cust))))
+ return std::max (start_pc, post_prologue_pc);
}
cache.locals = -1;
to get the address of the global offset table (GOT) into register
%ebx:
- call 0x0
+ call 0x0
popl %ebx
- movl %ebx,x(%ebp) (optional)
- addl y,%ebx
+ movl %ebx,x(%ebp) (optional)
+ addl y,%ebx
This code is with the rest of the prologue (at the end of the
function), so we have to skip it to get to the first real
else /* Unexpected instruction. */
delta = 0;
- if (target_read_code (pc + delta, &op, 1))
+ if (target_read_code (pc + delta, &op, 1))
return pc;
}
call_dest = call_dest & 0xffffffffU;
s = lookup_minimal_symbol_by_pc (call_dest);
if (s.minsym != NULL
- && MSYMBOL_LINKAGE_NAME (s.minsym) != NULL
- && strcmp (MSYMBOL_LINKAGE_NAME (s.minsym), "__main") == 0)
+ && s.minsym->linkage_name () != NULL
+ && strcmp (s.minsym->linkage_name (), "__main") == 0)
pc += 5;
}
}
cache = i386_alloc_frame_cache ();
*this_cache = cache;
- TRY
+ try
{
i386_frame_cache_1 (this_frame, cache);
}
- CATCH (ex, RETURN_MASK_ERROR)
+ catch (const gdb_exception_error &ex)
{
if (ex.error != NOT_AVAILABLE_ERROR)
- throw_exception (ex);
+ throw;
}
- END_CATCH
return cache;
}
cache = i386_alloc_frame_cache ();
*this_cache = cache;
- TRY
+ try
{
cache->pc = get_frame_func (this_frame);
cache->base_p = 1;
}
- CATCH (ex, RETURN_MASK_ERROR)
+ catch (const gdb_exception_error &ex)
{
if (ex.error != NOT_AVAILABLE_ERROR)
- throw_exception (ex);
+ throw;
}
- END_CATCH
return cache;
}
/* Static chain passed in register. */
-struct i386_insn i386_tramp_chain_in_reg_insns[] =
+static i386_insn i386_tramp_chain_in_reg_insns[] =
{
/* `movl imm32, %eax' and `movl imm32, %ecx' */
{ 5, { 0xb8 }, { 0xfe } },
/* Static chain passed on stack (when regparm=3). */
-struct i386_insn i386_tramp_chain_on_stack_insns[] =
+static i386_insn i386_tramp_chain_on_stack_insns[] =
{
/* `push imm32' */
{ 5, { 0x68 }, { 0xff } },
cache = i386_alloc_frame_cache ();
- TRY
+ try
{
get_frame_register (this_frame, I386_ESP_REGNUM, buf);
cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4;
cache->base_p = 1;
}
- CATCH (ex, RETURN_MASK_ERROR)
+ catch (const gdb_exception_error &ex)
{
if (ex.error != NOT_AVAILABLE_ERROR)
- throw_exception (ex);
+ throw;
}
- END_CATCH
*this_cache = cache;
return cache;
i386_16_byte_align_p (struct type *type)
{
type = check_typedef (type);
- if ((TYPE_CODE (type) == TYPE_CODE_DECFLOAT
- || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)))
+ if ((type->code () == TYPE_CODE_DECFLOAT
+ || (type->code () == TYPE_CODE_ARRAY && type->is_vector ()))
&& TYPE_LENGTH (type) == 16)
return 1;
- if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
+ if (type->code () == TYPE_CODE_ARRAY)
return i386_16_byte_align_p (TYPE_TARGET_TYPE (type));
- if (TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION)
+ if (type->code () == TYPE_CODE_STRUCT
+ || type->code () == TYPE_CODE_UNION)
{
int i;
- for (i = 0; i < TYPE_NFIELDS (type); i++)
+ for (i = 0; i < type->num_fields (); i++)
{
- if (i386_16_byte_align_p (TYPE_FIELD_TYPE (type, i)))
+ if (field_is_static (&type->field (i)))
+ continue;
+ if (i386_16_byte_align_p (type->field (i).type ()))
return 1;
}
}
return sp - 16;
}
-static CORE_ADDR
-i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
- struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
- struct value **args, CORE_ADDR sp, int struct_return,
- CORE_ADDR struct_addr)
+/* The "push_dummy_call" gdbarch method, optionally with the thiscall
+ calling convention. */
+
+CORE_ADDR
+i386_thiscall_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
+ struct regcache *regcache, CORE_ADDR bp_addr,
+ int nargs, struct value **args, CORE_ADDR sp,
+ function_call_return_method return_method,
+ CORE_ADDR struct_addr, bool thiscall)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[4];
int write_pass;
int args_space = 0;
+ /* BND registers can be in arbitrary values at the moment of the
+ inferior call. This can cause boundary violations that are not
+ due to a real bug or even desired by the user. The best to be done
+ is set the BND registers to allow access to the whole memory, INIT
+ state, before pushing the inferior call. */
+ i387_reset_bnd_regs (gdbarch, regcache);
+
/* Determine the total space required for arguments and struct
return address in a first pass (allowing for 16-byte-aligned
arguments), then push arguments in a second pass. */
{
int args_space_used = 0;
- if (struct_return)
+ if (return_method == return_method_struct)
{
if (write_pass)
{
args_space += 4;
}
- for (i = 0; i < nargs; i++)
+ for (i = thiscall ? 1 : 0; i < nargs; i++)
{
int len = TYPE_LENGTH (value_enclosing_type (args[i]));
/* Finally, update the stack pointer... */
store_unsigned_integer (buf, 4, byte_order, sp);
- regcache_cooked_write (regcache, I386_ESP_REGNUM, buf);
+ regcache->cooked_write (I386_ESP_REGNUM, buf);
/* ...and fake a frame pointer. */
- regcache_cooked_write (regcache, I386_EBP_REGNUM, buf);
+ regcache->cooked_write (I386_EBP_REGNUM, buf);
+
+ /* The 'this' pointer needs to be in ECX. */
+ if (thiscall)
+ regcache->cooked_write (I386_ECX_REGNUM, value_contents_all (args[0]));
/* MarkK wrote: This "+ 8" is all over the place:
(i386_frame_this_id, i386_sigtramp_frame_this_id,
return sp + 8;
}
+/* Implement the "push_dummy_call" gdbarch method. */
+
+static CORE_ADDR
+i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
+ struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
+ struct value **args, CORE_ADDR sp,
+ function_call_return_method return_method,
+ CORE_ADDR struct_addr)
+{
+ return i386_thiscall_push_dummy_call (gdbarch, function, regcache, bp_addr,
+ nargs, args, sp, return_method,
+ struct_addr, false);
+}
+
/* These registers are used for returning integers (and on some
targets also for returning `struct' and `union' values when their
size and alignment match an integer type). */
int len = TYPE_LENGTH (type);
gdb_byte buf[I386_MAX_REGISTER_SIZE];
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
+ if (type->code () == TYPE_CODE_FLT)
{
if (tdep->st0_regnum < 0)
{
its contents to the desired type. This is probably not
exactly how it would happen on the target itself, but it is
the best we can do. */
- regcache_raw_read (regcache, I386_ST0_REGNUM, buf);
- convert_typed_floating (buf, i387_ext_type (gdbarch), valbuf, type);
+ regcache->raw_read (I386_ST0_REGNUM, buf);
+ target_float_convert (buf, i387_ext_type (gdbarch), valbuf, type);
}
else
{
if (len <= low_size)
{
- regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
+ regcache->raw_read (LOW_RETURN_REGNUM, buf);
memcpy (valbuf, buf, len);
}
else if (len <= (low_size + high_size))
{
- regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
+ regcache->raw_read (LOW_RETURN_REGNUM, buf);
memcpy (valbuf, buf, low_size);
- regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf);
+ regcache->raw_read (HIGH_RETURN_REGNUM, buf);
memcpy (valbuf + low_size, buf, len - low_size);
}
else
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int len = TYPE_LENGTH (type);
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
+ if (type->code () == TYPE_CODE_FLT)
{
ULONGEST fstat;
gdb_byte buf[I386_MAX_REGISTER_SIZE];
}
/* Returning floating-point values is a bit tricky. Apart from
- storing the return value in %st(0), we have to simulate the
- state of the FPU at function return point. */
+ storing the return value in %st(0), we have to simulate the
+ state of the FPU at function return point. */
/* Convert the value found in VALBUF to the extended
floating-point format used by the FPU. This is probably
not exactly how it would happen on the target itself, but
it is the best we can do. */
- convert_typed_floating (valbuf, type, buf, i387_ext_type (gdbarch));
- regcache_raw_write (regcache, I386_ST0_REGNUM, buf);
+ target_float_convert (valbuf, type, buf, i387_ext_type (gdbarch));
+ regcache->raw_write (I386_ST0_REGNUM, buf);
/* Set the top of the floating-point register stack to 7. The
- actual value doesn't really matter, but 7 is what a normal
- function return would end up with if the program started out
- with a freshly initialized FPU. */
+ actual value doesn't really matter, but 7 is what a normal
+ function return would end up with if the program started out
+ with a freshly initialized FPU. */
regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
fstat |= (7 << 11);
regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
/* Mark %st(1) through %st(7) as empty. Since we set the top of
- the floating-point register stack to 7, the appropriate value
- for the tag word is 0x3fff. */
+ the floating-point register stack to 7, the appropriate value
+ for the tag word is 0x3fff. */
regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
}
else
int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM);
if (len <= low_size)
- regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf);
+ regcache->raw_write_part (LOW_RETURN_REGNUM, 0, len, valbuf);
else if (len <= (low_size + high_size))
{
- regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf);
- regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0,
- len - low_size, valbuf + low_size);
+ regcache->raw_write (LOW_RETURN_REGNUM, valbuf);
+ regcache->raw_write_part (HIGH_RETURN_REGNUM, 0, len - low_size,
+ valbuf + low_size);
}
else
internal_error (__FILE__, __LINE__,
i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- enum type_code code = TYPE_CODE (type);
+ enum type_code code = type->code ();
int len = TYPE_LENGTH (type);
gdb_assert (code == TYPE_CODE_STRUCT
- || code == TYPE_CODE_UNION
- || code == TYPE_CODE_ARRAY);
+ || code == TYPE_CODE_UNION
+ || code == TYPE_CODE_ARRAY);
if (struct_convention == pcc_struct_convention
|| (struct_convention == default_struct_convention
/* Structures consisting of a single `float', `double' or 'long
double' member are returned in %st(0). */
- if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
+ if (code == TYPE_CODE_STRUCT && type->num_fields () == 1)
{
- type = check_typedef (TYPE_FIELD_TYPE (type, 0));
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
+ type = check_typedef (type->field (0).type ());
+ if (type->code () == TYPE_CODE_FLT)
return (len == 4 || len == 8 || len == 12);
}
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- enum type_code code = TYPE_CODE (type);
+ enum type_code code = type->code ();
if (((code == TYPE_CODE_STRUCT
|| code == TYPE_CODE_UNION
|| code == TYPE_CODE_ARRAY)
&& !i386_reg_struct_return_p (gdbarch, type))
- /* Complex double and long double uses the struct return covention. */
+ /* Complex double and long double uses the struct return convention. */
|| (code == TYPE_CODE_COMPLEX && TYPE_LENGTH (type) == 16)
|| (code == TYPE_CODE_COMPLEX && TYPE_LENGTH (type) == 24)
/* 128-bit decimal float uses the struct return convention. */
value just after the function has returned. */
/* Note that the ABI doesn't mention functions returning arrays,
- which is something possible in certain languages such as Ada.
- In this case, the value is returned as if it was wrapped in
- a record, so the convention applied to records also applies
- to arrays. */
+ which is something possible in certain languages such as Ada.
+ In this case, the value is returned as if it was wrapped in
+ a record, so the convention applied to records also applies
+ to arrays. */
if (readbuf)
{
the structure. Since that should work for all structures that
have only one member, we don't bother to check the member's type
here. */
- if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
+ if (code == TYPE_CODE_STRUCT && type->num_fields () == 1)
{
- type = check_typedef (TYPE_FIELD_TYPE (type, 0));
+ type = check_typedef (type->field (0).type ());
return i386_return_value (gdbarch, function, type, regcache,
readbuf, writebuf);
}
if (!tdep->i386_bnd_type)
{
- struct type *t, *bound_t;
+ struct type *t;
const struct builtin_type *bt = builtin_type (gdbarch);
/* The type we're building is described bellow: */
append_composite_type_field (t, "lbound", bt->builtin_data_ptr);
append_composite_type_field (t, "ubound", bt->builtin_data_ptr);
- TYPE_NAME (t) = "builtin_type_bound128";
+ t->set_name ("builtin_type_bound128");
tdep->i386_bnd_type = t;
}
#if 0
union __gdb_builtin_type_vec512i
{
- int128_t uint128[4];
- int64_t v4_int64[8];
- int32_t v8_int32[16];
- int16_t v16_int16[32];
- int8_t v32_int8[64];
- double v4_double[8];
- float v8_float[16];
+ int128_t v4_int128[4];
+ int64_t v8_int64[8];
+ int32_t v16_int32[16];
+ int16_t v32_int16[32];
+ int8_t v64_int8[64];
+ double v8_double[8];
+ float v16_float[16];
+ bfloat16_t v32_bfloat16[32];
};
#endif
t = arch_composite_type (gdbarch,
"__gdb_builtin_type_vec512i", TYPE_CODE_UNION);
+ append_composite_type_field (t, "v32_bfloat16",
+ init_vector_type (bt->builtin_bfloat16, 32));
append_composite_type_field (t, "v16_float",
init_vector_type (bt->builtin_float, 16));
append_composite_type_field (t, "v8_double",
append_composite_type_field (t, "v4_int128",
init_vector_type (bt->builtin_int128, 4));
- TYPE_VECTOR (t) = 1;
- TYPE_NAME (t) = "builtin_type_vec512i";
+ t->set_is_vector (true);
+ t->set_name ("builtin_type_vec512i");
tdep->i386_zmm_type = t;
}
#if 0
union __gdb_builtin_type_vec256i
{
- int128_t uint128[2];
- int64_t v2_int64[4];
- int32_t v4_int32[8];
- int16_t v8_int16[16];
- int8_t v16_int8[32];
- double v2_double[4];
- float v4_float[8];
+ int128_t v2_int128[2];
+ int64_t v4_int64[4];
+ int32_t v8_int32[8];
+ int16_t v16_int16[16];
+ int8_t v32_int8[32];
+ double v4_double[4];
+ float v8_float[8];
+ bfloat16_t v16_bfloat16[16];
};
#endif
t = arch_composite_type (gdbarch,
"__gdb_builtin_type_vec256i", TYPE_CODE_UNION);
+ append_composite_type_field (t, "v16_bfloat16",
+ init_vector_type (bt->builtin_bfloat16, 16));
append_composite_type_field (t, "v8_float",
init_vector_type (bt->builtin_float, 8));
append_composite_type_field (t, "v4_double",
append_composite_type_field (t, "v2_int128",
init_vector_type (bt->builtin_int128, 2));
- TYPE_VECTOR (t) = 1;
- TYPE_NAME (t) = "builtin_type_vec256i";
+ t->set_is_vector (true);
+ t->set_name ("builtin_type_vec256i");
tdep->i386_ymm_type = t;
}
#if 0
union __gdb_builtin_type_vec64i
{
- int64_t uint64;
- int32_t v2_int32[2];
- int16_t v4_int16[4];
- int8_t v8_int8[8];
+ int64_t uint64;
+ int32_t v2_int32[2];
+ int16_t v4_int16[4];
+ int8_t v8_int8[8];
};
#endif
append_composite_type_field (t, "v8_int8",
init_vector_type (bt->builtin_int8, 8));
- TYPE_VECTOR (t) = 1;
- TYPE_NAME (t) = "builtin_type_vec64i";
+ t->set_is_vector (true);
+ t->set_name ("builtin_type_vec64i");
tdep->i386_mmx_type = t;
}
the MMX registers need to be mapped onto floating point registers. */
static int
-i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
+i386_mmx_regnum_to_fp_regnum (readable_regcache *regcache, int regnum)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
+ struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
int mmxreg, fpreg;
ULONGEST fstat;
int tos;
mmxreg = regnum - tdep->mm0_regnum;
- regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
+ regcache->raw_read (I387_FSTAT_REGNUM (tdep), &fstat);
tos = (fstat >> 11) & 0x7;
fpreg = (mmxreg + tos) % 8;
void
i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
- struct regcache *regcache,
+ readable_regcache *regcache,
int regnum,
struct value *result_value)
{
- gdb_byte raw_buf[MAX_REGISTER_SIZE];
+ gdb_byte raw_buf[I386_MAX_REGISTER_SIZE];
enum register_status status;
gdb_byte *buf = value_contents_raw (result_value);
int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
/* Extract (always little endian). */
- status = regcache_raw_read (regcache, fpnum, raw_buf);
+ status = regcache->raw_read (fpnum, raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
regnum -= tdep->bnd0_regnum;
/* Extract (always little endian). Read lower 128bits. */
- status = regcache_raw_read (regcache,
- I387_BND0R_REGNUM (tdep) + regnum,
- raw_buf);
+ status = regcache->raw_read (I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0, 16);
else
regnum -= tdep->k0_regnum;
/* Extract (always little endian). */
- status = regcache_raw_read (regcache,
- tdep->k0_regnum + regnum,
- raw_buf);
+ status = regcache->raw_read (tdep->k0_regnum + regnum, raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0, 8);
else
if (regnum < num_lower_zmm_regs)
{
/* Extract (always little endian). Read lower 128bits. */
- status = regcache_raw_read (regcache,
- I387_XMM0_REGNUM (tdep) + regnum,
- raw_buf);
+ status = regcache->raw_read (I387_XMM0_REGNUM (tdep) + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0, 16);
else
memcpy (buf, raw_buf, 16);
/* Extract (always little endian). Read upper 128bits. */
- status = regcache_raw_read (regcache,
- tdep->ymm0h_regnum + regnum,
- raw_buf);
+ status = regcache->raw_read (tdep->ymm0h_regnum + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 16, 16);
else
else
{
/* Extract (always little endian). Read lower 128bits. */
- status = regcache_raw_read (regcache,
- I387_XMM16_REGNUM (tdep) + regnum
- - num_lower_zmm_regs,
- raw_buf);
+ status = regcache->raw_read (I387_XMM16_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0, 16);
else
memcpy (buf, raw_buf, 16);
/* Extract (always little endian). Read upper 128bits. */
- status = regcache_raw_read (regcache,
- I387_YMM16H_REGNUM (tdep) + regnum
- - num_lower_zmm_regs,
- raw_buf);
+ status = regcache->raw_read (I387_YMM16H_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 16, 16);
else
}
/* Read upper 256bits. */
- status = regcache_raw_read (regcache,
- tdep->zmm0h_regnum + regnum,
- raw_buf);
+ status = regcache->raw_read (tdep->zmm0h_regnum + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 32, 32);
else
regnum -= tdep->ymm0_regnum;
/* Extract (always little endian). Read lower 128bits. */
- status = regcache_raw_read (regcache,
- I387_XMM0_REGNUM (tdep) + regnum,
- raw_buf);
+ status = regcache->raw_read (I387_XMM0_REGNUM (tdep) + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0, 16);
else
memcpy (buf, raw_buf, 16);
/* Read upper 128bits. */
- status = regcache_raw_read (regcache,
- tdep->ymm0h_regnum + regnum,
- raw_buf);
+ status = regcache->raw_read (tdep->ymm0h_regnum + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 16, 32);
else
{
regnum -= tdep->ymm16_regnum;
/* Extract (always little endian). Read lower 128bits. */
- status = regcache_raw_read (regcache,
- I387_XMM16_REGNUM (tdep) + regnum,
- raw_buf);
+ status = regcache->raw_read (I387_XMM16_REGNUM (tdep) + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0, 16);
else
memcpy (buf, raw_buf, 16);
/* Read upper 128bits. */
- status = regcache_raw_read (regcache,
- tdep->ymm16h_regnum + regnum,
- raw_buf);
+ status = regcache->raw_read (tdep->ymm16h_regnum + regnum,
+ raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 16, 16);
else
int gpnum = regnum - tdep->ax_regnum;
/* Extract (always little endian). */
- status = regcache_raw_read (regcache, gpnum, raw_buf);
+ status = regcache->raw_read (gpnum, raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
/* Extract (always little endian). We read both lower and
upper registers. */
- status = regcache_raw_read (regcache, gpnum % 4, raw_buf);
+ status = regcache->raw_read (gpnum % 4, raw_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
static struct value *
i386_pseudo_register_read_value (struct gdbarch *gdbarch,
- struct regcache *regcache,
+ readable_regcache *regcache,
int regnum)
{
struct value *result;
i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
int regnum, const gdb_byte *buf)
{
- gdb_byte raw_buf[MAX_REGISTER_SIZE];
+ gdb_byte raw_buf[I386_MAX_REGISTER_SIZE];
if (i386_mmx_regnum_p (gdbarch, regnum))
{
int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
/* Read ... */
- regcache_raw_read (regcache, fpnum, raw_buf);
+ regcache->raw_read (fpnum, raw_buf);
/* ... Modify ... (always little endian). */
memcpy (raw_buf, buf, register_size (gdbarch, regnum));
/* ... Write. */
- regcache_raw_write (regcache, fpnum, raw_buf);
+ regcache->raw_write (fpnum, raw_buf);
}
else
{
upper = extract_unsigned_integer (buf + size, size, byte_order);
/* Fetching register buffer. */
- regcache_raw_read (regcache,
- I387_BND0R_REGNUM (tdep) + regnum,
- raw_buf);
+ regcache->raw_read (I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
upper = ~upper;
memcpy (raw_buf, &lower, 8);
memcpy (raw_buf + 8, &upper, 8);
-
- regcache_raw_write (regcache,
- I387_BND0R_REGNUM (tdep) + regnum,
- raw_buf);
+ regcache->raw_write (I387_BND0R_REGNUM (tdep) + regnum, raw_buf);
}
else if (i386_k_regnum_p (gdbarch, regnum))
{
regnum -= tdep->k0_regnum;
- regcache_raw_write (regcache,
- tdep->k0_regnum + regnum,
- buf);
+ regcache->raw_write (tdep->k0_regnum + regnum, buf);
}
else if (i386_zmm_regnum_p (gdbarch, regnum))
{
if (regnum < num_lower_zmm_regs)
{
/* Write lower 128bits. */
- regcache_raw_write (regcache,
- I387_XMM0_REGNUM (tdep) + regnum,
- buf);
+ regcache->raw_write (I387_XMM0_REGNUM (tdep) + regnum, buf);
/* Write upper 128bits. */
- regcache_raw_write (regcache,
- I387_YMM0_REGNUM (tdep) + regnum,
- buf + 16);
+ regcache->raw_write (I387_YMM0_REGNUM (tdep) + regnum, buf + 16);
}
else
{
/* Write lower 128bits. */
- regcache_raw_write (regcache,
- I387_XMM16_REGNUM (tdep) + regnum
- - num_lower_zmm_regs,
- buf);
+ regcache->raw_write (I387_XMM16_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs, buf);
/* Write upper 128bits. */
- regcache_raw_write (regcache,
- I387_YMM16H_REGNUM (tdep) + regnum
- - num_lower_zmm_regs,
- buf + 16);
+ regcache->raw_write (I387_YMM16H_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs, buf + 16);
}
/* Write upper 256bits. */
- regcache_raw_write (regcache,
- tdep->zmm0h_regnum + regnum,
- buf + 32);
+ regcache->raw_write (tdep->zmm0h_regnum + regnum, buf + 32);
}
else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
/* ... Write lower 128bits. */
- regcache_raw_write (regcache,
- I387_XMM0_REGNUM (tdep) + regnum,
- buf);
+ regcache->raw_write (I387_XMM0_REGNUM (tdep) + regnum, buf);
/* ... Write upper 128bits. */
- regcache_raw_write (regcache,
- tdep->ymm0h_regnum + regnum,
- buf + 16);
+ regcache->raw_write (tdep->ymm0h_regnum + regnum, buf + 16);
}
else if (i386_ymm_avx512_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm16_regnum;
/* ... Write lower 128bits. */
- regcache_raw_write (regcache,
- I387_XMM16_REGNUM (tdep) + regnum,
- buf);
+ regcache->raw_write (I387_XMM16_REGNUM (tdep) + regnum, buf);
/* ... Write upper 128bits. */
- regcache_raw_write (regcache,
- tdep->ymm16h_regnum + regnum,
- buf + 16);
+ regcache->raw_write (tdep->ymm16h_regnum + regnum, buf + 16);
}
else if (i386_word_regnum_p (gdbarch, regnum))
{
int gpnum = regnum - tdep->ax_regnum;
/* Read ... */
- regcache_raw_read (regcache, gpnum, raw_buf);
+ regcache->raw_read (gpnum, raw_buf);
/* ... Modify ... (always little endian). */
memcpy (raw_buf, buf, 2);
/* ... Write. */
- regcache_raw_write (regcache, gpnum, raw_buf);
+ regcache->raw_write (gpnum, raw_buf);
}
else if (i386_byte_regnum_p (gdbarch, regnum))
{
int gpnum = regnum - tdep->al_regnum;
/* Read ... We read both lower and upper registers. */
- regcache_raw_read (regcache, gpnum % 4, raw_buf);
+ regcache->raw_read (gpnum % 4, raw_buf);
/* ... Modify ... (always little endian). */
if (gpnum >= 4)
memcpy (raw_buf + 1, buf, 1);
else
memcpy (raw_buf, buf, 1);
/* ... Write. */
- regcache_raw_write (regcache, gpnum % 4, raw_buf);
+ regcache->raw_write (gpnum % 4, raw_buf);
}
else
internal_error (__FILE__, __LINE__, _("invalid regnum"));
gdb_assert (register_size (gdbarch, regnum) == 4);
if (!get_frame_register_bytes (frame, regnum, 0,
- register_size (gdbarch, regnum),
- to, optimizedp, unavailablep))
+ gdb::make_array_view (to,
+ register_size (gdbarch,
+ regnum)),
+ optimizedp, unavailablep))
return 0;
regnum = i386_next_regnum (regnum);
i386_supply_gregset (const struct regset *regset, struct regcache *regcache,
int regnum, const void *gregs, size_t len)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
const gdb_byte *regs = (const gdb_byte *) gregs;
int i;
{
if ((regnum == i || regnum == -1)
&& tdep->gregset_reg_offset[i] != -1)
- regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
+ regcache->raw_supply (i, regs + tdep->gregset_reg_offset[i]);
}
}
const struct regcache *regcache,
int regnum, void *gregs, size_t len)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
gdb_byte *regs = (gdb_byte *) gregs;
int i;
{
if ((regnum == i || regnum == -1)
&& tdep->gregset_reg_offset[i] != -1)
- regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]);
+ regcache->raw_collect (i, regs + tdep->gregset_reg_offset[i]);
}
}
i386_supply_fpregset (const struct regset *regset, struct regcache *regcache,
int regnum, const void *fpregs, size_t len)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
if (len == I387_SIZEOF_FXSAVE)
const struct regcache *regcache,
int regnum, void *fpregs, size_t len)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
if (len == I387_SIZEOF_FXSAVE)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- cb (".reg", tdep->sizeof_gregset, &i386_gregset, NULL, cb_data);
+ cb (".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, &i386_gregset, NULL,
+ cb_data);
if (tdep->sizeof_fpregset)
- cb (".reg2", tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
+ cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset,
+ NULL, cb_data);
}
\f
read_memory_unsigned_integer (pc + 2, 4, byte_order);
struct minimal_symbol *indsym =
indirect ? lookup_minimal_symbol_by_pc (indirect).minsym : 0;
- const char *symname = indsym ? MSYMBOL_LINKAGE_NAME (indsym) : 0;
+ const char *symname = indsym ? indsym->linkage_name () : 0;
if (symname)
{
gdb_assert (disassembly_flavor == att_flavor
|| disassembly_flavor == intel_flavor);
- /* FIXME: kettenis/20020915: Until disassembler_options is properly
- constified, cast to prevent a compiler warning. */
- info->disassembler_options = (char *) disassembly_flavor;
+ info->disassembler_options = disassembly_flavor;
- return print_insn_i386 (pc, info);
+ return default_print_insn (pc, info);
}
\f
This function parses operands of the form `-8+3+1(%rbp)', which
must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
- Return 1 if the operand was parsed successfully, zero
+ Return true if the operand was parsed successfully, false
otherwise. */
-static int
+static bool
i386_stap_parse_special_token_triplet (struct gdbarch *gdbarch,
struct stap_parse_info *p)
{
if (isdigit (*s) || *s == '-' || *s == '+')
{
- int got_minus[3];
+ bool got_minus[3];
int i;
long displacements[3];
const char *start;
struct stoken str;
char *endp;
- got_minus[0] = 0;
+ got_minus[0] = false;
if (*s == '+')
++s;
else if (*s == '-')
{
++s;
- got_minus[0] = 1;
+ got_minus[0] = true;
}
if (!isdigit ((unsigned char) *s))
- return 0;
+ return false;
displacements[0] = strtol (s, &endp, 10);
s = endp;
if (*s != '+' && *s != '-')
{
/* We are not dealing with a triplet. */
- return 0;
+ return false;
}
- got_minus[1] = 0;
+ got_minus[1] = false;
if (*s == '+')
++s;
else
{
++s;
- got_minus[1] = 1;
+ got_minus[1] = true;
}
if (!isdigit ((unsigned char) *s))
- return 0;
+ return false;
displacements[1] = strtol (s, &endp, 10);
s = endp;
if (*s != '+' && *s != '-')
{
/* We are not dealing with a triplet. */
- return 0;
+ return false;
}
- got_minus[2] = 0;
+ got_minus[2] = false;
if (*s == '+')
++s;
else
{
++s;
- got_minus[2] = 1;
+ got_minus[2] = true;
}
if (!isdigit ((unsigned char) *s))
- return 0;
+ return false;
displacements[2] = strtol (s, &endp, 10);
s = endp;
if (*s != '(' || s[1] != '%')
- return 0;
+ return false;
s += 2;
start = s;
++s;
if (*s++ != ')')
- return 0;
+ return false;
len = s - start - 1;
regname = (char *) alloca (len + 1);
p->arg = s;
- return 1;
+ return true;
}
- return 0;
+ return false;
}
/* Helper function for i386_stap_parse_special_token.
(register index * size) + offset', as represented in
`(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
- Return 1 if the operand was parsed successfully, zero
+ Return true if the operand was parsed successfully, false
otherwise. */
-static int
+static bool
i386_stap_parse_special_token_three_arg_disp (struct gdbarch *gdbarch,
struct stap_parse_info *p)
{
if (isdigit (*s) || *s == '(' || *s == '-' || *s == '+')
{
- int offset_minus = 0;
+ bool offset_minus = false;
long offset = 0;
- int size_minus = 0;
+ bool size_minus = false;
long size = 0;
const char *start;
char *base;
else if (*s == '-')
{
++s;
- offset_minus = 1;
+ offset_minus = true;
}
if (offset_minus && !isdigit (*s))
- return 0;
+ return false;
if (isdigit (*s))
{
}
if (*s != '(' || s[1] != '%')
- return 0;
+ return false;
s += 2;
start = s;
++s;
if (*s != ',' || s[1] != '%')
- return 0;
+ return false;
len_base = s - start;
base = (char *) alloca (len_base + 1);
index, p->saved_arg);
if (*s != ',' && *s != ')')
- return 0;
+ return false;
if (*s == ',')
{
else if (*s == '-')
{
++s;
- size_minus = 1;
+ size_minus = true;
}
size = strtol (s, &endp, 10);
s = endp;
if (*s != ')')
- return 0;
+ return false;
}
++s;
p->arg = s;
- return 1;
+ return true;
}
- return 0;
+ return false;
}
/* Implementation of `gdbarch_stap_parse_special_token', as defined in
return 0;
}
+/* Implementation of 'gdbarch_stap_adjust_register', as defined in
+ gdbarch.h. */
+
+static std::string
+i386_stap_adjust_register (struct gdbarch *gdbarch, struct stap_parse_info *p,
+ const std::string ®name, int regnum)
+{
+ static const std::unordered_set<std::string> reg_assoc
+ = { "ax", "bx", "cx", "dx",
+ "si", "di", "bp", "sp" };
+
+ /* If we are dealing with a register whose size is less than the size
+ specified by the "[-]N@" prefix, and it is one of the registers that
+ we know has an extended variant available, then use the extended
+ version of the register instead. */
+ if (register_size (gdbarch, regnum) < TYPE_LENGTH (p->arg_type)
+ && reg_assoc.find (regname) != reg_assoc.end ())
+ return "e" + regname;
+
+ /* Otherwise, just use the requested register. */
+ return regname;
+}
+
\f
/* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
\f
+/* Implement the "in_indirect_branch_thunk" gdbarch function. */
+
+static bool
+i386_in_indirect_branch_thunk (struct gdbarch *gdbarch, CORE_ADDR pc)
+{
+ return x86_in_indirect_branch_thunk (pc, i386_register_names,
+ I386_EAX_REGNUM, I386_EIP_REGNUM);
+}
+
/* Generic ELF. */
void
i386_stap_is_single_operand);
set_gdbarch_stap_parse_special_token (gdbarch,
i386_stap_parse_special_token);
+ set_gdbarch_stap_adjust_register (gdbarch,
+ i386_stap_adjust_register);
- set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp);
+ set_gdbarch_in_indirect_branch_thunk (gdbarch,
+ i386_in_indirect_branch_thunk);
}
/* System V Release 4 (SVR4). */
tdep->jb_pc_offset = 20;
}
-/* DJGPP. */
-
-static void
-i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
-{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-
- /* DJGPP doesn't have any special frames for signal handlers. */
- tdep->sigtramp_p = NULL;
-
- tdep->jb_pc_offset = 36;
-
- /* DJGPP does not support the SSE registers. */
- if (! tdesc_has_registers (info.target_desc))
- tdep->tdesc = tdesc_i386_mmx;
-
- /* Native compiler is GCC, which uses the SVR4 register numbering
- even in COFF and STABS. See the comment in i386_gdbarch_init,
- before the calls to set_gdbarch_stab_reg_to_regnum and
- set_gdbarch_sdb_reg_to_regnum. */
- set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
- set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
-
- set_gdbarch_has_dos_based_file_system (gdbarch, 1);
-
- set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp);
-}
\f
/* i386 register groups. In addition to the normal groups, add "mmx"
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p,
ymm_regnum_p, ymmh_regnum_p, ymm_avx512_regnum_p, ymmh_avx512_regnum_p,
- bndr_regnum_p, bnd_regnum_p, k_regnum_p, zmm_regnum_p, zmmh_regnum_p,
- zmm_avx512_regnum_p, mpx_ctrl_regnum_p, xmm_avx512_regnum_p,
- avx512_p, avx_p, sse_p;
+ bndr_regnum_p, bnd_regnum_p, zmm_regnum_p, zmmh_regnum_p,
+ mpx_ctrl_regnum_p, xmm_avx512_regnum_p,
+ avx512_p, avx_p, sse_p, pkru_regnum_p;
/* Don't include pseudo registers, except for MMX, in any register
groups. */
if (group == i386_mmx_reggroup)
return mmx_regnum_p;
+ pkru_regnum_p = i386_pkru_regnum_p(gdbarch, regnum);
xmm_regnum_p = i386_xmm_regnum_p (gdbarch, regnum);
xmm_avx512_regnum_p = i386_xmm_avx512_regnum_p (gdbarch, regnum);
mxcsr_regnum_p = i386_mxcsr_regnum_p (gdbarch, regnum);
ymm_avx512_regnum_p = i386_ymm_avx512_regnum_p (gdbarch, regnum);
zmm_regnum_p = i386_zmm_regnum_p (gdbarch, regnum);
- avx512_p = ((tdep->xcr0 & X86_XSTATE_AVX512_MASK)
- == X86_XSTATE_AVX512_MASK);
- avx_p = ((tdep->xcr0 & X86_XSTATE_AVX512_MASK)
+ avx512_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK)
+ == X86_XSTATE_AVX_AVX512_MASK);
+ avx_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK)
== X86_XSTATE_AVX_MASK) && !avx512_p;
- sse_p = ((tdep->xcr0 & X86_XSTATE_AVX512_MASK)
+ sse_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK)
== X86_XSTATE_SSE_MASK) && !avx512_p && ! avx_p;
if (group == vector_reggroup)
&& !bnd_regnum_p
&& !mpx_ctrl_regnum_p
&& !zmm_regnum_p
- && !zmmh_regnum_p);
+ && !zmmh_regnum_p
+ && !pkru_regnum_p);
return default_register_reggroup_p (gdbarch, regnum, group);
}
offset64 = 0;
if (base != 0xff)
- {
+ {
if (base == 4 && irp->popl_esp_hack)
*addr += irp->popl_esp_hack;
regcache_raw_read_unsigned (irp->regcache, irp->regmap[base],
- &offset64);
+ &offset64);
}
if (irp->aflag == 2)
- {
+ {
*addr += offset64;
- }
+ }
else
- *addr = (uint32_t) (offset64 + *addr);
+ *addr = (uint32_t) (offset64 + *addr);
if (havesib && (index != 4 || scale != 0))
{
regcache_raw_read_unsigned (irp->regcache, irp->regmap[index],
- &offset64);
+ &offset64);
if (irp->aflag == 2)
*addr += offset64 << scale;
else
case 0:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REBX_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_RESI_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
case 1:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REBX_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REDI_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
case 2:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REBP_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_RESI_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
case 3:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REBP_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REDI_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
case 4:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_RESI_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
case 5:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REDI_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
case 6:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REBP_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
case 7:
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_REBX_REGNUM],
- &offset64);
+ &offset64);
*addr = (uint32_t) (*addr + offset64);
break;
}
if (irp->override >= 0)
{
if (record_full_memory_query)
- {
- if (yquery (_("\
+ {
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, irp->orig_addr)))
+ paddress (gdbarch, irp->orig_addr)))
return -1;
- }
+ }
return 0;
}
wrong, 0 otherwise. */
static int i386_record_floats (struct gdbarch *gdbarch,
- struct i386_record_s *ir,
- uint32_t iregnum)
+ struct i386_record_s *ir,
+ uint32_t iregnum)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int i;
if (I386_SAVE_FPU_REGS == iregnum)
{
for (i = I387_ST0_REGNUM (tdep); i <= I387_ST0_REGNUM (tdep) + 7; i++)
- {
- if (record_full_arch_list_add_reg (ir->regcache, i))
- return -1;
- }
+ {
+ if (record_full_arch_list_add_reg (ir->regcache, i))
+ return -1;
+ }
}
else if (I386_SAVE_FPU_ENV == iregnum)
{
for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
{
if (record_full_arch_list_add_reg (ir->regcache, i))
- return -1;
+ return -1;
}
}
else if (I386_SAVE_FPU_ENV_REG_STACK == iregnum)
{
for (i = I387_ST0_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
{
- if (record_full_arch_list_add_reg (ir->regcache, i))
- return -1;
+ if (record_full_arch_list_add_reg (ir->regcache, i))
+ return -1;
}
}
else if ((iregnum >= I387_ST0_REGNUM (tdep)) &&
- (iregnum <= I387_FOP_REGNUM (tdep)))
+ (iregnum <= I387_FOP_REGNUM (tdep)))
{
if (record_full_arch_list_add_reg (ir->regcache,iregnum))
- return -1;
+ return -1;
}
else
{
for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
{
if (record_full_arch_list_add_reg (ir->regcache, i))
- return -1;
+ return -1;
}
}
return 0;
uint32_t opcode;
uint8_t opcode8;
ULONGEST addr;
- gdb_byte buf[MAX_REGISTER_SIZE];
+ gdb_byte buf[I386_MAX_REGISTER_SIZE];
struct i386_record_s ir;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
uint8_t rex_w = -1;
if (record_debug > 1)
fprintf_unfiltered (gdb_stdlog, "Process record: i386_process_record "
- "addr = %s\n",
+ "addr = %s\n",
paddress (gdbarch, ir.addr));
/* prefixes */
case ADDR_PREFIX_OPCODE:
prefixes |= PREFIX_ADDR;
break;
- case 0x40: /* i386 inc %eax */
- case 0x41: /* i386 inc %ecx */
- case 0x42: /* i386 inc %edx */
- case 0x43: /* i386 inc %ebx */
- case 0x44: /* i386 inc %esp */
- case 0x45: /* i386 inc %ebp */
- case 0x46: /* i386 inc %esi */
- case 0x47: /* i386 inc %edi */
- case 0x48: /* i386 dec %eax */
- case 0x49: /* i386 dec %ecx */
- case 0x4a: /* i386 dec %edx */
- case 0x4b: /* i386 dec %ebx */
- case 0x4c: /* i386 dec %esp */
- case 0x4d: /* i386 dec %ebp */
- case 0x4e: /* i386 dec %esi */
- case 0x4f: /* i386 dec %edi */
- if (ir.regmap[X86_RECORD_R8_REGNUM]) /* 64 bit target */
- {
- /* REX */
- rex_w = (opcode8 >> 3) & 1;
- rex_r = (opcode8 & 0x4) << 1;
- ir.rex_x = (opcode8 & 0x2) << 2;
- ir.rex_b = (opcode8 & 0x1) << 3;
- }
+ case 0x40: /* i386 inc %eax */
+ case 0x41: /* i386 inc %ecx */
+ case 0x42: /* i386 inc %edx */
+ case 0x43: /* i386 inc %ebx */
+ case 0x44: /* i386 inc %esp */
+ case 0x45: /* i386 inc %ebp */
+ case 0x46: /* i386 inc %esi */
+ case 0x47: /* i386 inc %edi */
+ case 0x48: /* i386 dec %eax */
+ case 0x49: /* i386 dec %ecx */
+ case 0x4a: /* i386 dec %edx */
+ case 0x4b: /* i386 dec %ebx */
+ case 0x4c: /* i386 dec %esp */
+ case 0x4d: /* i386 dec %ebp */
+ case 0x4e: /* i386 dec %esi */
+ case 0x4f: /* i386 dec %edi */
+ if (ir.regmap[X86_RECORD_R8_REGNUM]) /* 64 bit target */
+ {
+ /* REX */
+ rex_w = (opcode8 >> 3) & 1;
+ rex_r = (opcode8 & 0x4) << 1;
+ ir.rex_x = (opcode8 & 0x2) << 2;
+ ir.rex_b = (opcode8 & 0x1) << 3;
+ }
else /* 32 bit target */
goto out_prefixes;
- break;
+ break;
default:
goto out_prefixes;
break;
else
{
if (prefixes & PREFIX_DATA)
- ir.dflag ^= 1;
+ ir.dflag ^= 1;
}
if (prefixes & PREFIX_ADDR)
ir.aflag ^= 1;
}
else
{
- ir.rm |= ir.rex_b;
+ ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
case 1: /* OP Gv, Ev */
if (i386_record_modrm (&ir))
return -1;
- ir.reg |= rex_r;
+ ir.reg |= rex_r;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
if (ir.mod != 3)
{
- if (opcode == 0x83)
- ir.rip_offset = 1;
- else
- ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
+ if (opcode == 0x83)
+ ir.rip_offset = 1;
+ else
+ ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
if (i386_record_lea_modrm (&ir))
return -1;
}
return -1;
if (ir.mod != 3 && ir.reg == 0)
- ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
+ ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
switch (ir.reg)
{
}
else
{
- ir.rm |= ir.rex_b;
+ ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
{
case 0: /* inc */
case 1: /* dec */
- if ((opcode & 1) == 0)
+ if ((opcode & 1) == 0)
ir.ot = OT_BYTE;
- else
+ else
ir.ot = ir.dflag + OT_WORD;
if (ir.mod != 3)
{
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 2: /* call */
- if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
- ir.dflag = 2;
+ if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
+ ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
return -1;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 6: /* push */
- if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
- ir.dflag = 2;
+ if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
+ ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
return -1;
break;
if (i386_record_modrm (&ir))
return -1;
if (opcode == 0x69)
- ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
+ ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
else if (opcode == 0x6b)
- ir.rip_offset = 1;
+ ir.rip_offset = 1;
ir.reg |= rex_r;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
return -1;
if (ir.mod == 3)
{
- ir.reg |= rex_r;
+ ir.reg |= rex_r;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
- case 0x0fc7: /* cmpxchg8b */
+ case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
{
- ir.addr -= 2;
- opcode = opcode << 8 | ir.modrm;
- goto no_support;
+ /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
+ an extended opcode. rdrand has bits 110 (/6) and rdseed
+ has bits 111 (/7). */
+ if (ir.reg == 6 || ir.reg == 7)
+ {
+ /* The storage register is described by the 3 R/M bits, but the
+ REX.B prefix may be used to give access to registers
+ R8~R15. In this case ir.rex_b + R/M will give us the register
+ in the range R8~R15.
+
+ REX.W may also be used to access 64-bit registers, but we
+ already record entire registers and not just partial bits
+ of them. */
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rex_b + ir.rm);
+ /* These instructions also set conditional bits. */
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+ }
+ else
+ {
+ /* We don't handle this particular instruction yet. */
+ ir.addr -= 2;
+ opcode = opcode << 8 | ir.modrm;
+ goto no_support;
+ }
}
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
case 0x68:
case 0x6a:
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
- ir.dflag = 2;
+ ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
return -1;
break;
case 0x16: /* push ss */
case 0x1e: /* push ds */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 1;
goto no_support;
}
case 0x0fa0: /* push fs */
case 0x0fa8: /* push gs */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 2;
goto no_support;
}
case 0x60: /* pusha */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 1;
goto no_support;
}
case 0x61: /* popa */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 1;
goto no_support;
}
if (ir.regmap[X86_RECORD_R8_REGNUM])
ir.ot = ir.dflag ? OT_QUAD : OT_WORD;
else
- ir.ot = ir.dflag + OT_WORD;
+ ir.ot = ir.dflag + OT_WORD;
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
- ir.popl_esp_hack = 1 << ir.ot;
+ ir.popl_esp_hack = 1 << ir.ot;
if (i386_record_lea_modrm (&ir))
return -1;
}
case 0xc8: /* enter */
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
- ir.dflag = 2;
+ ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
return -1;
break;
case 0x07: /* pop es */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 1;
goto no_support;
}
case 0x17: /* pop ss */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 1;
goto no_support;
}
case 0x1f: /* pop ds */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 1;
goto no_support;
}
if (ir.mod != 3)
{
- if (opcode == 0xc6 || opcode == 0xc7)
+ if (opcode == 0xc6 || opcode == 0xc7)
ir.rip_offset = (ir.ot > OT_LONG) ? 4 : (1 << ir.ot);
if (i386_record_lea_modrm (&ir))
return -1;
}
else
{
- if (opcode == 0xc6 || opcode == 0xc7)
+ if (opcode == 0xc6 || opcode == 0xc7)
ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
case 0xa2: /* mov EAX */
case 0xa3:
if (ir.override >= 0)
- {
- if (record_full_memory_query)
- {
- if (yquery (_("\
+ {
+ if (record_full_memory_query)
+ {
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr)))
- return -1;
- }
+ paddress (gdbarch, ir.orig_addr)))
+ return -1;
+ }
}
else
{
- if ((opcode & 1) == 0)
+ if ((opcode & 1) == 0)
ir.ot = OT_BYTE;
else
ir.ot = ir.dflag + OT_WORD;
if (ir.aflag == 2)
{
- if (record_read_memory (gdbarch, ir.addr, buf, 8))
+ if (record_read_memory (gdbarch, ir.addr, buf, 8))
return -1;
ir.addr += 8;
addr = extract_unsigned_integer (buf, 8, byte_order);
}
- else if (ir.aflag)
+ else if (ir.aflag)
{
- if (record_read_memory (gdbarch, ir.addr, buf, 4))
+ if (record_read_memory (gdbarch, ir.addr, buf, 4))
return -1;
ir.addr += 4;
- addr = extract_unsigned_integer (buf, 4, byte_order);
+ addr = extract_unsigned_integer (buf, 4, byte_order);
}
- else
+ else
{
- if (record_read_memory (gdbarch, ir.addr, buf, 2))
+ if (record_read_memory (gdbarch, ir.addr, buf, 2))
return -1;
ir.addr += 2;
- addr = extract_unsigned_integer (buf, 2, byte_order);
+ addr = extract_unsigned_integer (buf, 2, byte_order);
}
if (record_full_arch_list_add_mem (addr, 1 << ir.ot))
return -1;
- }
+ }
break;
case 0xb0: /* mov R, Ib */
case 0xc4: /* les Gv */
case 0xc5: /* lds Gv */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
+ {
ir.addr -= 1;
goto no_support;
}
switch (ir.reg)
{
case 0x02:
- case 0x12:
- case 0x22:
- case 0x32:
+ case 0x12:
+ case 0x22:
+ case 0x32:
/* For fcom, ficom nothing to do. */
- break;
+ break;
case 0x03:
- case 0x13:
- case 0x23:
- case 0x33:
+ case 0x13:
+ case 0x23:
+ case 0x33:
/* For fcomp, ficomp pop FPU stack, store all. */
- if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
- return -1;
- break;
- case 0x00:
- case 0x01:
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ break;
+ case 0x00:
+ case 0x01:
case 0x04:
case 0x05:
case 0x06:
case 0x35:
case 0x36:
case 0x37:
- /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
- fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
- of code, always affects st(0) register. */
- if (i386_record_floats (gdbarch, &ir, I387_ST0_REGNUM (tdep)))
- return -1;
+ /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
+ fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
+ of code, always affects st(0) register. */
+ if (i386_record_floats (gdbarch, &ir, I387_ST0_REGNUM (tdep)))
+ return -1;
break;
case 0x08:
case 0x0a:
case 0x19:
case 0x1a:
case 0x1b:
- case 0x1d:
+ case 0x1d:
case 0x28:
case 0x29:
case 0x2a:
case 0x39:
case 0x3a:
case 0x3b:
- case 0x3c:
- case 0x3d:
+ case 0x3c:
+ case 0x3d:
switch (ir.reg & 7)
{
case 0:
}
break;
case 0x0c:
- /* Insn fldenv. */
- if (i386_record_floats (gdbarch, &ir,
- I386_SAVE_FPU_ENV_REG_STACK))
- return -1;
- break;
+ /* Insn fldenv. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
+ break;
case 0x0d:
- /* Insn fldcw. */
- if (i386_record_floats (gdbarch, &ir, I387_FCTRL_REGNUM (tdep)))
- return -1;
- break;
+ /* Insn fldcw. */
+ if (i386_record_floats (gdbarch, &ir, I387_FCTRL_REGNUM (tdep)))
+ return -1;
+ break;
case 0x2c:
- /* Insn frstor. */
- if (i386_record_floats (gdbarch, &ir,
- I386_SAVE_FPU_ENV_REG_STACK))
- return -1;
+ /* Insn frstor. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
break;
case 0x0e:
if (ir.dflag)
case 0x2f:
if (record_full_arch_list_add_mem (addr64, 2))
return -1;
- /* Insn fstp, fbstp. */
- if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
- return -1;
+ /* Insn fstp, fbstp. */
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
break;
case 0x1f:
case 0x3e:
}
/* Opcode is an extension of modR/M byte. */
else
- {
+ {
switch (opcode)
{
case 0xd8:
I386_SAVE_FPU_REGS))
return -1;
}
- else
+ else
{
if (i386_record_floats (gdbarch, &ir,
I387_ST0_REGNUM (tdep)))
}
}
}
- else
- {
+ else
+ {
switch (ir.modrm)
{
case 0xe0:
break;
}
}
- break;
- case 0xda:
- if (0xe9 == ir.modrm)
- {
+ break;
+ case 0xda:
+ if (0xe9 == ir.modrm)
+ {
if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
return -1;
- }
- else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
- {
+ }
+ else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
+ {
if (i386_record_floats (gdbarch, &ir,
I387_ST0_REGNUM (tdep)))
return -1;
((ir.modrm & 0x0f) - 0x08)))
return -1;
}
- }
- break;
- case 0xdb:
- if (0xe3 == ir.modrm)
- {
+ }
+ break;
+ case 0xdb:
+ if (0xe3 == ir.modrm)
+ {
if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_ENV))
return -1;
- }
- else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
- {
+ }
+ else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
+ {
if (i386_record_floats (gdbarch, &ir,
I387_ST0_REGNUM (tdep)))
return -1;
((ir.modrm & 0x0f) - 0x08)))
return -1;
}
- }
- break;
- case 0xdc:
- if ((0x0c == ir.modrm >> 4)
+ }
+ break;
+ case 0xdc:
+ if ((0x0c == ir.modrm >> 4)
|| (0x0d == ir.modrm >> 4)
|| (0x0f == ir.modrm >> 4))
- {
+ {
if ((ir.modrm & 0x0f) <= 7)
{
if (i386_record_floats (gdbarch, &ir,
((ir.modrm & 0x0f) - 0x08)))
return -1;
}
- }
+ }
break;
- case 0xdd:
- if (0x0c == ir.modrm >> 4)
- {
- if (i386_record_floats (gdbarch, &ir,
- I387_FTAG_REGNUM (tdep)))
- return -1;
- }
- else if ((0x0d == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
- {
- if ((ir.modrm & 0x0f) <= 7)
- {
+ case 0xdd:
+ if (0x0c == ir.modrm >> 4)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_FTAG_REGNUM (tdep)))
+ return -1;
+ }
+ else if ((0x0d == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
+ {
+ if ((ir.modrm & 0x0f) <= 7)
+ {
if (i386_record_floats (gdbarch, &ir,
I387_ST0_REGNUM (tdep) +
(ir.modrm & 0x0f)))
return -1;
- }
- else
- {
- if (i386_record_floats (gdbarch, &ir,
+ }
+ else
+ {
+ if (i386_record_floats (gdbarch, &ir,
I386_SAVE_FPU_REGS))
- return -1;
- }
- }
- break;
- case 0xde:
- if ((0x0c == ir.modrm >> 4)
+ return -1;
+ }
+ }
+ break;
+ case 0xde:
+ if ((0x0c == ir.modrm >> 4)
|| (0x0e == ir.modrm >> 4)
|| (0x0f == ir.modrm >> 4)
|| (0xd9 == ir.modrm))
- {
+ {
if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
return -1;
- }
- break;
- case 0xdf:
- if (0xe0 == ir.modrm)
- {
+ }
+ break;
+ case 0xdf:
+ if (0xe0 == ir.modrm)
+ {
if (record_full_arch_list_add_reg (ir.regcache,
I386_EAX_REGNUM))
return -1;
- }
- else if ((0x0f == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
- {
+ }
+ else if ((0x0f == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
+ {
if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
return -1;
- }
- break;
+ }
+ break;
}
}
break;
case 0x6c: /* insS */
case 0x6d:
regcache_raw_read_unsigned (ir.regcache,
- ir.regmap[X86_RECORD_RECX_REGNUM],
- &addr);
+ ir.regmap[X86_RECORD_RECX_REGNUM],
+ &addr);
if (addr)
- {
- ULONGEST es, ds;
+ {
+ ULONGEST es, ds;
- if ((opcode & 1) == 0)
+ if ((opcode & 1) == 0)
ir.ot = OT_BYTE;
- else
+ else
ir.ot = ir.dflag + OT_WORD;
- regcache_raw_read_unsigned (ir.regcache,
- ir.regmap[X86_RECORD_REDI_REGNUM],
- &addr);
-
- regcache_raw_read_unsigned (ir.regcache,
- ir.regmap[X86_RECORD_ES_REGNUM],
- &es);
- regcache_raw_read_unsigned (ir.regcache,
- ir.regmap[X86_RECORD_DS_REGNUM],
- &ds);
- if (ir.aflag && (es != ds))
- {
- /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
- if (record_full_memory_query)
- {
- if (yquery (_("\
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &addr);
+
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_ES_REGNUM],
+ &es);
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_DS_REGNUM],
+ &ds);
+ if (ir.aflag && (es != ds))
+ {
+ /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
+ if (record_full_memory_query)
+ {
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr)))
- return -1;
- }
- }
- else
- {
- if (record_full_arch_list_add_mem (addr, 1 << ir.ot))
- return -1;
- }
-
- if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- if (opcode == 0xa4 || opcode == 0xa5)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ paddress (gdbarch, ir.orig_addr)))
+ return -1;
+ }
+ }
+ else
+ {
+ if (record_full_arch_list_add_mem (addr, 1 << ir.ot))
+ return -1;
+ }
+
+ if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ if (opcode == 0xa4 || opcode == 0xa5)
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
}
break;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xaf:
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x6f:
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xe8: /* call im */
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
- ir.dflag = 2;
+ ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
- return -1;
+ return -1;
break;
case 0x9a: /* lcall im */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- ir.addr -= 1;
- goto no_support;
- }
+ {
+ ir.addr -= 1;
+ goto no_support;
+ }
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM);
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
- return -1;
+ return -1;
break;
case 0xe9: /* jmp im */
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rex_b ? (ir.rm | ir.rex_b)
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rex_b ? (ir.rm | ir.rex_b)
: (ir.rm & 0x3));
else
{
case 0x9c: /* pushf */
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
- ir.dflag = 2;
+ ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
- return -1;
+ return -1;
break;
case 0x9d: /* popf */
case 0x9e: /* sahf */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- ir.addr -= 1;
- goto no_support;
- }
+ {
+ ir.addr -= 1;
+ goto no_support;
+ }
/* FALLTHROUGH */
case 0xf5: /* cmc */
case 0xf8: /* clc */
case 0x9f: /* lahf */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- ir.addr -= 1;
- goto no_support;
- }
+ {
+ ir.addr -= 1;
+ goto no_support;
+ }
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
break;
}
if (ir.reg != 4)
{
- if (ir.mod == 3)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ if (ir.mod == 3)
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
if (i386_record_lea_modrm (&ir))
case 0x0fbb: /* btc */
ir.ot = ir.dflag + OT_WORD;
if (i386_record_modrm (&ir))
- return -1;
+ return -1;
if (ir.mod == 3)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
- {
- uint64_t addr64;
- if (i386_record_lea_modrm_addr (&ir, &addr64))
- return -1;
- regcache_raw_read_unsigned (ir.regcache,
- ir.regmap[ir.reg | rex_r],
- &addr);
- switch (ir.dflag)
- {
- case 0:
- addr64 += ((int16_t) addr >> 4) << 4;
- break;
- case 1:
- addr64 += ((int32_t) addr >> 5) << 5;
- break;
- case 2:
- addr64 += ((int64_t) addr >> 6) << 6;
- break;
- }
- if (record_full_arch_list_add_mem (addr64, 1 << ir.ot))
- return -1;
- if (i386_record_lea_modrm (&ir))
- return -1;
- }
+ {
+ uint64_t addr64;
+ if (i386_record_lea_modrm_addr (&ir, &addr64))
+ return -1;
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[ir.reg | rex_r],
+ &addr);
+ switch (ir.dflag)
+ {
+ case 0:
+ addr64 += ((int16_t) addr >> 4) << 4;
+ break;
+ case 1:
+ addr64 += ((int32_t) addr >> 5) << 5;
+ break;
+ case 2:
+ addr64 += ((int64_t) addr >> 6) << 6;
+ break;
+ }
+ if (record_full_arch_list_add_mem (addr64, 1 << ir.ot))
+ return -1;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xd4: /* aam */
case 0xd5: /* aad */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- ir.addr -= 1;
- goto no_support;
- }
+ {
+ ir.addr -= 1;
+ goto no_support;
+ }
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xd6: /* salc */
if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- ir.addr -= 1;
- goto no_support;
- }
+ {
+ ir.addr -= 1;
+ goto no_support;
+ }
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0f34: /* sysenter */
{
int ret;
- if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- ir.addr -= 2;
- goto no_support;
- }
+ if (ir.regmap[X86_RECORD_R8_REGNUM])
+ {
+ ir.addr -= 2;
+ goto no_support;
+ }
if (tdep->i386_sysenter_record == NULL)
{
printf_unfiltered (_("Process record does not support "
case 0x0f07: /* sysret */
printf_unfiltered (_("Process record does not support "
- "instruction sysret.\n"));
+ "instruction sysret.\n"));
ir.addr -= 2;
goto no_support;
break;
case 0: /* sldt */
case 1: /* str */
if (ir.mod == 3)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
ir.ot = OT_WORD;
break;
case 4: /* verr */
case 5: /* verw */
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
default:
ir.addr -= 3;
}
if (ir.override >= 0)
{
- if (record_full_memory_query)
- {
- if (yquery (_("\
+ if (record_full_memory_query)
+ {
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr)))
+ paddress (gdbarch, ir.orig_addr)))
return -1;
- }
+ }
}
else
{
if (record_full_arch_list_add_mem (addr64, 2))
return -1;
addr64 += 2;
- if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- if (record_full_arch_list_add_mem (addr64, 8))
+ if (ir.regmap[X86_RECORD_R8_REGNUM])
+ {
+ if (record_full_arch_list_add_mem (addr64, 8))
return -1;
- }
- else
- {
- if (record_full_arch_list_add_mem (addr64, 4))
+ }
+ else
+ {
+ if (record_full_arch_list_add_mem (addr64, 4))
return -1;
- }
+ }
}
}
break;
/* sidt */
if (ir.override >= 0)
{
- if (record_full_memory_query)
- {
- if (yquery (_("\
+ if (record_full_memory_query)
+ {
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr)))
- return -1;
- }
+ paddress (gdbarch, ir.orig_addr)))
+ return -1;
+ }
}
else
{
if (record_full_arch_list_add_mem (addr64, 2))
return -1;
addr64 += 2;
- if (ir.regmap[X86_RECORD_R8_REGNUM])
- {
- if (record_full_arch_list_add_mem (addr64, 8))
- return -1;
- }
- else
- {
- if (record_full_arch_list_add_mem (addr64, 4))
- return -1;
- }
+ if (ir.regmap[X86_RECORD_R8_REGNUM])
+ {
+ if (record_full_arch_list_add_mem (addr64, 8))
+ return -1;
+ }
+ else
+ {
+ if (record_full_arch_list_add_mem (addr64, 4))
+ return -1;
+ }
}
}
break;
else if (ir.rm == 1)
break;
}
+ /* Fall through. */
case 3: /* lidt */
if (ir.mod == 3)
{
if (ir.mod == 3)
{
if (ir.rm == 0 && ir.regmap[X86_RECORD_R8_REGNUM])
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM);
else
- {
- ir.addr -= 3;
- opcode = opcode << 8 | ir.modrm;
- goto no_support;
- }
+ {
+ ir.addr -= 3;
+ opcode = opcode << 8 | ir.modrm;
+ goto no_support;
+ }
}
else
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3 || ir.regmap[X86_RECORD_R8_REGNUM])
- {
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.regmap[X86_RECORD_R8_REGNUM]
+ {
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.regmap[X86_RECORD_R8_REGNUM]
? (ir.reg | rex_r) : ir.rm);
- }
+ }
else
- {
- ir.ot = ir.dflag ? OT_LONG : OT_WORD;
- if (i386_record_lea_modrm (&ir))
- return -1;
- }
+ {
+ ir.ot = ir.dflag ? OT_LONG : OT_WORD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
if (!ir.regmap[X86_RECORD_R8_REGNUM])
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0f02: /* lar */
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3 && ir.reg == 3)
- {
+ {
ir.addr -= 3;
opcode = opcode << 8 | ir.modrm;
goto no_support;
if (opcode & 2)
I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
else
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
break;
default:
ir.addr -= 3;
goto no_support;
}
if (opcode & 2)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
else
I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
break;
case 0x0f0e: /* 3DNow! femms */
case 0x0f77: /* emms */
if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
- goto no_support;
+ goto no_support;
record_full_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
break;
return -1;
ir.addr++;
switch (opcode8)
- {
- case 0x0c: /* 3DNow! pi2fw */
- case 0x0d: /* 3DNow! pi2fd */
- case 0x1c: /* 3DNow! pf2iw */
- case 0x1d: /* 3DNow! pf2id */
- case 0x8a: /* 3DNow! pfnacc */
- case 0x8e: /* 3DNow! pfpnacc */
- case 0x90: /* 3DNow! pfcmpge */
- case 0x94: /* 3DNow! pfmin */
- case 0x96: /* 3DNow! pfrcp */
- case 0x97: /* 3DNow! pfrsqrt */
- case 0x9a: /* 3DNow! pfsub */
- case 0x9e: /* 3DNow! pfadd */
- case 0xa0: /* 3DNow! pfcmpgt */
- case 0xa4: /* 3DNow! pfmax */
- case 0xa6: /* 3DNow! pfrcpit1 */
- case 0xa7: /* 3DNow! pfrsqit1 */
- case 0xaa: /* 3DNow! pfsubr */
- case 0xae: /* 3DNow! pfacc */
- case 0xb0: /* 3DNow! pfcmpeq */
- case 0xb4: /* 3DNow! pfmul */
- case 0xb6: /* 3DNow! pfrcpit2 */
- case 0xb7: /* 3DNow! pmulhrw */
- case 0xbb: /* 3DNow! pswapd */
- case 0xbf: /* 3DNow! pavgusb */
- if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
- goto no_support_3dnow_data;
- record_full_arch_list_add_reg (ir.regcache, ir.reg);
- break;
-
- default:
+ {
+ case 0x0c: /* 3DNow! pi2fw */
+ case 0x0d: /* 3DNow! pi2fd */
+ case 0x1c: /* 3DNow! pf2iw */
+ case 0x1d: /* 3DNow! pf2id */
+ case 0x8a: /* 3DNow! pfnacc */
+ case 0x8e: /* 3DNow! pfpnacc */
+ case 0x90: /* 3DNow! pfcmpge */
+ case 0x94: /* 3DNow! pfmin */
+ case 0x96: /* 3DNow! pfrcp */
+ case 0x97: /* 3DNow! pfrsqrt */
+ case 0x9a: /* 3DNow! pfsub */
+ case 0x9e: /* 3DNow! pfadd */
+ case 0xa0: /* 3DNow! pfcmpgt */
+ case 0xa4: /* 3DNow! pfmax */
+ case 0xa6: /* 3DNow! pfrcpit1 */
+ case 0xa7: /* 3DNow! pfrsqit1 */
+ case 0xaa: /* 3DNow! pfsubr */
+ case 0xae: /* 3DNow! pfacc */
+ case 0xb0: /* 3DNow! pfcmpeq */
+ case 0xb4: /* 3DNow! pfmul */
+ case 0xb6: /* 3DNow! pfrcpit2 */
+ case 0xb7: /* 3DNow! pmulhrw */
+ case 0xbb: /* 3DNow! pswapd */
+ case 0xbf: /* 3DNow! pavgusb */
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support_3dnow_data;
+ record_full_arch_list_add_reg (ir.regcache, ir.reg);
+ break;
+
+ default:
no_support_3dnow_data:
- opcode = (opcode << 8) | opcode8;
- goto no_support;
- break;
- }
+ opcode = (opcode << 8) | opcode8;
+ goto no_support;
+ break;
+ }
break;
case 0x0faa: /* rsm */
if (i386_record_modrm (&ir))
return -1;
switch(ir.reg)
- {
- case 0: /* fxsave */
- {
- uint64_t tmpu64;
+ {
+ case 0: /* fxsave */
+ {
+ uint64_t tmpu64;
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
if (i386_record_lea_modrm_addr (&ir, &tmpu64))
return -1;
- if (record_full_arch_list_add_mem (tmpu64, 512))
- return -1;
- }
- break;
+ if (record_full_arch_list_add_mem (tmpu64, 512))
+ return -1;
+ }
+ break;
- case 1: /* fxrstor */
- {
- int i;
+ case 1: /* fxrstor */
+ {
+ int i;
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
- for (i = I387_MM0_REGNUM (tdep);
- i386_mmx_regnum_p (gdbarch, i); i++)
- record_full_arch_list_add_reg (ir.regcache, i);
+ for (i = I387_MM0_REGNUM (tdep);
+ i386_mmx_regnum_p (gdbarch, i); i++)
+ record_full_arch_list_add_reg (ir.regcache, i);
- for (i = I387_XMM0_REGNUM (tdep);
- i386_xmm_regnum_p (gdbarch, i); i++)
- record_full_arch_list_add_reg (ir.regcache, i);
+ for (i = I387_XMM0_REGNUM (tdep);
+ i386_xmm_regnum_p (gdbarch, i); i++)
+ record_full_arch_list_add_reg (ir.regcache, i);
- if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
- record_full_arch_list_add_reg (ir.regcache,
+ if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ record_full_arch_list_add_reg (ir.regcache,
I387_MXCSR_REGNUM(tdep));
- for (i = I387_ST0_REGNUM (tdep);
- i386_fp_regnum_p (gdbarch, i); i++)
- record_full_arch_list_add_reg (ir.regcache, i);
-
- for (i = I387_FCTRL_REGNUM (tdep);
- i386_fpc_regnum_p (gdbarch, i); i++)
- record_full_arch_list_add_reg (ir.regcache, i);
- }
- break;
-
- case 2: /* ldmxcsr */
- if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
- break;
-
- case 3: /* stmxcsr */
- ir.ot = OT_LONG;
- if (i386_record_lea_modrm (&ir))
- return -1;
- break;
-
- case 5: /* lfence */
- case 6: /* mfence */
- case 7: /* sfence clflush */
- break;
-
- default:
- opcode = (opcode << 8) | ir.modrm;
- goto no_support;
- break;
- }
+ for (i = I387_ST0_REGNUM (tdep);
+ i386_fp_regnum_p (gdbarch, i); i++)
+ record_full_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_FCTRL_REGNUM (tdep);
+ i386_fpc_regnum_p (gdbarch, i); i++)
+ record_full_arch_list_add_reg (ir.regcache, i);
+ }
+ break;
+
+ case 2: /* ldmxcsr */
+ if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ break;
+
+ case 3: /* stmxcsr */
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ case 5: /* lfence */
+ case 6: /* mfence */
+ case 7: /* sfence clflush */
+ break;
+
+ default:
+ opcode = (opcode << 8) | ir.modrm;
+ goto no_support;
+ break;
+ }
break;
case 0x0fc3: /* movnti */
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
- goto no_support;
+ goto no_support;
ir.reg |= rex_r;
if (i386_record_lea_modrm (&ir))
- return -1;
+ return -1;
break;
/* Add prefix to opcode. */
case 0x0ffe:
/* Mask out PREFIX_ADDR. */
switch ((prefixes & ~PREFIX_ADDR))
- {
- case PREFIX_REPNZ:
- opcode |= 0xf20000;
- break;
- case PREFIX_DATA:
- opcode |= 0x660000;
- break;
- case PREFIX_REPZ:
- opcode |= 0xf30000;
- break;
- }
+ {
+ case PREFIX_REPNZ:
+ opcode |= 0xf20000;
+ break;
+ case PREFIX_DATA:
+ opcode |= 0x660000;
+ break;
+ case PREFIX_REPZ:
+ opcode |= 0xf30000;
+ break;
+ }
reswitch_prefix_add:
switch (opcode)
- {
- case 0x0f38:
- case 0x660f38:
- case 0xf20f38:
- case 0x0f3a:
- case 0x660f3a:
- if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
+ {
+ case 0x0f38:
+ case 0x660f38:
+ case 0xf20f38:
+ case 0x0f3a:
+ case 0x660f3a:
+ if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
return -1;
- ir.addr++;
- opcode = (uint32_t) opcode8 | opcode << 8;
- goto reswitch_prefix_add;
- break;
-
- case 0x0f10: /* movups */
- case 0x660f10: /* movupd */
- case 0xf30f10: /* movss */
- case 0xf20f10: /* movsd */
- case 0x0f12: /* movlps */
- case 0x660f12: /* movlpd */
- case 0xf30f12: /* movsldup */
- case 0xf20f12: /* movddup */
- case 0x0f14: /* unpcklps */
- case 0x660f14: /* unpcklpd */
- case 0x0f15: /* unpckhps */
- case 0x660f15: /* unpckhpd */
- case 0x0f16: /* movhps */
- case 0x660f16: /* movhpd */
- case 0xf30f16: /* movshdup */
- case 0x0f28: /* movaps */
- case 0x660f28: /* movapd */
- case 0x0f2a: /* cvtpi2ps */
- case 0x660f2a: /* cvtpi2pd */
- case 0xf30f2a: /* cvtsi2ss */
- case 0xf20f2a: /* cvtsi2sd */
- case 0x0f2c: /* cvttps2pi */
- case 0x660f2c: /* cvttpd2pi */
- case 0x0f2d: /* cvtps2pi */
- case 0x660f2d: /* cvtpd2pi */
- case 0x660f3800: /* pshufb */
- case 0x660f3801: /* phaddw */
- case 0x660f3802: /* phaddd */
- case 0x660f3803: /* phaddsw */
- case 0x660f3804: /* pmaddubsw */
- case 0x660f3805: /* phsubw */
- case 0x660f3806: /* phsubd */
- case 0x660f3807: /* phsubsw */
- case 0x660f3808: /* psignb */
- case 0x660f3809: /* psignw */
- case 0x660f380a: /* psignd */
- case 0x660f380b: /* pmulhrsw */
- case 0x660f3810: /* pblendvb */
- case 0x660f3814: /* blendvps */
- case 0x660f3815: /* blendvpd */
- case 0x660f381c: /* pabsb */
- case 0x660f381d: /* pabsw */
- case 0x660f381e: /* pabsd */
- case 0x660f3820: /* pmovsxbw */
- case 0x660f3821: /* pmovsxbd */
- case 0x660f3822: /* pmovsxbq */
- case 0x660f3823: /* pmovsxwd */
- case 0x660f3824: /* pmovsxwq */
- case 0x660f3825: /* pmovsxdq */
- case 0x660f3828: /* pmuldq */
- case 0x660f3829: /* pcmpeqq */
- case 0x660f382a: /* movntdqa */
- case 0x660f3a08: /* roundps */
- case 0x660f3a09: /* roundpd */
- case 0x660f3a0a: /* roundss */
- case 0x660f3a0b: /* roundsd */
- case 0x660f3a0c: /* blendps */
- case 0x660f3a0d: /* blendpd */
- case 0x660f3a0e: /* pblendw */
- case 0x660f3a0f: /* palignr */
- case 0x660f3a20: /* pinsrb */
- case 0x660f3a21: /* insertps */
- case 0x660f3a22: /* pinsrd pinsrq */
- case 0x660f3a40: /* dpps */
- case 0x660f3a41: /* dppd */
- case 0x660f3a42: /* mpsadbw */
- case 0x660f3a60: /* pcmpestrm */
- case 0x660f3a61: /* pcmpestri */
- case 0x660f3a62: /* pcmpistrm */
- case 0x660f3a63: /* pcmpistri */
- case 0x0f51: /* sqrtps */
- case 0x660f51: /* sqrtpd */
- case 0xf20f51: /* sqrtsd */
- case 0xf30f51: /* sqrtss */
- case 0x0f52: /* rsqrtps */
- case 0xf30f52: /* rsqrtss */
- case 0x0f53: /* rcpps */
- case 0xf30f53: /* rcpss */
- case 0x0f54: /* andps */
- case 0x660f54: /* andpd */
- case 0x0f55: /* andnps */
- case 0x660f55: /* andnpd */
- case 0x0f56: /* orps */
- case 0x660f56: /* orpd */
- case 0x0f57: /* xorps */
- case 0x660f57: /* xorpd */
- case 0x0f58: /* addps */
- case 0x660f58: /* addpd */
- case 0xf20f58: /* addsd */
- case 0xf30f58: /* addss */
- case 0x0f59: /* mulps */
- case 0x660f59: /* mulpd */
- case 0xf20f59: /* mulsd */
- case 0xf30f59: /* mulss */
- case 0x0f5a: /* cvtps2pd */
- case 0x660f5a: /* cvtpd2ps */
- case 0xf20f5a: /* cvtsd2ss */
- case 0xf30f5a: /* cvtss2sd */
- case 0x0f5b: /* cvtdq2ps */
- case 0x660f5b: /* cvtps2dq */
- case 0xf30f5b: /* cvttps2dq */
- case 0x0f5c: /* subps */
- case 0x660f5c: /* subpd */
- case 0xf20f5c: /* subsd */
- case 0xf30f5c: /* subss */
- case 0x0f5d: /* minps */
- case 0x660f5d: /* minpd */
- case 0xf20f5d: /* minsd */
- case 0xf30f5d: /* minss */
- case 0x0f5e: /* divps */
- case 0x660f5e: /* divpd */
- case 0xf20f5e: /* divsd */
- case 0xf30f5e: /* divss */
- case 0x0f5f: /* maxps */
- case 0x660f5f: /* maxpd */
- case 0xf20f5f: /* maxsd */
- case 0xf30f5f: /* maxss */
- case 0x660f60: /* punpcklbw */
- case 0x660f61: /* punpcklwd */
- case 0x660f62: /* punpckldq */
- case 0x660f63: /* packsswb */
- case 0x660f64: /* pcmpgtb */
- case 0x660f65: /* pcmpgtw */
- case 0x660f66: /* pcmpgtd */
- case 0x660f67: /* packuswb */
- case 0x660f68: /* punpckhbw */
- case 0x660f69: /* punpckhwd */
- case 0x660f6a: /* punpckhdq */
- case 0x660f6b: /* packssdw */
- case 0x660f6c: /* punpcklqdq */
- case 0x660f6d: /* punpckhqdq */
- case 0x660f6e: /* movd */
- case 0x660f6f: /* movdqa */
- case 0xf30f6f: /* movdqu */
- case 0x660f70: /* pshufd */
- case 0xf20f70: /* pshuflw */
- case 0xf30f70: /* pshufhw */
- case 0x660f74: /* pcmpeqb */
- case 0x660f75: /* pcmpeqw */
- case 0x660f76: /* pcmpeqd */
- case 0x660f7c: /* haddpd */
- case 0xf20f7c: /* haddps */
- case 0x660f7d: /* hsubpd */
- case 0xf20f7d: /* hsubps */
- case 0xf30f7e: /* movq */
- case 0x0fc2: /* cmpps */
- case 0x660fc2: /* cmppd */
- case 0xf20fc2: /* cmpsd */
- case 0xf30fc2: /* cmpss */
- case 0x660fc4: /* pinsrw */
- case 0x0fc6: /* shufps */
- case 0x660fc6: /* shufpd */
- case 0x660fd0: /* addsubpd */
- case 0xf20fd0: /* addsubps */
- case 0x660fd1: /* psrlw */
- case 0x660fd2: /* psrld */
- case 0x660fd3: /* psrlq */
- case 0x660fd4: /* paddq */
- case 0x660fd5: /* pmullw */
- case 0xf30fd6: /* movq2dq */
- case 0x660fd8: /* psubusb */
- case 0x660fd9: /* psubusw */
- case 0x660fda: /* pminub */
- case 0x660fdb: /* pand */
- case 0x660fdc: /* paddusb */
- case 0x660fdd: /* paddusw */
- case 0x660fde: /* pmaxub */
- case 0x660fdf: /* pandn */
- case 0x660fe0: /* pavgb */
- case 0x660fe1: /* psraw */
- case 0x660fe2: /* psrad */
- case 0x660fe3: /* pavgw */
- case 0x660fe4: /* pmulhuw */
- case 0x660fe5: /* pmulhw */
- case 0x660fe6: /* cvttpd2dq */
- case 0xf20fe6: /* cvtpd2dq */
- case 0xf30fe6: /* cvtdq2pd */
- case 0x660fe8: /* psubsb */
- case 0x660fe9: /* psubsw */
- case 0x660fea: /* pminsw */
- case 0x660feb: /* por */
- case 0x660fec: /* paddsb */
- case 0x660fed: /* paddsw */
- case 0x660fee: /* pmaxsw */
- case 0x660fef: /* pxor */
- case 0xf20ff0: /* lddqu */
- case 0x660ff1: /* psllw */
- case 0x660ff2: /* pslld */
- case 0x660ff3: /* psllq */
- case 0x660ff4: /* pmuludq */
- case 0x660ff5: /* pmaddwd */
- case 0x660ff6: /* psadbw */
- case 0x660ff8: /* psubb */
- case 0x660ff9: /* psubw */
- case 0x660ffa: /* psubd */
- case 0x660ffb: /* psubq */
- case 0x660ffc: /* paddb */
- case 0x660ffd: /* paddw */
- case 0x660ffe: /* paddd */
- if (i386_record_modrm (&ir))
+ ir.addr++;
+ opcode = (uint32_t) opcode8 | opcode << 8;
+ goto reswitch_prefix_add;
+ break;
+
+ case 0x0f10: /* movups */
+ case 0x660f10: /* movupd */
+ case 0xf30f10: /* movss */
+ case 0xf20f10: /* movsd */
+ case 0x0f12: /* movlps */
+ case 0x660f12: /* movlpd */
+ case 0xf30f12: /* movsldup */
+ case 0xf20f12: /* movddup */
+ case 0x0f14: /* unpcklps */
+ case 0x660f14: /* unpcklpd */
+ case 0x0f15: /* unpckhps */
+ case 0x660f15: /* unpckhpd */
+ case 0x0f16: /* movhps */
+ case 0x660f16: /* movhpd */
+ case 0xf30f16: /* movshdup */
+ case 0x0f28: /* movaps */
+ case 0x660f28: /* movapd */
+ case 0x0f2a: /* cvtpi2ps */
+ case 0x660f2a: /* cvtpi2pd */
+ case 0xf30f2a: /* cvtsi2ss */
+ case 0xf20f2a: /* cvtsi2sd */
+ case 0x0f2c: /* cvttps2pi */
+ case 0x660f2c: /* cvttpd2pi */
+ case 0x0f2d: /* cvtps2pi */
+ case 0x660f2d: /* cvtpd2pi */
+ case 0x660f3800: /* pshufb */
+ case 0x660f3801: /* phaddw */
+ case 0x660f3802: /* phaddd */
+ case 0x660f3803: /* phaddsw */
+ case 0x660f3804: /* pmaddubsw */
+ case 0x660f3805: /* phsubw */
+ case 0x660f3806: /* phsubd */
+ case 0x660f3807: /* phsubsw */
+ case 0x660f3808: /* psignb */
+ case 0x660f3809: /* psignw */
+ case 0x660f380a: /* psignd */
+ case 0x660f380b: /* pmulhrsw */
+ case 0x660f3810: /* pblendvb */
+ case 0x660f3814: /* blendvps */
+ case 0x660f3815: /* blendvpd */
+ case 0x660f381c: /* pabsb */
+ case 0x660f381d: /* pabsw */
+ case 0x660f381e: /* pabsd */
+ case 0x660f3820: /* pmovsxbw */
+ case 0x660f3821: /* pmovsxbd */
+ case 0x660f3822: /* pmovsxbq */
+ case 0x660f3823: /* pmovsxwd */
+ case 0x660f3824: /* pmovsxwq */
+ case 0x660f3825: /* pmovsxdq */
+ case 0x660f3828: /* pmuldq */
+ case 0x660f3829: /* pcmpeqq */
+ case 0x660f382a: /* movntdqa */
+ case 0x660f3a08: /* roundps */
+ case 0x660f3a09: /* roundpd */
+ case 0x660f3a0a: /* roundss */
+ case 0x660f3a0b: /* roundsd */
+ case 0x660f3a0c: /* blendps */
+ case 0x660f3a0d: /* blendpd */
+ case 0x660f3a0e: /* pblendw */
+ case 0x660f3a0f: /* palignr */
+ case 0x660f3a20: /* pinsrb */
+ case 0x660f3a21: /* insertps */
+ case 0x660f3a22: /* pinsrd pinsrq */
+ case 0x660f3a40: /* dpps */
+ case 0x660f3a41: /* dppd */
+ case 0x660f3a42: /* mpsadbw */
+ case 0x660f3a60: /* pcmpestrm */
+ case 0x660f3a61: /* pcmpestri */
+ case 0x660f3a62: /* pcmpistrm */
+ case 0x660f3a63: /* pcmpistri */
+ case 0x0f51: /* sqrtps */
+ case 0x660f51: /* sqrtpd */
+ case 0xf20f51: /* sqrtsd */
+ case 0xf30f51: /* sqrtss */
+ case 0x0f52: /* rsqrtps */
+ case 0xf30f52: /* rsqrtss */
+ case 0x0f53: /* rcpps */
+ case 0xf30f53: /* rcpss */
+ case 0x0f54: /* andps */
+ case 0x660f54: /* andpd */
+ case 0x0f55: /* andnps */
+ case 0x660f55: /* andnpd */
+ case 0x0f56: /* orps */
+ case 0x660f56: /* orpd */
+ case 0x0f57: /* xorps */
+ case 0x660f57: /* xorpd */
+ case 0x0f58: /* addps */
+ case 0x660f58: /* addpd */
+ case 0xf20f58: /* addsd */
+ case 0xf30f58: /* addss */
+ case 0x0f59: /* mulps */
+ case 0x660f59: /* mulpd */
+ case 0xf20f59: /* mulsd */
+ case 0xf30f59: /* mulss */
+ case 0x0f5a: /* cvtps2pd */
+ case 0x660f5a: /* cvtpd2ps */
+ case 0xf20f5a: /* cvtsd2ss */
+ case 0xf30f5a: /* cvtss2sd */
+ case 0x0f5b: /* cvtdq2ps */
+ case 0x660f5b: /* cvtps2dq */
+ case 0xf30f5b: /* cvttps2dq */
+ case 0x0f5c: /* subps */
+ case 0x660f5c: /* subpd */
+ case 0xf20f5c: /* subsd */
+ case 0xf30f5c: /* subss */
+ case 0x0f5d: /* minps */
+ case 0x660f5d: /* minpd */
+ case 0xf20f5d: /* minsd */
+ case 0xf30f5d: /* minss */
+ case 0x0f5e: /* divps */
+ case 0x660f5e: /* divpd */
+ case 0xf20f5e: /* divsd */
+ case 0xf30f5e: /* divss */
+ case 0x0f5f: /* maxps */
+ case 0x660f5f: /* maxpd */
+ case 0xf20f5f: /* maxsd */
+ case 0xf30f5f: /* maxss */
+ case 0x660f60: /* punpcklbw */
+ case 0x660f61: /* punpcklwd */
+ case 0x660f62: /* punpckldq */
+ case 0x660f63: /* packsswb */
+ case 0x660f64: /* pcmpgtb */
+ case 0x660f65: /* pcmpgtw */
+ case 0x660f66: /* pcmpgtd */
+ case 0x660f67: /* packuswb */
+ case 0x660f68: /* punpckhbw */
+ case 0x660f69: /* punpckhwd */
+ case 0x660f6a: /* punpckhdq */
+ case 0x660f6b: /* packssdw */
+ case 0x660f6c: /* punpcklqdq */
+ case 0x660f6d: /* punpckhqdq */
+ case 0x660f6e: /* movd */
+ case 0x660f6f: /* movdqa */
+ case 0xf30f6f: /* movdqu */
+ case 0x660f70: /* pshufd */
+ case 0xf20f70: /* pshuflw */
+ case 0xf30f70: /* pshufhw */
+ case 0x660f74: /* pcmpeqb */
+ case 0x660f75: /* pcmpeqw */
+ case 0x660f76: /* pcmpeqd */
+ case 0x660f7c: /* haddpd */
+ case 0xf20f7c: /* haddps */
+ case 0x660f7d: /* hsubpd */
+ case 0xf20f7d: /* hsubps */
+ case 0xf30f7e: /* movq */
+ case 0x0fc2: /* cmpps */
+ case 0x660fc2: /* cmppd */
+ case 0xf20fc2: /* cmpsd */
+ case 0xf30fc2: /* cmpss */
+ case 0x660fc4: /* pinsrw */
+ case 0x0fc6: /* shufps */
+ case 0x660fc6: /* shufpd */
+ case 0x660fd0: /* addsubpd */
+ case 0xf20fd0: /* addsubps */
+ case 0x660fd1: /* psrlw */
+ case 0x660fd2: /* psrld */
+ case 0x660fd3: /* psrlq */
+ case 0x660fd4: /* paddq */
+ case 0x660fd5: /* pmullw */
+ case 0xf30fd6: /* movq2dq */
+ case 0x660fd8: /* psubusb */
+ case 0x660fd9: /* psubusw */
+ case 0x660fda: /* pminub */
+ case 0x660fdb: /* pand */
+ case 0x660fdc: /* paddusb */
+ case 0x660fdd: /* paddusw */
+ case 0x660fde: /* pmaxub */
+ case 0x660fdf: /* pandn */
+ case 0x660fe0: /* pavgb */
+ case 0x660fe1: /* psraw */
+ case 0x660fe2: /* psrad */
+ case 0x660fe3: /* pavgw */
+ case 0x660fe4: /* pmulhuw */
+ case 0x660fe5: /* pmulhw */
+ case 0x660fe6: /* cvttpd2dq */
+ case 0xf20fe6: /* cvtpd2dq */
+ case 0xf30fe6: /* cvtdq2pd */
+ case 0x660fe8: /* psubsb */
+ case 0x660fe9: /* psubsw */
+ case 0x660fea: /* pminsw */
+ case 0x660feb: /* por */
+ case 0x660fec: /* paddsb */
+ case 0x660fed: /* paddsw */
+ case 0x660fee: /* pmaxsw */
+ case 0x660fef: /* pxor */
+ case 0xf20ff0: /* lddqu */
+ case 0x660ff1: /* psllw */
+ case 0x660ff2: /* pslld */
+ case 0x660ff3: /* psllq */
+ case 0x660ff4: /* pmuludq */
+ case 0x660ff5: /* pmaddwd */
+ case 0x660ff6: /* psadbw */
+ case 0x660ff8: /* psubb */
+ case 0x660ff9: /* psubw */
+ case 0x660ffa: /* psubd */
+ case 0x660ffb: /* psubq */
+ case 0x660ffc: /* paddb */
+ case 0x660ffd: /* paddw */
+ case 0x660ffe: /* paddd */
+ if (i386_record_modrm (&ir))
return -1;
- ir.reg |= rex_r;
- if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache,
+ ir.reg |= rex_r;
+ if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache,
I387_XMM0_REGNUM (tdep) + ir.reg);
- if ((opcode & 0xfffffffc) == 0x660f3a60)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
- break;
-
- case 0x0f11: /* movups */
- case 0x660f11: /* movupd */
- case 0xf30f11: /* movss */
- case 0xf20f11: /* movsd */
- case 0x0f13: /* movlps */
- case 0x660f13: /* movlpd */
- case 0x0f17: /* movhps */
- case 0x660f17: /* movhpd */
- case 0x0f29: /* movaps */
- case 0x660f29: /* movapd */
- case 0x660f3a14: /* pextrb */
- case 0x660f3a15: /* pextrw */
- case 0x660f3a16: /* pextrd pextrq */
- case 0x660f3a17: /* extractps */
- case 0x660f7f: /* movdqa */
- case 0xf30f7f: /* movdqu */
- if (i386_record_modrm (&ir))
+ if ((opcode & 0xfffffffc) == 0x660f3a60)
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x0f11: /* movups */
+ case 0x660f11: /* movupd */
+ case 0xf30f11: /* movss */
+ case 0xf20f11: /* movsd */
+ case 0x0f13: /* movlps */
+ case 0x660f13: /* movlpd */
+ case 0x0f17: /* movhps */
+ case 0x660f17: /* movhpd */
+ case 0x0f29: /* movaps */
+ case 0x660f29: /* movapd */
+ case 0x660f3a14: /* pextrb */
+ case 0x660f3a15: /* pextrw */
+ case 0x660f3a16: /* pextrd pextrq */
+ case 0x660f3a17: /* extractps */
+ case 0x660f7f: /* movdqa */
+ case 0xf30f7f: /* movdqu */
+ if (i386_record_modrm (&ir))
return -1;
- if (ir.mod == 3)
- {
- if (opcode == 0x0f13 || opcode == 0x660f13
- || opcode == 0x0f17 || opcode == 0x660f17)
- goto no_support;
- ir.rm |= ir.rex_b;
- if (!i386_xmm_regnum_p (gdbarch,
+ if (ir.mod == 3)
+ {
+ if (opcode == 0x0f13 || opcode == 0x660f13
+ || opcode == 0x0f17 || opcode == 0x660f17)
+ goto no_support;
+ ir.rm |= ir.rex_b;
+ if (!i386_xmm_regnum_p (gdbarch,
I387_XMM0_REGNUM (tdep) + ir.rm))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache,
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache,
I387_XMM0_REGNUM (tdep) + ir.rm);
- }
- else
- {
- switch (opcode)
- {
- case 0x660f3a14:
- ir.ot = OT_BYTE;
- break;
- case 0x660f3a15:
- ir.ot = OT_WORD;
- break;
- case 0x660f3a16:
- ir.ot = OT_LONG;
- break;
- case 0x660f3a17:
- ir.ot = OT_QUAD;
- break;
- default:
- ir.ot = OT_DQUAD;
- break;
- }
- if (i386_record_lea_modrm (&ir))
- return -1;
- }
- break;
-
- case 0x0f2b: /* movntps */
- case 0x660f2b: /* movntpd */
- case 0x0fe7: /* movntq */
- case 0x660fe7: /* movntdq */
- if (ir.mod == 3)
- goto no_support;
- if (opcode == 0x0fe7)
- ir.ot = OT_QUAD;
- else
- ir.ot = OT_DQUAD;
- if (i386_record_lea_modrm (&ir))
- return -1;
- break;
-
- case 0xf30f2c: /* cvttss2si */
- case 0xf20f2c: /* cvttsd2si */
- case 0xf30f2d: /* cvtss2si */
- case 0xf20f2d: /* cvtsd2si */
- case 0xf20f38f0: /* crc32 */
- case 0xf20f38f1: /* crc32 */
- case 0x0f50: /* movmskps */
- case 0x660f50: /* movmskpd */
- case 0x0fc5: /* pextrw */
- case 0x660fc5: /* pextrw */
- case 0x0fd7: /* pmovmskb */
- case 0x660fd7: /* pmovmskb */
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r);
- break;
-
- case 0x0f3800: /* pshufb */
- case 0x0f3801: /* phaddw */
- case 0x0f3802: /* phaddd */
- case 0x0f3803: /* phaddsw */
- case 0x0f3804: /* pmaddubsw */
- case 0x0f3805: /* phsubw */
- case 0x0f3806: /* phsubd */
- case 0x0f3807: /* phsubsw */
- case 0x0f3808: /* psignb */
- case 0x0f3809: /* psignw */
- case 0x0f380a: /* psignd */
- case 0x0f380b: /* pmulhrsw */
- case 0x0f381c: /* pabsb */
- case 0x0f381d: /* pabsw */
- case 0x0f381e: /* pabsd */
- case 0x0f382b: /* packusdw */
- case 0x0f3830: /* pmovzxbw */
- case 0x0f3831: /* pmovzxbd */
- case 0x0f3832: /* pmovzxbq */
- case 0x0f3833: /* pmovzxwd */
- case 0x0f3834: /* pmovzxwq */
- case 0x0f3835: /* pmovzxdq */
- case 0x0f3837: /* pcmpgtq */
- case 0x0f3838: /* pminsb */
- case 0x0f3839: /* pminsd */
- case 0x0f383a: /* pminuw */
- case 0x0f383b: /* pminud */
- case 0x0f383c: /* pmaxsb */
- case 0x0f383d: /* pmaxsd */
- case 0x0f383e: /* pmaxuw */
- case 0x0f383f: /* pmaxud */
- case 0x0f3840: /* pmulld */
- case 0x0f3841: /* phminposuw */
- case 0x0f3a0f: /* palignr */
- case 0x0f60: /* punpcklbw */
- case 0x0f61: /* punpcklwd */
- case 0x0f62: /* punpckldq */
- case 0x0f63: /* packsswb */
- case 0x0f64: /* pcmpgtb */
- case 0x0f65: /* pcmpgtw */
- case 0x0f66: /* pcmpgtd */
- case 0x0f67: /* packuswb */
- case 0x0f68: /* punpckhbw */
- case 0x0f69: /* punpckhwd */
- case 0x0f6a: /* punpckhdq */
- case 0x0f6b: /* packssdw */
- case 0x0f6e: /* movd */
- case 0x0f6f: /* movq */
- case 0x0f70: /* pshufw */
- case 0x0f74: /* pcmpeqb */
- case 0x0f75: /* pcmpeqw */
- case 0x0f76: /* pcmpeqd */
- case 0x0fc4: /* pinsrw */
- case 0x0fd1: /* psrlw */
- case 0x0fd2: /* psrld */
- case 0x0fd3: /* psrlq */
- case 0x0fd4: /* paddq */
- case 0x0fd5: /* pmullw */
- case 0xf20fd6: /* movdq2q */
- case 0x0fd8: /* psubusb */
- case 0x0fd9: /* psubusw */
- case 0x0fda: /* pminub */
- case 0x0fdb: /* pand */
- case 0x0fdc: /* paddusb */
- case 0x0fdd: /* paddusw */
- case 0x0fde: /* pmaxub */
- case 0x0fdf: /* pandn */
- case 0x0fe0: /* pavgb */
- case 0x0fe1: /* psraw */
- case 0x0fe2: /* psrad */
- case 0x0fe3: /* pavgw */
- case 0x0fe4: /* pmulhuw */
- case 0x0fe5: /* pmulhw */
- case 0x0fe8: /* psubsb */
- case 0x0fe9: /* psubsw */
- case 0x0fea: /* pminsw */
- case 0x0feb: /* por */
- case 0x0fec: /* paddsb */
- case 0x0fed: /* paddsw */
- case 0x0fee: /* pmaxsw */
- case 0x0fef: /* pxor */
- case 0x0ff1: /* psllw */
- case 0x0ff2: /* pslld */
- case 0x0ff3: /* psllq */
- case 0x0ff4: /* pmuludq */
- case 0x0ff5: /* pmaddwd */
- case 0x0ff6: /* psadbw */
- case 0x0ff8: /* psubb */
- case 0x0ff9: /* psubw */
- case 0x0ffa: /* psubd */
- case 0x0ffb: /* psubq */
- case 0x0ffc: /* paddb */
- case 0x0ffd: /* paddw */
- case 0x0ffe: /* paddd */
- if (i386_record_modrm (&ir))
+ }
+ else
+ {
+ switch (opcode)
+ {
+ case 0x660f3a14:
+ ir.ot = OT_BYTE;
+ break;
+ case 0x660f3a15:
+ ir.ot = OT_WORD;
+ break;
+ case 0x660f3a16:
+ ir.ot = OT_LONG;
+ break;
+ case 0x660f3a17:
+ ir.ot = OT_QUAD;
+ break;
+ default:
+ ir.ot = OT_DQUAD;
+ break;
+ }
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x0f2b: /* movntps */
+ case 0x660f2b: /* movntpd */
+ case 0x0fe7: /* movntq */
+ case 0x660fe7: /* movntdq */
+ if (ir.mod == 3)
+ goto no_support;
+ if (opcode == 0x0fe7)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_DQUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ case 0xf30f2c: /* cvttss2si */
+ case 0xf20f2c: /* cvttsd2si */
+ case 0xf30f2d: /* cvtss2si */
+ case 0xf20f2d: /* cvtsd2si */
+ case 0xf20f38f0: /* crc32 */
+ case 0xf20f38f1: /* crc32 */
+ case 0x0f50: /* movmskps */
+ case 0x660f50: /* movmskpd */
+ case 0x0fc5: /* pextrw */
+ case 0x660fc5: /* pextrw */
+ case 0x0fd7: /* pmovmskb */
+ case 0x660fd7: /* pmovmskb */
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ break;
+
+ case 0x0f3800: /* pshufb */
+ case 0x0f3801: /* phaddw */
+ case 0x0f3802: /* phaddd */
+ case 0x0f3803: /* phaddsw */
+ case 0x0f3804: /* pmaddubsw */
+ case 0x0f3805: /* phsubw */
+ case 0x0f3806: /* phsubd */
+ case 0x0f3807: /* phsubsw */
+ case 0x0f3808: /* psignb */
+ case 0x0f3809: /* psignw */
+ case 0x0f380a: /* psignd */
+ case 0x0f380b: /* pmulhrsw */
+ case 0x0f381c: /* pabsb */
+ case 0x0f381d: /* pabsw */
+ case 0x0f381e: /* pabsd */
+ case 0x0f382b: /* packusdw */
+ case 0x0f3830: /* pmovzxbw */
+ case 0x0f3831: /* pmovzxbd */
+ case 0x0f3832: /* pmovzxbq */
+ case 0x0f3833: /* pmovzxwd */
+ case 0x0f3834: /* pmovzxwq */
+ case 0x0f3835: /* pmovzxdq */
+ case 0x0f3837: /* pcmpgtq */
+ case 0x0f3838: /* pminsb */
+ case 0x0f3839: /* pminsd */
+ case 0x0f383a: /* pminuw */
+ case 0x0f383b: /* pminud */
+ case 0x0f383c: /* pmaxsb */
+ case 0x0f383d: /* pmaxsd */
+ case 0x0f383e: /* pmaxuw */
+ case 0x0f383f: /* pmaxud */
+ case 0x0f3840: /* pmulld */
+ case 0x0f3841: /* phminposuw */
+ case 0x0f3a0f: /* palignr */
+ case 0x0f60: /* punpcklbw */
+ case 0x0f61: /* punpcklwd */
+ case 0x0f62: /* punpckldq */
+ case 0x0f63: /* packsswb */
+ case 0x0f64: /* pcmpgtb */
+ case 0x0f65: /* pcmpgtw */
+ case 0x0f66: /* pcmpgtd */
+ case 0x0f67: /* packuswb */
+ case 0x0f68: /* punpckhbw */
+ case 0x0f69: /* punpckhwd */
+ case 0x0f6a: /* punpckhdq */
+ case 0x0f6b: /* packssdw */
+ case 0x0f6e: /* movd */
+ case 0x0f6f: /* movq */
+ case 0x0f70: /* pshufw */
+ case 0x0f74: /* pcmpeqb */
+ case 0x0f75: /* pcmpeqw */
+ case 0x0f76: /* pcmpeqd */
+ case 0x0fc4: /* pinsrw */
+ case 0x0fd1: /* psrlw */
+ case 0x0fd2: /* psrld */
+ case 0x0fd3: /* psrlq */
+ case 0x0fd4: /* paddq */
+ case 0x0fd5: /* pmullw */
+ case 0xf20fd6: /* movdq2q */
+ case 0x0fd8: /* psubusb */
+ case 0x0fd9: /* psubusw */
+ case 0x0fda: /* pminub */
+ case 0x0fdb: /* pand */
+ case 0x0fdc: /* paddusb */
+ case 0x0fdd: /* paddusw */
+ case 0x0fde: /* pmaxub */
+ case 0x0fdf: /* pandn */
+ case 0x0fe0: /* pavgb */
+ case 0x0fe1: /* psraw */
+ case 0x0fe2: /* psrad */
+ case 0x0fe3: /* pavgw */
+ case 0x0fe4: /* pmulhuw */
+ case 0x0fe5: /* pmulhw */
+ case 0x0fe8: /* psubsb */
+ case 0x0fe9: /* psubsw */
+ case 0x0fea: /* pminsw */
+ case 0x0feb: /* por */
+ case 0x0fec: /* paddsb */
+ case 0x0fed: /* paddsw */
+ case 0x0fee: /* pmaxsw */
+ case 0x0fef: /* pxor */
+ case 0x0ff1: /* psllw */
+ case 0x0ff2: /* pslld */
+ case 0x0ff3: /* psllq */
+ case 0x0ff4: /* pmuludq */
+ case 0x0ff5: /* pmaddwd */
+ case 0x0ff6: /* psadbw */
+ case 0x0ff8: /* psubb */
+ case 0x0ff9: /* psubw */
+ case 0x0ffa: /* psubd */
+ case 0x0ffb: /* psubq */
+ case 0x0ffc: /* paddb */
+ case 0x0ffd: /* paddw */
+ case 0x0ffe: /* paddd */
+ if (i386_record_modrm (&ir))
return -1;
- if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache,
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache,
I387_MM0_REGNUM (tdep) + ir.reg);
- break;
+ break;
- case 0x0f71: /* psllw */
- case 0x0f72: /* pslld */
- case 0x0f73: /* psllq */
- if (i386_record_modrm (&ir))
+ case 0x0f71: /* psllw */
+ case 0x0f72: /* pslld */
+ case 0x0f73: /* psllq */
+ if (i386_record_modrm (&ir))
return -1;
- if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache,
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache,
I387_MM0_REGNUM (tdep) + ir.rm);
- break;
+ break;
- case 0x660f71: /* psllw */
- case 0x660f72: /* pslld */
- case 0x660f73: /* psllq */
- if (i386_record_modrm (&ir))
+ case 0x660f71: /* psllw */
+ case 0x660f72: /* pslld */
+ case 0x660f73: /* psllq */
+ if (i386_record_modrm (&ir))
return -1;
- ir.rm |= ir.rex_b;
- if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache,
+ ir.rm |= ir.rex_b;
+ if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache,
I387_XMM0_REGNUM (tdep) + ir.rm);
- break;
+ break;
- case 0x0f7e: /* movd */
- case 0x660f7e: /* movd */
- if (i386_record_modrm (&ir))
+ case 0x0f7e: /* movd */
+ case 0x660f7e: /* movd */
+ if (i386_record_modrm (&ir))
return -1;
- if (ir.mod == 3)
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
- else
- {
- if (ir.dflag == 2)
- ir.ot = OT_QUAD;
- else
- ir.ot = OT_LONG;
- if (i386_record_lea_modrm (&ir))
- return -1;
- }
- break;
-
- case 0x0f7f: /* movq */
- if (i386_record_modrm (&ir))
+ if (ir.mod == 3)
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ else
+ {
+ if (ir.dflag == 2)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x0f7f: /* movq */
+ if (i386_record_modrm (&ir))
return -1;
- if (ir.mod == 3)
- {
- if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache,
+ if (ir.mod == 3)
+ {
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache,
I387_MM0_REGNUM (tdep) + ir.rm);
- }
- else
- {
- ir.ot = OT_QUAD;
- if (i386_record_lea_modrm (&ir))
- return -1;
- }
- break;
-
- case 0xf30fb8: /* popcnt */
- if (i386_record_modrm (&ir))
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0xf30fb8: /* popcnt */
+ if (i386_record_modrm (&ir))
return -1;
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
- break;
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
- case 0x660fd6: /* movq */
- if (i386_record_modrm (&ir))
+ case 0x660fd6: /* movq */
+ if (i386_record_modrm (&ir))
return -1;
- if (ir.mod == 3)
- {
- ir.rm |= ir.rex_b;
- if (!i386_xmm_regnum_p (gdbarch,
+ if (ir.mod == 3)
+ {
+ ir.rm |= ir.rex_b;
+ if (!i386_xmm_regnum_p (gdbarch,
I387_XMM0_REGNUM (tdep) + ir.rm))
- goto no_support;
- record_full_arch_list_add_reg (ir.regcache,
+ goto no_support;
+ record_full_arch_list_add_reg (ir.regcache,
I387_XMM0_REGNUM (tdep) + ir.rm);
- }
- else
- {
- ir.ot = OT_QUAD;
- if (i386_record_lea_modrm (&ir))
- return -1;
- }
- break;
-
- case 0x660f3817: /* ptest */
- case 0x0f2e: /* ucomiss */
- case 0x660f2e: /* ucomisd */
- case 0x0f2f: /* comiss */
- case 0x660f2f: /* comisd */
- I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
- break;
-
- case 0x0ff7: /* maskmovq */
- regcache_raw_read_unsigned (ir.regcache,
- ir.regmap[X86_RECORD_REDI_REGNUM],
- &addr);
- if (record_full_arch_list_add_mem (addr, 64))
- return -1;
- break;
-
- case 0x660ff7: /* maskmovdqu */
- regcache_raw_read_unsigned (ir.regcache,
- ir.regmap[X86_RECORD_REDI_REGNUM],
- &addr);
- if (record_full_arch_list_add_mem (addr, 128))
- return -1;
- break;
-
- default:
- goto no_support;
- break;
- }
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x660f3817: /* ptest */
+ case 0x0f2e: /* ucomiss */
+ case 0x660f2e: /* ucomisd */
+ case 0x0f2f: /* comiss */
+ case 0x660f2f: /* comisd */
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x0ff7: /* maskmovq */
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &addr);
+ if (record_full_arch_list_add_mem (addr, 64))
+ return -1;
+ break;
+
+ case 0x660ff7: /* maskmovdqu */
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &addr);
+ if (record_full_arch_list_add_mem (addr, 128))
+ return -1;
+ break;
+
+ default:
+ goto no_support;
+ break;
+ }
break;
default:
no_support:
printf_unfiltered (_("Process record does not support instruction 0x%02x "
- "at address %s.\n"),
- (unsigned int) (opcode),
- paddress (gdbarch, ir.orig_addr));
+ "at address %s.\n"),
+ (unsigned int) (opcode),
+ paddress (gdbarch, ir.orig_addr));
return -1;
}
static int
i386_fast_tracepoint_valid_at (struct gdbarch *gdbarch, CORE_ADDR addr,
- char **msg)
+ std::string *msg)
{
int len, jumplen;
- static struct ui_file *gdb_null = NULL;
/* Ask the target for the minimum instruction length supported. */
jumplen = target_get_min_fast_tracepoint_insn_len ();
jumplen = (register_size (gdbarch, 0) == 8) ? 5 : 4;
}
- /* Dummy file descriptor for the disassembler. */
- if (!gdb_null)
- gdb_null = ui_file_new ();
-
/* Check for fit. */
- len = gdb_print_insn (gdbarch, addr, gdb_null, NULL);
+ len = gdb_insn_length (gdbarch, addr);
if (len < jumplen)
{
/* Return a bit of target-specific detail to add to the caller's
generic failure message. */
if (msg)
- *msg = xstrprintf (_("; instruction is only %d bytes long, "
- "need at least %d bytes for the jump"),
- len, jumplen);
+ *msg = string_printf (_("; instruction is only %d bytes long, "
+ "need at least %d bytes for the jump"),
+ len, jumplen);
return 0;
}
else
{
if (msg)
- *msg = NULL;
+ msg->clear ();
return 1;
}
}
+/* Return a floating-point format for a floating-point variable of
+ length LEN in bits. If non-NULL, NAME is the name of its type.
+ If no suitable type is found, return NULL. */
+
+static const struct floatformat **
+i386_floatformat_for_type (struct gdbarch *gdbarch,
+ const char *name, int len)
+{
+ if (len == 128 && name)
+ if (strcmp (name, "__float128") == 0
+ || strcmp (name, "_Float128") == 0
+ || strcmp (name, "complex _Float128") == 0
+ || strcmp (name, "complex(kind=16)") == 0
+ || strcmp (name, "quad complex") == 0
+ || strcmp (name, "real(kind=16)") == 0
+ || strcmp (name, "real*16") == 0)
+ return floatformats_ia64_quad;
+
+ return default_floatformat_for_type (gdbarch, name, len);
+}
+
static int
i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
struct tdesc_arch_data *tdesc_data)
const struct tdesc_feature *feature_core;
const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
- *feature_avx512;
+ *feature_avx512, *feature_pkeys, *feature_segments;
int i, num_regs, valid_p;
if (! tdesc_has_registers (tdesc))
/* Try AVX512 registers. */
feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
+ /* Try segment base registers. */
+ feature_segments = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments");
+
+ /* Try PKEYS */
+ feature_pkeys = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys");
+
valid_p = 1;
/* The XCR0 bits. */
if (!feature_avx)
return 0;
- tdep->xcr0 = X86_XSTATE_MPX_AVX512_MASK;
+ tdep->xcr0 = X86_XSTATE_AVX_AVX512_MASK;
/* It may have been set by OSABI initialization function. */
if (tdep->k0_regnum < 0)
tdep->mpx_register_names[i]);
}
+ if (feature_segments)
+ {
+ if (tdep->fsbase_regnum < 0)
+ tdep->fsbase_regnum = I386_FSBASE_REGNUM;
+ valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
+ tdep->fsbase_regnum, "fs_base");
+ valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
+ tdep->fsbase_regnum + 1, "gs_base");
+ }
+
+ if (feature_pkeys)
+ {
+ tdep->xcr0 |= X86_XSTATE_PKRU;
+ if (tdep->pkru_regnum < 0)
+ {
+ tdep->pkeys_register_names = i386_pkeys_names;
+ tdep->pkru_regnum = I386_PKRU_REGNUM;
+ tdep->num_pkeys_regs = 1;
+ }
+
+ for (i = 0; i < I387_NUM_PKEYS_REGS; i++)
+ valid_p &= tdesc_numbered_register (feature_pkeys, tdesc_data,
+ I387_PKRU_REGNUM (tdep) + i,
+ tdep->pkeys_register_names[i]);
+ }
+
return valid_p;
}
\f
+
+/* Implement the type_align gdbarch function. */
+
+static ULONGEST
+i386_type_align (struct gdbarch *gdbarch, struct type *type)
+{
+ type = check_typedef (type);
+
+ if (gdbarch_ptr_bit (gdbarch) == 32)
+ {
+ if ((type->code () == TYPE_CODE_INT
+ || type->code () == TYPE_CODE_FLT)
+ && TYPE_LENGTH (type) > 4)
+ return 4;
+
+ /* Handle x86's funny long double. */
+ if (type->code () == TYPE_CODE_FLT
+ && gdbarch_long_double_bit (gdbarch) == TYPE_LENGTH (type) * 8)
+ return 4;
+ }
+
+ return 0;
+}
+
+\f
+/* Note: This is called for both i386 and amd64. */
+
static struct gdbarch *
i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
struct gdbarch_tdep *tdep;
struct gdbarch *gdbarch;
- struct tdesc_arch_data *tdesc_data;
const struct target_desc *tdesc;
int mm0_regnum;
int ymm0_regnum;
int bnd0_regnum;
int num_bnd_cooked;
- int k0_regnum;
- int zmm0_regnum;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
- /* Allocate space for the new architecture. */
+ /* Allocate space for the new architecture. Assume i386 for now. */
tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
tdep->record_regmap = i386_record_regmap;
- set_gdbarch_long_long_align_bit (gdbarch, 32);
+ set_gdbarch_type_align (gdbarch, i386_type_align);
/* The format used for `long double' on almost all i386 targets is
the i387 extended floating-point format. In fact, of all targets
alignment. */
set_gdbarch_long_double_bit (gdbarch, 96);
+ /* Support of bfloat16 format. */
+ set_gdbarch_bfloat16_format (gdbarch, floatformats_bfloat16);
+
+ /* Support for floating-point data type variants. */
+ set_gdbarch_floatformat_for_type (gdbarch, i386_floatformat_for_type);
+
/* Register numbers of various important registers. */
set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
/* Stack grows downward. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch, i386_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch, i386_breakpoint::bp_from_kind);
+
set_gdbarch_decr_pc_after_break (gdbarch, 1);
set_gdbarch_max_insn_length (gdbarch, I386_MAX_INSN_LEN);
/* Even though the default ABI only includes general-purpose registers,
floating-point registers and the SSE registers, we have to leave a
gap for the upper AVX, MPX and AVX512 registers. */
- set_gdbarch_num_regs (gdbarch, I386_AVX512_NUM_REGS);
+ set_gdbarch_num_regs (gdbarch, I386_NUM_REGS);
set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp);
/* Get the x86 target description from INFO. */
tdesc = info.target_desc;
if (! tdesc_has_registers (tdesc))
- tdesc = tdesc_i386;
+ tdesc = i386_target_description (X86_XSTATE_SSE_MASK, false);
tdep->tdesc = tdesc;
tdep->num_core_regs = I386_NUM_GREGS + I387_NUM_REGS;
tdep->num_ymm_avx512_regs = 0;
tdep->num_xmm_avx512_regs = 0;
- tdesc_data = tdesc_data_alloc ();
+ /* No PKEYS registers */
+ tdep->pkru_regnum = -1;
+ tdep->num_pkeys_regs = 0;
+
+ /* No segment base registers. */
+ tdep->fsbase_regnum = -1;
+
+ tdesc_arch_data_up tdesc_data = tdesc_data_alloc ();
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
set_gdbarch_insn_is_ret (gdbarch, i386_insn_is_ret);
set_gdbarch_insn_is_jump (gdbarch, i386_insn_is_jump);
- /* Hook in ABI-specific overrides, if they have been registered. */
- info.tdep_info = tdesc_data;
+ /* Hook in ABI-specific overrides, if they have been registered.
+ Note: If INFO specifies a 64 bit arch, this is where we turn
+ a 32-bit i386 into a 64-bit amd64. */
+ info.tdesc_data = tdesc_data.get ();
gdbarch_init_osabi (info, gdbarch);
- if (!i386_validate_tdesc_p (tdep, tdesc_data))
+ if (!i386_validate_tdesc_p (tdep, tdesc_data.get ()))
{
- tdesc_data_cleanup (tdesc_data);
xfree (tdep);
gdbarch_free (gdbarch);
return NULL;
/* Target description may be changed. */
tdesc = tdep->tdesc;
- tdesc_use_registers (gdbarch, tdesc, tdesc_data);
+ tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
/* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
set_gdbarch_register_reggroup_p (gdbarch, tdep->register_reggroup_p);
return gdbarch;
}
-static enum gdb_osabi
-i386_coff_osabi_sniffer (bfd *abfd)
-{
- if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0
- || strcmp (bfd_get_target (abfd), "coff-go32") == 0)
- return GDB_OSABI_GO32;
-
- return GDB_OSABI_UNKNOWN;
-}
\f
/* Return the target description for a specified XSAVE feature mask. */
const struct target_desc *
-i386_target_description (uint64_t xcr0)
+i386_target_description (uint64_t xcr0, bool segments)
{
- switch (xcr0 & X86_XSTATE_ALL_MASK)
- {
- case X86_XSTATE_MPX_AVX512_MASK:
- case X86_XSTATE_AVX512_MASK:
- return tdesc_i386_avx512;
- case X86_XSTATE_MPX_MASK:
- return tdesc_i386_mpx;
- case X86_XSTATE_AVX_MASK:
- return tdesc_i386_avx;
- default:
- return tdesc_i386;
- }
+ static target_desc *i386_tdescs \
+ [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
+ target_desc **tdesc;
+
+ tdesc = &i386_tdescs[(xcr0 & X86_XSTATE_SSE) ? 1 : 0]
+ [(xcr0 & X86_XSTATE_AVX) ? 1 : 0]
+ [(xcr0 & X86_XSTATE_MPX) ? 1 : 0]
+ [(xcr0 & X86_XSTATE_AVX512) ? 1 : 0]
+ [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]
+ [segments ? 1 : 0];
+
+ if (*tdesc == NULL)
+ *tdesc = i386_create_target_description (xcr0, false, segments);
+
+ return *tdesc;
}
#define MPX_BASE_MASK (~(ULONGEST) 0xfff)
struct gdbarch_tdep *tdep;
ULONGEST ret;
enum register_status regstatus;
- struct gdb_exception except;
rcache = get_current_regcache ();
- tdep = gdbarch_tdep (get_regcache_arch (rcache));
+ tdep = gdbarch_tdep (rcache->arch ());
regstatus = regcache_raw_read_unsigned (rcache, tdep->bndcfgu_regnum, &ret);
if (bounds_in_map == 1)
{
- ui_out_text (uiout, "Null bounds on map:");
- ui_out_text (uiout, " pointer value = ");
- ui_out_field_core_addr (uiout, "pointer-value", gdbarch, bt_entry[2]);
- ui_out_text (uiout, ".");
- ui_out_text (uiout, "\n");
+ uiout->text ("Null bounds on map:");
+ uiout->text (" pointer value = ");
+ uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]);
+ uiout->text (".");
+ uiout->text ("\n");
}
else
{
- ui_out_text (uiout, "{lbound = ");
- ui_out_field_core_addr (uiout, "lower-bound", gdbarch, bt_entry[0]);
- ui_out_text (uiout, ", ubound = ");
+ uiout->text ("{lbound = ");
+ uiout->field_core_addr ("lower-bound", gdbarch, bt_entry[0]);
+ uiout->text (", ubound = ");
/* The upper bound is stored in 1's complement. */
- ui_out_field_core_addr (uiout, "upper-bound", gdbarch, ~bt_entry[1]);
- ui_out_text (uiout, "}: pointer value = ");
- ui_out_field_core_addr (uiout, "pointer-value", gdbarch, bt_entry[2]);
+ uiout->field_core_addr ("upper-bound", gdbarch, ~bt_entry[1]);
+ uiout->text ("}: pointer value = ");
+ uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]);
if (gdbarch_ptr_bit (gdbarch) == 64)
size = ( (~(int64_t) bt_entry[1]) - (int64_t) bt_entry[0]);
one to the size. */
size = (size > -1 ? size + 1 : size);
- ui_out_text (uiout, ", size = ");
- ui_out_field_fmt (uiout, "size", "%s", plongest (size));
+ uiout->text (", size = ");
+ uiout->field_string ("size", plongest (size));
- ui_out_text (uiout, ", metadata = ");
- ui_out_field_core_addr (uiout, "metadata", gdbarch, bt_entry[3]);
- ui_out_text (uiout, "\n");
+ uiout->text (", metadata = ");
+ uiout->field_core_addr ("metadata", gdbarch, bt_entry[3]);
+ uiout->text ("\n");
}
}
/* Implement the command "show mpx bound". */
static void
-i386_mpx_info_bounds (char *args, int from_tty)
+i386_mpx_info_bounds (const char *args, int from_tty)
{
CORE_ADDR bd_base = 0;
CORE_ADDR addr;
struct gdbarch *gdbarch = get_current_arch ();
struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
- if (!i386_mpx_enabled ())
+ if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
+ || !i386_mpx_enabled ())
{
printf_unfiltered (_("Intel Memory Protection Extensions not "
"supported on this target.\n"));
/* Implement the command "set mpx bound". */
static void
-i386_mpx_set_bounds (char *args, int from_tty)
+i386_mpx_set_bounds (const char *args, int from_tty)
{
CORE_ADDR bd_base = 0;
CORE_ADDR addr, lower, upper;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
- if (!i386_mpx_enabled ())
+ if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
+ || !i386_mpx_enabled ())
error (_("Intel Memory Protection Extensions not supported\
on this target."));
static struct cmd_list_element *mpx_set_cmdlist, *mpx_show_cmdlist;
-/* Helper function for the CLI commands. */
-
-static void
-set_mpx_cmd (char *args, int from_tty)
-{
- help_list (mpx_set_cmdlist, "set mpx ", all_commands, gdb_stdout);
-}
-
-/* Helper function for the CLI commands. */
-
-static void
-show_mpx_cmd (char *args, int from_tty)
-{
- cmd_show_list (mpx_show_cmdlist, from_tty, "");
-}
-
-/* Provide a prototype to silence -Wmissing-prototypes. */
-void _initialize_i386_tdep (void);
-
+void _initialize_i386_tdep ();
void
-_initialize_i386_tdep (void)
+_initialize_i386_tdep ()
{
register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
/* Add "mpx" prefix for the set commands. */
- add_prefix_cmd ("mpx", class_support, set_mpx_cmd, _("\
+ add_basic_prefix_cmd ("mpx", class_support, _("\
Set Intel Memory Protection Extensions specific variables."),
- &mpx_set_cmdlist, "set mpx ",
- 0 /* allow-unknown */, &setlist);
+ &mpx_set_cmdlist, "set mpx ",
+ 0 /* allow-unknown */, &setlist);
/* Add "mpx" prefix for the show commands. */
- add_prefix_cmd ("mpx", class_support, show_mpx_cmd, _("\
+ add_show_prefix_cmd ("mpx", class_support, _("\
Show Intel Memory Protection Extensions specific variables."),
- &mpx_show_cmdlist, "show mpx ",
- 0 /* allow-unknown */, &showlist);
+ &mpx_show_cmdlist, "show mpx ",
+ 0 /* allow-unknown */, &showlist);
/* Add "bound" command for the show mpx commands list. */
in the bound table.",
&mpx_set_cmdlist);
- gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour,
- i386_coff_osabi_sniffer);
-
gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
i386_svr4_init_abi);
- gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32,
- i386_go32_init_abi);
/* Initialize the i386-specific register groups. */
i386_init_reggroups ();
- /* Initialize the standard target descriptions. */
- initialize_tdesc_i386 ();
- initialize_tdesc_i386_mmx ();
- initialize_tdesc_i386_avx ();
- initialize_tdesc_i386_mpx ();
- initialize_tdesc_i386_avx512 ();
-
/* Tell remote stub that we support XML target description. */
register_remote_support_xml ("i386");
}