/* Intel 387 floating point stuff.
- Copyright (C) 1988-2018 Free Software Foundation, Inc.
+ Copyright (C) 1988-2022 Free Software Foundation, Inc.
This file is part of GDB.
#include "i386-tdep.h"
#include "i387-tdep.h"
-#include "x86-xstate.h"
+#include "gdbsupport/x86-xstate.h"
/* Print the floating point number specified by RAW. */
fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
/* Real Indefinite (QNaN). */
- fputs_unfiltered (" Real Indefinite (QNaN)", file);
+ fputs_filtered (" Real Indefinite (QNaN)", file);
else if (fraction[1] & 0x40000000)
/* QNaN. */
fputs_filtered (" QNaN", file);
i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, const char *args)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
ULONGEST fctrl;
int fctrl_p;
ULONGEST fstat;
if (value_entirely_available (regval))
{
- const gdb_byte *raw = value_contents (regval);
+ const gdb_byte *raw = value_contents (regval).data ();
fputs_filtered ("0x", file);
for (i = 9; i >= 0; i--)
/* Floating point registers must be converted unless we are
accessing them in their hardware type or TYPE is not float. */
if (type == i387_ext_type (gdbarch)
- || TYPE_CODE (type) != TYPE_CODE_FLT)
+ || type->code () != TYPE_CODE_FLT)
return 0;
else
return 1;
gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
/* We only support floating-point values. */
- if (TYPE_CODE (type) != TYPE_CODE_FLT)
+ if (type->code () != TYPE_CODE_FLT)
{
warning (_("Cannot convert floating-point register value "
"to non-floating-point type."));
/* Convert to TYPE. */
if (!get_frame_register_bytes (frame, regnum, 0,
- register_size (gdbarch, regnum),
- from, optimizedp, unavailablep))
+ gdb::make_array_view (from,
+ register_size (gdbarch,
+ regnum)),
+ optimizedp, unavailablep))
return 0;
target_float_convert (from, i387_ext_type (gdbarch), to, type);
gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
/* We only support floating-point values. */
- if (TYPE_CODE (type) != TYPE_CODE_FLT)
+ if (type->code () != TYPE_CODE_FLT)
{
warning (_("Cannot convert non-floating-point type "
"to floating-point register value."));
i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
{
struct gdbarch *gdbarch = regcache->arch ();
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
const gdb_byte *regs = (const gdb_byte *) fsave;
int i;
{
if (fsave == NULL)
{
- regcache_raw_supply (regcache, i, NULL);
+ regcache->raw_supply (i, NULL);
continue;
}
val[2] = val[3] = 0;
if (i == I387_FOP_REGNUM (tdep))
val[1] &= ((1 << 3) - 1);
- regcache_raw_supply (regcache, i, val);
+ regcache->raw_supply (i, val);
}
else
- regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, FSAVE_ADDR (tdep, regs, i));
}
/* Provide dummy values for the SSE registers. */
for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
- regcache_raw_supply (regcache, i, NULL);
+ regcache->raw_supply (i, NULL);
if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
{
gdb_byte buf[4];
store_unsigned_integer (buf, 4, byte_order, I387_MXCSR_INIT_VAL);
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
+ regcache->raw_supply (I387_MXCSR_REGNUM (tdep), buf);
}
}
void
i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
+ gdbarch *arch = regcache->arch ();
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
gdb_byte *regs = (gdb_byte *) fsave;
int i;
if (regnum == -1 || regnum == i)
{
/* Most of the FPU control registers occupy only 16 bits in
- the fsave area. Give those a special treatment. */
+ the fsave area. Give those a special treatment. */
if (i >= I387_FCTRL_REGNUM (tdep)
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte buf[4];
- regcache_raw_collect (regcache, i, buf);
+ regcache->raw_collect (i, buf);
if (i == I387_FOP_REGNUM (tdep))
{
/* The opcode occupies only 11 bits. Make sure we
- don't touch the other bits. */
+ don't touch the other bits. */
buf[1] &= ((1 << 3) - 1);
buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
}
memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
}
else
- regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
+ regcache->raw_collect (i, FSAVE_ADDR (tdep, regs, i));
}
}
\f
void
i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
+ gdbarch *arch = regcache->arch ();
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
const gdb_byte *regs = (const gdb_byte *) fxsave;
int i;
{
if (regs == NULL)
{
- regcache_raw_supply (regcache, i, NULL);
+ regcache->raw_supply (i, NULL);
continue;
}
if (val[0] & (1 << fpreg))
{
int thisreg = (fpreg + 8 - top) % 8
- + I387_ST0_REGNUM (tdep);
+ + I387_ST0_REGNUM (tdep);
tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
}
else
val[0] = ftag & 0xff;
val[1] = (ftag >> 8) & 0xff;
}
- regcache_raw_supply (regcache, i, val);
+ regcache->raw_supply (i, val);
}
else
- regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, FXSAVE_ADDR (tdep, regs, i));
}
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
{
if (regs == NULL)
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
+ regcache->raw_supply (I387_MXCSR_REGNUM (tdep), NULL);
else
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
+ regcache->raw_supply (I387_MXCSR_REGNUM (tdep),
FXSAVE_MXCSR_ADDR (regs));
}
}
void
i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
+ gdbarch *arch = regcache->arch ();
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
gdb_byte *regs = (gdb_byte *) fxsave;
int i;
if (regnum == -1 || regnum == i)
{
/* Most of the FPU control registers occupy only 16 bits in
- the fxsave area. Give those a special treatment. */
+ the fxsave area. Give those a special treatment. */
if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte buf[4];
- regcache_raw_collect (regcache, i, buf);
+ regcache->raw_collect (i, buf);
if (i == I387_FOP_REGNUM (tdep))
{
/* The opcode occupies only 11 bits. Make sure we
- don't touch the other bits. */
+ don't touch the other bits. */
buf[1] &= ((1 << 3) - 1);
buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
}
memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
}
else
- regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
+ regcache->raw_collect (i, FXSAVE_ADDR (tdep, regs, i));
}
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
- regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
+ regcache->raw_collect (I387_MXCSR_REGNUM (tdep),
FXSAVE_MXCSR_ADDR (regs));
}
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
const gdb_byte *regs = (const gdb_byte *) xsave;
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
/* Get `xstat_bv'. The supported bits in `xstat_bv' are 8 bytes. */
ULONGEST xstate_bv = extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs),
{
struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
const gdb_byte *regs = (const gdb_byte *) xsave;
int i;
+ /* In 64-bit mode the split between "low" and "high" ZMM registers is at
+ ZMM16. Outside of 64-bit mode there are no "high" ZMM registers at all.
+ Precalculate the number to be used for the split point, with the all
+ registers in the "low" portion outside of 64-bit mode. */
+ unsigned int zmm_endlo_regnum = I387_ZMM0H_REGNUM (tdep)
+ + std::min (tdep->num_zmm_regs, 16);
ULONGEST clear_bv;
static const gdb_byte zero[I386_MAX_REGISTER_SIZE] = { 0 };
enum
case pkeys:
if ((clear_bv & X86_XSTATE_PKRU))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- XSAVE_PKEYS_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum, XSAVE_PKEYS_ADDR (tdep, regs, regnum));
return;
case avx512_zmm_h:
- if ((clear_bv & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
- regcache_raw_supply (regcache, regnum, zero);
+ if ((clear_bv & (regnum < zmm_endlo_regnum ? X86_XSTATE_ZMM_H
+ : X86_XSTATE_ZMM)))
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum,
+ XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, regnum));
return;
case avx512_k:
if ((clear_bv & X86_XSTATE_K))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- XSAVE_AVX512_K_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum, XSAVE_AVX512_K_ADDR (tdep, regs, regnum));
return;
case avx512_ymmh_avx512:
if ((clear_bv & X86_XSTATE_ZMM))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum,
+ XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum));
return;
case avx512_xmm_avx512:
if ((clear_bv & X86_XSTATE_ZMM))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- XSAVE_XMM_AVX512_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum,
+ XSAVE_XMM_AVX512_ADDR (tdep, regs, regnum));
return;
case avxh:
if ((clear_bv & X86_XSTATE_AVX))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- XSAVE_AVXH_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum, XSAVE_AVXH_ADDR (tdep, regs, regnum));
return;
case mpx:
if ((clear_bv & X86_XSTATE_BNDREGS))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- XSAVE_MPX_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum, XSAVE_MPX_ADDR (tdep, regs, regnum));
return;
case sse:
if ((clear_bv & X86_XSTATE_SSE))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- FXSAVE_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum, FXSAVE_ADDR (tdep, regs, regnum));
return;
case x87:
if ((clear_bv & X86_XSTATE_X87))
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
else
- regcache_raw_supply (regcache, regnum,
- FXSAVE_ADDR (tdep, regs, regnum));
+ regcache->raw_supply (regnum, FXSAVE_ADDR (tdep, regs, regnum));
return;
case all:
for (i = I387_PKRU_REGNUM (tdep);
i < I387_PKEYSEND_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
for (i = I387_PKRU_REGNUM (tdep);
i < I387_PKEYSEND_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i,
- XSAVE_PKEYS_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, XSAVE_PKEYS_ADDR (tdep, regs, i));
}
}
- /* Handle the upper ZMM registers. */
- if ((tdep->xcr0 & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
+ /* Handle the upper halves of the low 8/16 ZMM registers. */
+ if ((tdep->xcr0 & X86_XSTATE_ZMM_H))
{
- if ((clear_bv & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
+ if ((clear_bv & X86_XSTATE_ZMM_H))
{
- for (i = I387_ZMM0H_REGNUM (tdep);
- i < I387_ZMMENDH_REGNUM (tdep);
- i++)
- regcache_raw_supply (regcache, i, zero);
+ for (i = I387_ZMM0H_REGNUM (tdep); i < zmm_endlo_regnum; i++)
+ regcache->raw_supply (i, zero);
}
else
{
- for (i = I387_ZMM0H_REGNUM (tdep);
- i < I387_ZMMENDH_REGNUM (tdep);
- i++)
- regcache_raw_supply (regcache, i,
- XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i));
+ for (i = I387_ZMM0H_REGNUM (tdep); i < zmm_endlo_regnum; i++)
+ regcache->raw_supply (i,
+ XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i));
}
}
for (i = I387_K0_REGNUM (tdep);
i < I387_KEND_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
for (i = I387_K0_REGNUM (tdep);
i < I387_KEND_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i,
- XSAVE_AVX512_K_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, XSAVE_AVX512_K_ADDR (tdep, regs, i));
}
}
- /* Handle the YMM_AVX512 registers. */
+ /* Handle the upper 16 ZMM/YMM/XMM registers (if any). */
if ((tdep->xcr0 & X86_XSTATE_ZMM))
{
if ((clear_bv & X86_XSTATE_ZMM))
{
+ for (i = zmm_endlo_regnum; i < I387_ZMMENDH_REGNUM (tdep); i++)
+ regcache->raw_supply (i, zero);
for (i = I387_YMM16H_REGNUM (tdep);
i < I387_YMMH_AVX512_END_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
for (i = I387_XMM16_REGNUM (tdep);
i < I387_XMM_AVX512_END_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
+ for (i = zmm_endlo_regnum; i < I387_ZMMENDH_REGNUM (tdep); i++)
+ regcache->raw_supply (i,
+ XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i));
for (i = I387_YMM16H_REGNUM (tdep);
i < I387_YMMH_AVX512_END_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i,
- XSAVE_YMM_AVX512_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, XSAVE_YMM_AVX512_ADDR (tdep, regs, i));
for (i = I387_XMM16_REGNUM (tdep);
i < I387_XMM_AVX512_END_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i,
- XSAVE_XMM_AVX512_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, XSAVE_XMM_AVX512_ADDR (tdep, regs, i));
}
}
/* Handle the upper YMM registers. */
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i,
- XSAVE_AVXH_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, XSAVE_AVXH_ADDR (tdep, regs, i));
}
}
{
for (i = I387_BND0R_REGNUM (tdep);
i < I387_BNDCFGU_REGNUM (tdep); i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
for (i = I387_BND0R_REGNUM (tdep);
i < I387_BNDCFGU_REGNUM (tdep); i++)
- regcache_raw_supply (regcache, i,
- XSAVE_MPX_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, XSAVE_MPX_ADDR (tdep, regs, i));
}
}
{
for (i = I387_BNDCFGU_REGNUM (tdep);
i < I387_MPXEND_REGNUM (tdep); i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
for (i = I387_BNDCFGU_REGNUM (tdep);
i < I387_MPXEND_REGNUM (tdep); i++)
- regcache_raw_supply (regcache, i,
- XSAVE_MPX_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, XSAVE_MPX_ADDR (tdep, regs, i));
}
}
for (i = I387_XMM0_REGNUM (tdep);
i < I387_MXCSR_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
for (i = I387_XMM0_REGNUM (tdep);
i < I387_MXCSR_REGNUM (tdep); i++)
- regcache_raw_supply (regcache, i,
- FXSAVE_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, FXSAVE_ADDR (tdep, regs, i));
}
}
for (i = I387_ST0_REGNUM (tdep);
i < I387_FCTRL_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
else
{
for (i = I387_ST0_REGNUM (tdep);
i < I387_FCTRL_REGNUM (tdep);
i++)
- regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, FXSAVE_ADDR (tdep, regs, i));
}
}
break;
store_unsigned_integer (buf, 4, byte_order,
I387_FCTRL_INIT_VAL);
- regcache_raw_supply (regcache, i, buf);
+ regcache->raw_supply (i, buf);
}
else if (i == I387_FTAG_REGNUM (tdep))
{
gdb_byte buf[4];
store_unsigned_integer (buf, 4, byte_order, 0xffff);
- regcache_raw_supply (regcache, i, buf);
+ regcache->raw_supply (i, buf);
}
else
- regcache_raw_supply (regcache, i, zero);
+ regcache->raw_supply (i, zero);
}
/* Most of the FPU control registers occupy only 16 bits in
the xsave extended state. Give those a special treatment. */
val[0] = ftag & 0xff;
val[1] = (ftag >> 8) & 0xff;
}
- regcache_raw_supply (regcache, i, val);
+ regcache->raw_supply (i, val);
}
else
- regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
+ regcache->raw_supply (i, FXSAVE_ADDR (tdep, regs, i));
}
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
gdb_byte buf[4];
store_unsigned_integer (buf, 4, byte_order, I387_MXCSR_INIT_VAL);
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
+ regcache->raw_supply (I387_MXCSR_REGNUM (tdep), buf);
}
else
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
- FXSAVE_MXCSR_ADDR (regs));
+ regcache->raw_supply (I387_MXCSR_REGNUM (tdep),
+ FXSAVE_MXCSR_ADDR (regs));
}
}
{
struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
gdb_byte *p, *regs = (gdb_byte *) xsave;
gdb_byte raw[I386_MAX_REGISTER_SIZE];
ULONGEST initial_xstate_bv, clear_bv, xstate_bv = 0;
unsigned int i;
+ /* See the comment in i387_supply_xsave(). */
+ unsigned int zmm_endlo_regnum = I387_ZMM0H_REGNUM (tdep)
+ + std::min (tdep->num_zmm_regs, 16);
enum
{
x87_ctrl_or_mxcsr = 0x1,
i < I387_MPXEND_REGNUM (tdep); i++)
memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 8);
- if ((clear_bv & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
- for (i = I387_ZMM0H_REGNUM (tdep);
- i < I387_ZMMENDH_REGNUM (tdep); i++)
+ if ((clear_bv & X86_XSTATE_ZMM_H))
+ for (i = I387_ZMM0H_REGNUM (tdep); i < zmm_endlo_regnum; i++)
memset (XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i), 0, 32);
if ((clear_bv & X86_XSTATE_K))
if ((clear_bv & X86_XSTATE_ZMM))
{
+ for (i = zmm_endlo_regnum; i < I387_ZMMENDH_REGNUM (tdep); i++)
+ memset (XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i), 0, 32);
for (i = I387_YMM16H_REGNUM (tdep);
i < I387_YMMH_AVX512_END_REGNUM (tdep); i++)
memset (XSAVE_YMM_AVX512_ADDR (tdep, regs, i), 0, 16);
for (i = I387_PKRU_REGNUM (tdep);
i < I387_PKEYSEND_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_PKEYS_ADDR (tdep, regs, i);
if (memcmp (raw, p, 4) != 0)
{
for (i = I387_ZMM0H_REGNUM (tdep);
i < I387_ZMMENDH_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i);
if (memcmp (raw, p, 32) != 0)
{
for (i = I387_K0_REGNUM (tdep);
i < I387_KEND_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_AVX512_K_ADDR (tdep, regs, i);
if (memcmp (raw, p, 8) != 0)
{
for (i = I387_YMM16H_REGNUM (tdep);
i < I387_YMMH_AVX512_END_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_YMM_AVX512_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16) != 0)
{
for (i = I387_XMM16_REGNUM (tdep);
i < I387_XMM_AVX512_END_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_XMM_AVX512_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16) != 0)
{
for (i = I387_BND0R_REGNUM (tdep);
i < I387_BNDCFGU_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_MPX_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16))
{
for (i = I387_BNDCFGU_REGNUM (tdep);
i < I387_MPXEND_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_MPX_ADDR (tdep, regs, i);
if (memcmp (raw, p, 8))
{
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = XSAVE_AVXH_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16))
{
for (i = I387_XMM0_REGNUM (tdep);
i < I387_MXCSR_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = FXSAVE_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16))
{
if ((tdep->xcr0 & X86_XSTATE_AVX) || (tdep->xcr0 & X86_XSTATE_SSE))
{
i = I387_MXCSR_REGNUM (tdep);
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = FXSAVE_MXCSR_ADDR (regs);
if (memcmp (raw, p, 4))
{
for (i = I387_ST0_REGNUM (tdep);
i < I387_FCTRL_REGNUM (tdep); i++)
{
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
p = FXSAVE_ADDR (tdep, regs, i);
if (memcmp (raw, p, 10))
{
else
{
/* Check if REGNUM is changed. */
- regcache_raw_collect (regcache, regnum, raw);
+ regcache->raw_collect (regnum, raw);
switch (regclass)
{
case mpx:
if (regnum < I387_BNDCFGU_REGNUM (tdep))
{
- regcache_raw_collect (regcache, regnum, raw);
+ regcache->raw_collect (regnum, raw);
p = XSAVE_MPX_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 16))
{
{
gdb_byte buf[4];
- regcache_raw_collect (regcache, i, buf);
+ regcache->raw_collect (i, buf);
if (i == I387_FOP_REGNUM (tdep))
{
{
int regsize;
- regcache_raw_collect (regcache, i, raw);
+ regcache->raw_collect (i, raw);
regsize = regcache_register_size (regcache, i);
p = FXSAVE_ADDR (tdep, regs, i);
if (memcmp (raw, p, regsize))
void
i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
ULONGEST fstat;
/* Set the top of the floating-point register stack to 7. The
void
i387_reset_bnd_regs (struct gdbarch *gdbarch, struct regcache *regcache)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
if (I387_BND0R_REGNUM (tdep) > 0)
{
memset (bnd_buf, 0, 16);
for (int i = 0; i < I387_NUM_BND_REGS; i++)
- regcache_raw_write (regcache, I387_BND0R_REGNUM (tdep) + i, bnd_buf);
+ regcache->raw_write (I387_BND0R_REGNUM (tdep) + i, bnd_buf);
}
}
projects / binutils-gdb.git / blobdiff