/* Functions specific to running gdb native on IA-64 running
GNU/Linux.
- Copyright (C) 1999-2018 Free Software Foundation, Inc.
+ Copyright (C) 1999-2022 Free Software Foundation, Inc.
This file is part of GDB.
#include "defs.h"
#include "inferior.h"
#include "target.h"
+#include "gdbarch.h"
#include "gdbcore.h"
#include "regcache.h"
#include "ia64-tdep.h"
#include <signal.h>
#include "nat/gdb_ptrace.h"
-#include "gdb_wait.h"
+#include "gdbsupport/gdb_wait.h"
#ifdef HAVE_SYS_REG_H
#include <sys/reg.h>
#endif
ULONGEST offset, ULONGEST len,
ULONGEST *xfered_len) override;
- const struct target_desc *read_description () override;
-
/* Override watchpoint routines. */
/* The IA-64 architecture can step over a watch point (without
has determined that a hardware watchpoint has indeed been hit.
The CPU will then be able to execute one instruction without
triggering a watchpoint. */
- bool have_steppable_watchpoint () { return 1; }
+ bool have_steppable_watchpoint () override { return true; }
int can_use_hw_breakpoint (enum bptype, int, int) override;
bool stopped_by_watchpoint () override;
/* Override linux_nat_target low methods. */
void low_new_thread (struct lwp_info *lp) override;
bool low_status_is_event (int status) override;
+
+ void enable_watchpoints_in_psr (ptid_t ptid);
};
static ia64_linux_nat_target the_ia64_linux_nat_target;
return regno < 0
|| regno >= gdbarch_num_regs (gdbarch)
|| u_offsets[regno] == -1
- || regno == IA64_BSPSTORE_REGNUM;
+ || regno == IA64_BSPSTORE_REGNUM;
}
void
for (regi = IA64_GR0_REGNUM; regi <= IA64_GR31_REGNUM; regi++)
{
- regcache_raw_supply (regcache, regi, regp + (regi - IA64_GR0_REGNUM));
+ regcache->raw_supply (regi, regp + (regi - IA64_GR0_REGNUM));
}
/* FIXME: NAT collection bits are at index 32; gotta deal with these
somehow... */
- regcache_raw_supply (regcache, IA64_PR_REGNUM, regp + 33);
+ regcache->raw_supply (IA64_PR_REGNUM, regp + 33);
for (regi = IA64_BR0_REGNUM; regi <= IA64_BR7_REGNUM; regi++)
{
- regcache_raw_supply (regcache, regi,
- regp + 34 + (regi - IA64_BR0_REGNUM));
+ regcache->raw_supply (regi, regp + 34 + (regi - IA64_BR0_REGNUM));
}
- regcache_raw_supply (regcache, IA64_IP_REGNUM, regp + 42);
- regcache_raw_supply (regcache, IA64_CFM_REGNUM, regp + 43);
- regcache_raw_supply (regcache, IA64_PSR_REGNUM, regp + 44);
- regcache_raw_supply (regcache, IA64_RSC_REGNUM, regp + 45);
- regcache_raw_supply (regcache, IA64_BSP_REGNUM, regp + 46);
- regcache_raw_supply (regcache, IA64_BSPSTORE_REGNUM, regp + 47);
- regcache_raw_supply (regcache, IA64_RNAT_REGNUM, regp + 48);
- regcache_raw_supply (regcache, IA64_CCV_REGNUM, regp + 49);
- regcache_raw_supply (regcache, IA64_UNAT_REGNUM, regp + 50);
- regcache_raw_supply (regcache, IA64_FPSR_REGNUM, regp + 51);
- regcache_raw_supply (regcache, IA64_PFS_REGNUM, regp + 52);
- regcache_raw_supply (regcache, IA64_LC_REGNUM, regp + 53);
- regcache_raw_supply (regcache, IA64_EC_REGNUM, regp + 54);
+ regcache->raw_supply (IA64_IP_REGNUM, regp + 42);
+ regcache->raw_supply (IA64_CFM_REGNUM, regp + 43);
+ regcache->raw_supply (IA64_PSR_REGNUM, regp + 44);
+ regcache->raw_supply (IA64_RSC_REGNUM, regp + 45);
+ regcache->raw_supply (IA64_BSP_REGNUM, regp + 46);
+ regcache->raw_supply (IA64_BSPSTORE_REGNUM, regp + 47);
+ regcache->raw_supply (IA64_RNAT_REGNUM, regp + 48);
+ regcache->raw_supply (IA64_CCV_REGNUM, regp + 49);
+ regcache->raw_supply (IA64_UNAT_REGNUM, regp + 50);
+ regcache->raw_supply (IA64_FPSR_REGNUM, regp + 51);
+ regcache->raw_supply (IA64_PFS_REGNUM, regp + 52);
+ regcache->raw_supply (IA64_LC_REGNUM, regp + 53);
+ regcache->raw_supply (IA64_EC_REGNUM, regp + 54);
}
void
#define COPY_REG(_idx_,_regi_) \
if ((regno == -1) || regno == _regi_) \
- regcache_raw_collect (regcache, _regi_, regp + _idx_)
+ regcache->raw_collect (_regi_, regp + _idx_)
for (regi = IA64_GR0_REGNUM; regi <= IA64_GR31_REGNUM; regi++)
{
for fr0/fr1 and always supply their expected values. */
/* fr0 is always read as zero. */
- regcache_raw_supply (regcache, IA64_FR0_REGNUM, f_zero);
+ regcache->raw_supply (IA64_FR0_REGNUM, f_zero);
/* fr1 is always read as one (1.0). */
- regcache_raw_supply (regcache, IA64_FR1_REGNUM, f_one);
+ regcache->raw_supply (IA64_FR1_REGNUM, f_one);
for (regi = IA64_FR2_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
{
from = (const char *) &((*fpregsetp)[regi - IA64_FR0_REGNUM]);
- regcache_raw_supply (regcache, regi, from);
+ regcache->raw_supply (regi, from);
}
}
for (regi = IA64_FR0_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
{
if ((regno == -1) || (regno == regi))
- regcache_raw_collect (regcache, regi,
- &((*fpregsetp)[regi - IA64_FR0_REGNUM]));
+ regcache->raw_collect (regi, &((*fpregsetp)[regi - IA64_FR0_REGNUM]));
}
}
#define IA64_PSR_DB (1UL << 24)
#define IA64_PSR_DD (1UL << 39)
-static void
-enable_watchpoints_in_psr (ptid_t ptid)
+void
+ia64_linux_nat_target::enable_watchpoints_in_psr (ptid_t ptid)
{
- struct regcache *regcache = get_thread_regcache (ptid);
+ struct regcache *regcache = get_thread_regcache (this, ptid);
ULONGEST psr;
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
if (!(psr & IA64_PSR_DB))
{
psr |= IA64_PSR_DB; /* Set the db bit - this enables hardware
- watchpoints and breakpoints. */
+ watchpoints and breakpoints. */
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
}
}
{
int tid;
- tid = ptid_get_lwp (ptid);
+ tid = ptid.lwp ();
if (tid == 0)
- tid = ptid_get_pid (ptid);
+ tid = ptid.pid ();
(void) ptrace (PT_WRITE_U, tid, (PTRACE_TYPE_ARG3) (PT_DBR + 8 * idx), val);
}
enum target_hw_bp_type type,
struct expression *cond)
{
- struct lwp_info *lp;
int idx;
long dbr_addr, dbr_mask;
int max_watchpoints = 4;
debug_registers[2 * idx] = dbr_addr;
debug_registers[2 * idx + 1] = dbr_mask;
- ALL_LWPS (lp)
+
+ for (const lwp_info *lp : all_lwps ())
{
store_debug_register_pair (lp->ptid, idx, &dbr_addr, &dbr_mask);
enable_watchpoints_in_psr (lp->ptid);
dbr_mask = debug_registers[2 * idx + 1];
if ((dbr_mask & (0x3UL << 62)) && addr == (CORE_ADDR) dbr_addr)
{
- struct lwp_info *lp;
-
debug_registers[2 * idx] = 0;
debug_registers[2 * idx + 1] = 0;
dbr_addr = 0;
dbr_mask = 0;
- ALL_LWPS (lp)
+ for (const lwp_info *lp : all_lwps ())
store_debug_register_pair (lp->ptid, idx, &dbr_addr, &dbr_mask);
return 0;
return -1;
}
-static void
-ia64_linux_new_thread (struct lwp_info *lp)
+void
+ia64_linux_nat_target::low_new_thread (struct lwp_info *lp)
{
int i, any;
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
psr |= IA64_PSR_DD; /* Set the dd bit - this will disable the watchpoint
- for the next instruction. */
+ for the next instruction. */
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
*addr_p = (CORE_ADDR) siginfo.si_addr;
return stopped_data_address (&addr);
}
-static int
-ia64_linux_can_use_hw_breakpoint (struct target_ops *self,
- enum bptype type,
- int cnt, int othertype)
+int
+ia64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
+ int cnt, int othertype)
{
return 1;
}
const gdb_byte zero[8] = { 0 };
gdb_assert (sizeof (zero) == register_size (gdbarch, regnum));
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
return;
}
const gdb_byte f_zero[16] = { 0 };
gdb_assert (sizeof (f_zero) == register_size (gdbarch, regnum));
- regcache_raw_supply (regcache, regnum, f_zero);
+ regcache->raw_supply (regnum, f_zero);
return;
}
{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
gdb_assert (sizeof (f_one) == register_size (gdbarch, regnum));
- regcache_raw_supply (regcache, regnum, f_one);
+ regcache->raw_supply (regnum, f_one);
return;
}
if (ia64_cannot_fetch_register (gdbarch, regnum))
{
- regcache_raw_supply (regcache, regnum, NULL);
+ regcache->raw_supply (regnum, NULL);
return;
}
- pid = get_ptrace_pid (regcache_get_ptid (regcache));
+ pid = get_ptrace_pid (regcache->ptid ());
/* This isn't really an address, but ptrace thinks of it as one. */
addr = ia64_register_addr (gdbarch, regnum);
addr += sizeof (PTRACE_TYPE_RET);
}
- regcache_raw_supply (regcache, regnum, buf);
+ regcache->raw_supply (regnum, buf);
}
/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
if (ia64_cannot_store_register (gdbarch, regnum))
return;
- pid = get_ptrace_pid (regcache_get_ptid (regcache));
+ pid = get_ptrace_pid (regcache->ptid ());
/* This isn't really an address, but ptrace thinks of it as one. */
addr = ia64_register_addr (gdbarch, regnum);
buf = (PTRACE_TYPE_RET *) alloca (size);
/* Write the register contents into the inferior a chunk at a time. */
- regcache_raw_collect (regcache, regnum, buf);
+ regcache->raw_collect (regnum, buf);
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
{
errno = 0;
/* Probe for the table size once. */
if (gate_table_size == 0)
- gate_table_size = syscall (__NR_getunwind, NULL, 0);
+ gate_table_size = syscall (__NR_getunwind, NULL, 0);
if (gate_table_size < 0)
return TARGET_XFER_E_IO;
|| WSTOPSIG (status) == SIGILL);
}
+void _initialize_ia64_linux_nat ();
void
-_initialize_ia64_linux_nat (void)
+_initialize_ia64_linux_nat ()
{
- struct target_ops *t = &the_ia64_linux_nat_target;
-
/* Register the target. */
linux_target = &the_ia64_linux_nat_target;
- add_target (t);
+ add_inf_child_target (&the_ia64_linux_nat_target);
}