/* Size of frame. */
int size;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Add the available register groups. */
/* Any stack displaced store is likely part of the prologue.
Record that the register is being saved, and the offset
into the stack. */
- info->saved_regs[LM32_REG1 (instruction)].addr =
- LM32_IMM16 (instruction);
+ info->saved_regs[LM32_REG1 (instruction)].set_addr (LM32_IMM16 (instruction));
}
else if ((LM32_OPCODE (instruction) == OP_ADDI)
&& (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM))
{
CORE_ADDR func_addr, limit_pc;
struct lm32_frame_cache frame_info;
- struct trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
+ trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
/* See if we can determine the end of the prologue via the symbol table.
If so, then return either PC, or the PC after the prologue, whichever
/* Convert callee save offsets into addresses. */
for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
{
- if (trad_frame_addr_p (info->saved_regs, i))
- info->saved_regs[i].addr = this_base + info->saved_regs[i].addr;
+ if (info->saved_regs[i].is_addr ())
+ info->saved_regs[i].set_addr (this_base + info->saved_regs[i].addr ());
}
/* The call instruction moves the caller's PC in the callee's RA register.
/* The previous frame's SP needed to be computed. Save the computed
value. */
- trad_frame_set_value (info->saved_regs, SIM_LM32_SP_REGNUM, prev_sp);
+ info->saved_regs[SIM_LM32_SP_REGNUM].set_value (prev_sp);
return info;
}